Blackfin: SMP: implement cpu_freq support
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Graf Yang
Mike Frysinger
parent
820b127dae
commit
6f546bc3ac
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@ -125,6 +125,9 @@ void unset_dram_srfs(void);
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#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
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#ifdef CONFIG_CPU_FREQ
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#define CPUFREQ_CPU 0
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#endif
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struct bfin_dpmc_platform_data {
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const unsigned int *tuple_tab;
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unsigned short tabsize;
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@ -34,7 +34,7 @@ extern unsigned long dcache_invld_count[NR_CPUS];
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void smp_icache_flush_range_others(unsigned long start,
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unsigned long end);
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#ifdef CONFIG_HOTPLUG_CPU
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void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
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void coreb_die(void);
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void cpu_die(void);
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void platform_cpu_die(void);
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int __cpu_disable(void);
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@ -5,30 +5,27 @@
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/smp.h>
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#include <asm/blackfin.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
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#include <mach/pll.h>
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int hotplug_coreb;
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void platform_cpu_die(void)
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{
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unsigned long iwr[2] = {0, 0};
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unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32;
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unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32);
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unsigned long iwr;
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hotplug_coreb = 1;
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iwr[bank] = bit;
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/* disable core timer */
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bfin_write_TCNTL(0);
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/* clear ipi interrupt IRQ_SUPPLE_0 */
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/* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */
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bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
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SSYNC();
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coreb_sleep(iwr[0], iwr[1], 0);
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/* set CoreB wakeup by ipi0, iwr will be discarded */
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bfin_iwr_set_sup0(&iwr, &iwr, &iwr);
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SSYNC();
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coreb_die();
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}
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@ -162,39 +162,31 @@ ENTRY(_coreb_trampoline_start)
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ENDPROC(_coreb_trampoline_start)
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ENTRY(_coreb_trampoline_end)
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#ifdef CONFIG_HOTPLUG_CPU
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.section ".text"
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ENTRY(_set_sicb_iwr)
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P0.H = hi(SICB_IWR0);
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P0.L = lo(SICB_IWR0);
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P1.H = hi(SICB_IWR1);
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P1.L = lo(SICB_IWR1);
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[P0] = R0;
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[P1] = R1;
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SSYNC;
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RTS;
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ENDPROC(_set_sicb_iwr)
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ENTRY(_coreb_sleep)
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ENTRY(_coreb_die)
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sp.l = lo(INITIAL_STACK);
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sp.h = hi(INITIAL_STACK);
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fp = sp;
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usp = sp;
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call _set_sicb_iwr;
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CLI R2;
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SSYNC;
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IDLE;
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STI R2;
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R0 = IWR_DISABLE_ALL;
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R1 = IWR_DISABLE_ALL;
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call _set_sicb_iwr;
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P0.H = hi(SYSMMR_BASE);
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P0.L = lo(SYSMMR_BASE);
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[P0 + (SICB_IWR0 - SYSMMR_BASE)] = R0;
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[P0 + (SICB_IWR1 - SYSMMR_BASE)] = R0;
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SSYNC;
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p0.h = hi(COREB_L1_CODE_START);
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p0.l = lo(COREB_L1_CODE_START);
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jump (p0);
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ENDPROC(_coreb_sleep)
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ENDPROC(_coreb_die)
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#endif
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__INIT
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ENTRY(_coreb_start)
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@ -16,8 +16,6 @@
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#include <asm/time.h>
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#include <asm/dpmc.h>
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#define CPUFREQ_CPU 0
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/* this is the table of CCLK frequencies, in Hz */
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/* .index is the entry in the auxillary dpm_state_table[] */
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static struct cpufreq_frequency_table bfin_freq_table[] = {
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@ -61,17 +61,63 @@ err_out:
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}
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#ifdef CONFIG_CPU_FREQ
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# ifdef CONFIG_SMP
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static void bfin_idle_this_cpu(void *info)
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{
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unsigned long flags = 0;
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unsigned long iwr0, iwr1, iwr2;
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unsigned int cpu = smp_processor_id();
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local_irq_save_hw(flags);
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bfin_iwr_set_sup0(&iwr0, &iwr1, &iwr2);
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platform_clear_ipi(cpu, IRQ_SUPPLE_0);
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SSYNC();
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asm("IDLE;");
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bfin_iwr_restore(iwr0, iwr1, iwr2);
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local_irq_restore_hw(flags);
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}
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static void bfin_idle_cpu(void)
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{
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smp_call_function(bfin_idle_this_cpu, NULL, 0);
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}
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static void bfin_wakeup_cpu(void)
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{
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unsigned int cpu;
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unsigned int this_cpu = smp_processor_id();
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cpumask_t mask = cpu_online_map;
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cpu_clear(this_cpu, mask);
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for_each_cpu_mask(cpu, mask)
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platform_send_ipi_cpu(cpu, IRQ_SUPPLE_0);
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}
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# else
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static void bfin_idle_cpu(void) {}
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static void bfin_wakeup_cpu(void) {}
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# endif
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static int
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vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
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{
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struct cpufreq_freqs *freq = data;
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if (freq->cpu != CPUFREQ_CPU)
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return 0;
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if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
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bfin_idle_cpu();
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bfin_set_vlev(bfin_get_vlev(freq->new));
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udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
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} else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
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bfin_wakeup_cpu();
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} else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) {
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bfin_idle_cpu();
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bfin_set_vlev(bfin_get_vlev(freq->new));
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bfin_wakeup_cpu();
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}
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return 0;
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}
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