gpio/omap: make gpio_context part of gpio_bank structure
Currently gpio_context array used to save gpio bank's context, is used only for OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it can be specific to each gpio bank and can be used for any OMAP architecture Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -30,6 +30,19 @@
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static LIST_HEAD(omap_gpio_list);
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static LIST_HEAD(omap_gpio_list);
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struct gpio_regs {
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u32 irqenable1;
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u32 irqenable2;
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u32 wake_en;
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u32 ctrl;
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u32 oe;
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u32 leveldetect0;
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u32 leveldetect1;
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u32 risingdetect;
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u32 fallingdetect;
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u32 dataout;
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};
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struct gpio_bank {
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struct gpio_bank {
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struct list_head node;
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struct list_head node;
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unsigned long pbase;
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unsigned long pbase;
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@ -43,7 +56,7 @@ struct gpio_bank {
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#endif
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#endif
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u32 non_wakeup_gpios;
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u32 non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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struct gpio_regs context;
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u32 saved_datain;
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u32 saved_datain;
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u32 saved_fallingdetect;
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u32 saved_fallingdetect;
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u32 saved_risingdetect;
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u32 saved_risingdetect;
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@ -66,23 +79,6 @@ struct gpio_bank {
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struct omap_gpio_reg_offs *regs;
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struct omap_gpio_reg_offs *regs;
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};
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};
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#ifdef CONFIG_ARCH_OMAP3
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struct omap3_gpio_regs {
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u32 irqenable1;
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u32 irqenable2;
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u32 wake_en;
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u32 ctrl;
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u32 oe;
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u32 leveldetect0;
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u32 leveldetect1;
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u32 risingdetect;
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u32 fallingdetect;
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u32 dataout;
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};
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static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
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#endif
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#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
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#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
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#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
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#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
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@ -1499,33 +1495,31 @@ void omap2_gpio_resume_after_idle(void)
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void omap_gpio_save_context(void)
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void omap_gpio_save_context(void)
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{
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{
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struct gpio_bank *bank;
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struct gpio_bank *bank;
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int i = 0;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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list_for_each_entry(bank, &omap_gpio_list, node) {
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i++;
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if (!bank->loses_context)
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if (!bank->loses_context)
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continue;
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continue;
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gpio_context[i].irqenable1 =
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bank->context.irqenable1 =
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__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
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__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
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gpio_context[i].irqenable2 =
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bank->context.irqenable2 =
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__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
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__raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
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gpio_context[i].wake_en =
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bank->context.wake_en =
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__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
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__raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
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gpio_context[i].ctrl =
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bank->context.ctrl =
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__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
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__raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
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gpio_context[i].oe =
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bank->context.oe =
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__raw_readl(bank->base + OMAP24XX_GPIO_OE);
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__raw_readl(bank->base + OMAP24XX_GPIO_OE);
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gpio_context[i].leveldetect0 =
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bank->context.leveldetect0 =
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__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
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__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
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gpio_context[i].leveldetect1 =
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bank->context.leveldetect1 =
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__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
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__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
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gpio_context[i].risingdetect =
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bank->context.risingdetect =
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__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
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__raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
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gpio_context[i].fallingdetect =
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bank->context.fallingdetect =
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__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
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__raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
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gpio_context[i].dataout =
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bank->context.dataout =
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__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
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__raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
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}
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}
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}
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}
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@ -1533,33 +1527,31 @@ void omap_gpio_save_context(void)
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void omap_gpio_restore_context(void)
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void omap_gpio_restore_context(void)
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{
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{
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struct gpio_bank *bank;
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struct gpio_bank *bank;
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int i = 0;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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list_for_each_entry(bank, &omap_gpio_list, node) {
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i++;
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if (!bank->loses_context)
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if (!bank->loses_context)
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continue;
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continue;
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__raw_writel(gpio_context[i].irqenable1,
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__raw_writel(bank->context.irqenable1,
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bank->base + OMAP24XX_GPIO_IRQENABLE1);
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bank->base + OMAP24XX_GPIO_IRQENABLE1);
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__raw_writel(gpio_context[i].irqenable2,
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__raw_writel(bank->context.irqenable2,
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bank->base + OMAP24XX_GPIO_IRQENABLE2);
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bank->base + OMAP24XX_GPIO_IRQENABLE2);
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__raw_writel(gpio_context[i].wake_en,
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__raw_writel(bank->context.wake_en,
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bank->base + OMAP24XX_GPIO_WAKE_EN);
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bank->base + OMAP24XX_GPIO_WAKE_EN);
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__raw_writel(gpio_context[i].ctrl,
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__raw_writel(bank->context.ctrl,
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bank->base + OMAP24XX_GPIO_CTRL);
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bank->base + OMAP24XX_GPIO_CTRL);
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__raw_writel(gpio_context[i].oe,
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__raw_writel(bank->context.oe,
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bank->base + OMAP24XX_GPIO_OE);
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bank->base + OMAP24XX_GPIO_OE);
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__raw_writel(gpio_context[i].leveldetect0,
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__raw_writel(bank->context.leveldetect0,
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bank->base + OMAP24XX_GPIO_LEVELDETECT0);
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bank->base + OMAP24XX_GPIO_LEVELDETECT0);
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__raw_writel(gpio_context[i].leveldetect1,
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__raw_writel(bank->context.leveldetect1,
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bank->base + OMAP24XX_GPIO_LEVELDETECT1);
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bank->base + OMAP24XX_GPIO_LEVELDETECT1);
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__raw_writel(gpio_context[i].risingdetect,
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__raw_writel(bank->context.risingdetect,
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bank->base + OMAP24XX_GPIO_RISINGDETECT);
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bank->base + OMAP24XX_GPIO_RISINGDETECT);
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__raw_writel(gpio_context[i].fallingdetect,
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__raw_writel(bank->context.fallingdetect,
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bank->base + OMAP24XX_GPIO_FALLINGDETECT);
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bank->base + OMAP24XX_GPIO_FALLINGDETECT);
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__raw_writel(gpio_context[i].dataout,
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__raw_writel(bank->context.dataout,
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bank->base + OMAP24XX_GPIO_DATAOUT);
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bank->base + OMAP24XX_GPIO_DATAOUT);
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}
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}
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}
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}
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