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[IA64-SGI] support variable length nasids in shub2 

This patch enables our TIO IO chipset to support variable length nasids in 
Shub2 chipset.

Signed-off-by: Colin Ngam <cngam@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Colin Ngam 2005-04-25 13:07:00 -07:00 committed by Tony Luck
parent be539c73b5
commit 658b32cad9
1 changed files with 2 additions and 1 deletions
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3
include/asm-ia64/sn/addrs.h
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@ -154,8 +154,9 @@
* the chiplet id is zero. If we implement TIO-TIO dma, we might need
* to insert a chiplet id into this macro. However, it is our belief
* right now that this chiplet id will be ICE, which is also zero.
* Nasid starts on bit 40.
*/
#define PHYS_TO_TIODMA(x) ( (((u64)(x) & NASID_MASK) << 2) | NODE_OFFSET(x))
#define PHYS_TO_TIODMA(x) ( (((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x))
#define PHYS_TO_DMA(x) ( (((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x))