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[IA64] Fix Altix BTE error return status

The Altix shub2 BTE error detail bits are in a different location
than on shub1.  The current code does not take this into account
resulting in all shub2 BTE failures mapping to "unknown".

This patch reads the error detail bits from the proper location,
so the correct BTE failure reason is returned for both shub1
and shub2.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Russ Anderson 2007-08-21 16:45:12 -05:00 committed by Tony Luck
parent 091062284c
commit 64135fa97c
5 changed files with 70 additions and 8 deletions

View File

@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/module.h>
@ -227,7 +227,7 @@ retry_bteop:
BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
if (transfer_stat & IBLS_ERROR) {
bte_status = transfer_stat & ~IBLS_ERROR;
bte_status = BTE_GET_ERROR_STATUS(transfer_stat);
} else {
bte_status = BTE_SUCCESS;
}

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@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/types.h>
@ -148,7 +148,11 @@ int shub2_bte_error_handler(unsigned long _nodepda)
for (i = 0; i < BTES_PER_NODE; i++) {
bte = &err_nodepda->bte_if[i];
status = BTE_LNSTAT_LOAD(bte);
if ((status & IBLS_ERROR) || !(status & IBLS_BUSY))
if (status & IBLS_ERROR) {
bte->bh_error = BTE_SHUB2_ERROR(status);
continue;
}
if (!(status & IBLS_BUSY))
continue;
mod_timer(recovery_timer, jiffies + (HZ * 5));
BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,

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@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
@ -150,6 +150,35 @@ typedef enum {
BTEFAIL_NOTAVAIL, /* BTE not available */
} bte_result_t;
#define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */
#define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */
#define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */
#define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */
#define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */
#define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */
#define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */
#define BTE_ERR_BITS 0x3FUL
#define BTE_ERR_SHIFT 36
#define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT)
#define BTE_ERROR_RETRY(value) \
(is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \
: (value != BTEFAIL_TOUT))
/*
* On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2()
*/
#define BTE_SHUB2_ERROR(_status) \
((_status & BTE_ERR_MASK) \
? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \
: _status)
#define BTE_GET_ERROR_STATUS(_status) \
(BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR)
#define BTE_VALID_SH2_ERROR(value) \
((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL))
/*
* Structure defining a bte. An instance of this

View File

@ -86,7 +86,7 @@ xp_bte_copy(u64 src, u64 vdst, u64 len, u64 mode, void *notification)
BUG_ON(REGION_NUMBER(vdst) != RGN_KERNEL);
ret = bte_copy(src, pdst, len, mode, notification);
if (ret != BTE_SUCCESS) {
if ((ret != BTE_SUCCESS) && BTE_ERROR_RETRY(ret)) {
if (!in_interrupt()) {
cond_resched();
}
@ -244,7 +244,30 @@ enum xpc_retval {
xpcDisconnected, /* 51: channel disconnected (closed) */
xpcUnknownReason /* 52: unknown reason -- must be last in list */
xpcBteSh2Start, /* 52: BTE CRB timeout */
/* 53: 0x1 BTE Error Response Short */
xpcBteSh2RspShort = xpcBteSh2Start + BTEFAIL_SH2_RESP_SHORT,
/* 54: 0x2 BTE Error Response Long */
xpcBteSh2RspLong = xpcBteSh2Start + BTEFAIL_SH2_RESP_LONG,
/* 56: 0x4 BTE Error Response DSB */
xpcBteSh2RspDSB = xpcBteSh2Start + BTEFAIL_SH2_RESP_DSP,
/* 60: 0x8 BTE Error Response Access */
xpcBteSh2RspAccess = xpcBteSh2Start + BTEFAIL_SH2_RESP_ACCESS,
/* 68: 0x10 BTE Error CRB timeout */
xpcBteSh2CRBTO = xpcBteSh2Start + BTEFAIL_SH2_CRB_TO,
/* 84: 0x20 BTE Error NACK limit */
xpcBteSh2NACKLimit = xpcBteSh2Start + BTEFAIL_SH2_NACK_LIMIT,
/* 115: BTE end */
xpcBteSh2End = xpcBteSh2Start + BTEFAIL_SH2_ALL,
xpcUnknownReason /* 116: unknown reason -- must be last in list */
};

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@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
* Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
@ -1211,6 +1211,12 @@ xpc_IPI_init(int index)
static inline enum xpc_retval
xpc_map_bte_errors(bte_result_t error)
{
if (is_shub2()) {
if (BTE_VALID_SH2_ERROR(error))
return xpcBteSh2Start + error;
else
return xpcBteUnmappedError;
}
switch (error) {
case BTE_SUCCESS: return xpcSuccess;
case BTEFAIL_DIR: return xpcBteDirectoryError;