ath5k: Extend rate_duration
* Extend ieee80211_generic_frame_duration to support the various bwmodes. * Better document what's going on with ack bitrates and update write_rate_duration to support the standard ack bitrates (when we don't set the high bit). * Get rid of set_ack_bitrate_high and introduce a flag on ath5k_hw for this (we only called the function on init anyway so there is no difference). Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Nick Kossifidis
John W. Linville
parent
3017fcab41
commit
61cde03723
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@ -267,6 +267,15 @@
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#define AR5K_INIT_SIFS_HALF_RATE 32
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#define AR5K_INIT_SIFS_QUARTER_RATE 64
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/* Used to calculate tx time for non 5/10/40MHz
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* operation */
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/* It's preamble time + signal time (16 + 4) */
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#define AR5K_INIT_OFDM_PREAMPLE_TIME 20
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/* Preamble time for 40MHz (turbo) operation (min ?) */
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#define AR5K_INIT_OFDM_PREAMBLE_TIME_MIN 14
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#define AR5K_INIT_OFDM_SYMBOL_TIME 4
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#define AR5K_INIT_OFDM_PLCP_BITS 22
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/* Rx latency for 5 and 10MHz operation (max ?) */
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#define AR5K_INIT_RX_LAT_MAX 63
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/* Tx latencies from initvals (5212 only but no problem
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@ -1083,6 +1092,7 @@ struct ath5k_hw {
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u32 ah_limit_tx_retries;
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u8 ah_coverage_class;
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bool ah_ack_bitrate_high;
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u8 ah_bwmode;
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/* Antenna Control */
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@ -1248,8 +1258,6 @@ void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64);
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void ath5k_hw_reset_tsf(struct ath5k_hw *ah);
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void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval);
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bool ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval);
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/* ACK bit rate */
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void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high);
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/* Init function */
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void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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u8 mode);
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@ -2420,7 +2420,9 @@ ath5k_init(struct ath5k_softc *sc)
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for (i = 0; i < common->keymax; i++)
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ath_hw_keyreset(common, (u16) i);
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ath5k_hw_set_ack_bitrate_high(ah, true);
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/* Use higher rates for acks instead of base
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* rate */
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ah->ah_ack_bitrate_high = true;
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for (i = 0; i < ARRAY_SIZE(sc->bslot); i++)
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sc->bslot[i] = NULL;
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@ -31,10 +31,99 @@
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#include "debug.h"
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#include "base.h"
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/*
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* AR5212+ can use higher rates for ack transmition
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* based on current tx rate instead of the base rate.
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* It does this to better utilize channel usage.
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* This is a mapping between G rates (that cover both
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* CCK and OFDM) and ack rates that we use when setting
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* rate -> duration table. This mapping is hw-based so
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* don't change anything.
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*
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* To enable this functionality we must set
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* ah->ah_ack_bitrate_high to true else base rate is
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* used (1Mb for CCK, 6Mb for OFDM).
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*/
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static const unsigned int ack_rates_high[] =
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/* Tx -> ACK */
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/* 1Mb -> 1Mb */ { 0,
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/* 2MB -> 2Mb */ 1,
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/* 5.5Mb -> 2Mb */ 1,
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/* 11Mb -> 2Mb */ 1,
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/* 6Mb -> 6Mb */ 4,
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/* 9Mb -> 6Mb */ 4,
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/* 12Mb -> 12Mb */ 6,
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/* 18Mb -> 12Mb */ 6,
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/* 24Mb -> 24Mb */ 8,
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/* 36Mb -> 24Mb */ 8,
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/* 48Mb -> 24Mb */ 8,
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/* 54Mb -> 24Mb */ 8 };
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/*******************\
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* Helper functions *
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\*******************/
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/**
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* ath5k_hw_get_frame_duration - Get tx time of a frame
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*
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* @ah: The &struct ath5k_hw
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* @len: Frame's length in bytes
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* @rate: The @struct ieee80211_rate
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*
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* Calculate tx duration of a frame given it's rate and length
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* It extends ieee80211_generic_frame_duration for non standard
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* bwmodes.
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*/
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int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
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int len, struct ieee80211_rate *rate)
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{
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struct ath5k_softc *sc = ah->ah_sc;
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int sifs, preamble, plcp_bits, sym_time;
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int bitrate, bits, symbols, symbol_bits;
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int dur;
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/* Fallback */
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if (!ah->ah_bwmode) {
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dur = ieee80211_generic_frame_duration(sc->hw,
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NULL, len, rate);
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return dur;
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}
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bitrate = rate->bitrate;
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preamble = AR5K_INIT_OFDM_PREAMPLE_TIME;
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plcp_bits = AR5K_INIT_OFDM_PLCP_BITS;
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sym_time = AR5K_INIT_OFDM_SYMBOL_TIME;
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switch (ah->ah_bwmode) {
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case AR5K_BWMODE_40MHZ:
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sifs = AR5K_INIT_SIFS_TURBO;
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preamble = AR5K_INIT_OFDM_PREAMBLE_TIME_MIN;
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break;
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case AR5K_BWMODE_10MHZ:
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sifs = AR5K_INIT_SIFS_HALF_RATE;
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preamble *= 2;
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sym_time *= 2;
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break;
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case AR5K_BWMODE_5MHZ:
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sifs = AR5K_INIT_SIFS_QUARTER_RATE;
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preamble *= 4;
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sym_time *= 4;
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break;
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default:
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sifs = AR5K_INIT_SIFS_DEFAULT_BG;
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break;
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}
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bits = plcp_bits + (len << 3);
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/* Bit rate is in 100Kbits */
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symbol_bits = bitrate * sym_time;
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symbols = DIV_ROUND_UP(bits * 10, symbol_bits);
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dur = sifs + preamble + (sym_time * symbols);
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return dur;
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}
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/**
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* ath5k_hw_get_default_slottime - Get the default slot time for current mode
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*
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@ -120,43 +209,11 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
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stats->beacons += ath5k_hw_reg_read(ah, AR5K_BEACON_CNT);
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}
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/**
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* ath5k_hw_set_ack_bitrate - set bitrate for ACKs
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*
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* @ah: The &struct ath5k_hw
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* @high: Flag to determine if we want to use high transmission rate
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* for ACKs or not
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*
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* If high flag is set, we tell hw to use a set of control rates based on
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* the current transmission rate (check out control_rates array inside reset.c).
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* If not hw just uses the lowest rate available for the current modulation
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* scheme being used (1Mbit for CCK and 6Mbits for OFDM).
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*/
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void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, bool high)
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{
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if (ah->ah_version != AR5K_AR5212)
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return;
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else {
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u32 val = AR5K_STA_ID1_BASE_RATE_11B | AR5K_STA_ID1_ACKCTS_6MB;
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if (high)
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AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, val);
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else
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AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, val);
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}
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}
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/******************\
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* ACK/CTS Timeouts *
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\******************/
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/*
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* index into rates for control rates, we can set it up like this because
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* this is only used for AR5212 and we know it supports G mode
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*/
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static const unsigned int control_rates[] =
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{ 0, 1, 1, 1, 4, 4, 6, 6, 8, 8, 8, 8 };
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/**
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* ath5k_hw_write_rate_duration - fill rate code to duration table
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*
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@ -164,7 +221,7 @@ static const unsigned int control_rates[] =
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* @mode: one of enum ath5k_driver_mode
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*
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* Write the rate code to duration table upon hw reset. This is a helper for
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* ath5k_hw_reset(). It seems all this is doing is setting an ACK timeout on
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* ath5k_hw_pcu_init(). It seems all this is doing is setting an ACK timeout on
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* the hardware, based on current mode, for each rate. The rates which are
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* capable of short preamble (802.11b rates 2Mbps, 5.5Mbps, and 11Mbps) have
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* different rate code so we write their value twice (one for long preamble
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@ -172,23 +229,30 @@ static const unsigned int control_rates[] =
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*
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* Note: Band doesn't matter here, if we set the values for OFDM it works
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* on both a and g modes. So all we have to do is set values for all g rates
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* that include all OFDM and CCK rates. If we operate in turbo or xr/half/
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* quarter rate mode, we need to use another set of bitrates (that's why we
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* need the mode parameter) but we don't handle these proprietary modes yet.
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* that include all OFDM and CCK rates.
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*
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*/
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static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah,
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unsigned int mode)
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static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
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{
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struct ath5k_softc *sc = ah->ah_sc;
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struct ieee80211_rate *rate;
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unsigned int i;
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/* 802.11g covers both OFDM and CCK */
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u8 band = IEEE80211_BAND_2GHZ;
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/* Write rate duration table */
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for (i = 0; i < sc->sbands[IEEE80211_BAND_2GHZ].n_bitrates; i++) {
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for (i = 0; i < sc->sbands[band].n_bitrates; i++) {
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u32 reg;
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u16 tx_time;
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rate = &sc->sbands[IEEE80211_BAND_2GHZ].bitrates[control_rates[i]];
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if (ah->ah_ack_bitrate_high)
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rate = &sc->sbands[band].bitrates[ack_rates_high[i]];
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/* CCK -> 1Mb */
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else if (i < 4)
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rate = &sc->sbands[band].bitrates[0];
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/* OFDM -> 6Mb */
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else
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rate = &sc->sbands[band].bitrates[4];
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/* Set ACK timeout */
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reg = AR5K_RATE_DUR(rate->hw_value);
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@ -199,8 +263,9 @@ static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah,
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* actual rate for this rate. See mac80211 tx.c
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* ieee80211_duration() for a brief description of
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* what rate we should choose to TX ACKs. */
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tx_time = le16_to_cpu(ieee80211_generic_frame_duration(sc->hw,
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NULL, 10, rate));
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tx_time = ath5k_hw_get_frame_duration(ah, 10, rate);
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tx_time = le16_to_cpu(tx_time);
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ath5k_hw_reg_write(ah, tx_time, reg);
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@ -835,7 +900,7 @@ void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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* mac80211 are integrated */
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if (ah->ah_version == AR5K_AR5212 &&
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ah->ah_sc->nvifs)
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ath5k_hw_write_rate_duration(ah, mode);
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ath5k_hw_write_rate_duration(ah);
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/* Set RSSI/BRSSI thresholds
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*
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@ -869,5 +934,13 @@ void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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if (ah->ah_coverage_class > 0)
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ath5k_hw_set_coverage_class(ah, ah->ah_coverage_class);
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/* Set ACK bitrate mode (see ack_rates_high) */
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if (ah->ah_version == AR5K_AR5212) {
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u32 val = AR5K_STA_ID1_BASE_RATE_11B | AR5K_STA_ID1_ACKCTS_6MB;
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if (ah->ah_ack_bitrate_high)
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AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, val);
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else
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AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, val);
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}
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return;
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}
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