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xtensa: Convert genirq namespace 

Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Thomas Gleixner 2011-03-24 14:58:43 +01:00
parent 3b190a4a09
commit 610e1756ea
3 changed files with 13 additions and 13 deletions
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10
arch/xtensa/kernel/irq.c
View File

@ -164,25 +164,25 @@ void __init init_IRQ(void)
int mask = 1 << index;
if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
set_irq_chip_and_handler(index, &xtensa_irq_chip,
irq_set_chip_and_handler(index, &xtensa_irq_chip,
handle_simple_irq);
else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
set_irq_chip_and_handler(index, &xtensa_irq_chip,
irq_set_chip_and_handler(index, &xtensa_irq_chip,
handle_edge_irq);
else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
set_irq_chip_and_handler(index, &xtensa_irq_chip,
irq_set_chip_and_handler(index, &xtensa_irq_chip,
handle_level_irq);
else if (mask & XCHAL_INTTYPE_MASK_TIMER)
set_irq_chip_and_handler(index, &xtensa_irq_chip,
irq_set_chip_and_handler(index, &xtensa_irq_chip,
handle_edge_irq);
else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
/* XCHAL_INTTYPE_MASK_NMI */
set_irq_chip_and_handler(index, &xtensa_irq_chip,
irq_set_chip_and_handler(index, &xtensa_irq_chip,
handle_level_irq);
}

2
arch/xtensa/platforms/s6105/device.c
View File

@ -120,7 +120,7 @@ static int __init prepare_phy_irq(int pin)
irq = gpio_to_irq(pin);
if (irq < 0)
goto free;
if (set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0)
if (irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0)
goto free;
return irq;
free:

14
arch/xtensa/variants/s6000/gpio.c
View File

@ -128,7 +128,7 @@ static int set_type(struct irq_data *d, unsigned int type)
handler = handle_edge_irq;
}
writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
__set_irq_handler_unlocked(irq, handler);
__irq_set_handler_locked(irq, handler);
reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
@ -158,8 +158,8 @@ static u8 demux_masks[4];
static void demux_irqs(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = get_irq_desc_chip(desc);
u8 *mask = get_irq_desc_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
u8 *mask = irq_desc_get_handler_data(desc);
u8 pending;
int cirq;
@ -218,11 +218,11 @@ void __init variant_init_irq(void)
i = ffs(mask);
cirq += i;
mask >>= i;
set_irq_chip(cirq, &gpioirqs);
set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
irq_set_chip(cirq, &gpioirqs);
irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
} while (mask);
set_irq_data(irq, demux_masks + n);
set_irq_chained_handler(irq, demux_irqs);
irq_set_handler_data(irq, demux_masks + n);
irq_set_chained_handler(irq, demux_irqs);
if (++n == ARRAY_SIZE(demux_masks))
break;
}