bnx2x: Remove the init_dmae field from bp
Moved the dmae_command from the heap to the stack. This will save 56 bytes per bnx2x structure. As a side benefit, we can also reduce the time the dmae_mutex is held. This is because do we not need to hold this mutex when setting up the dmae command. The memory where is dmae command is stored is not a shared resource and doesn not need to be protected. Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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0d28e49a26
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5ff7b6d4c1
2 changed files with 47 additions and 48 deletions
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@ -973,7 +973,6 @@ struct bnx2x {
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int dmae_ready;
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/* used to synchronize dmae accesses */
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struct mutex dmae_mutex;
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struct dmae_command init_dmae;
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/* used to synchronize stats collecting */
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int stats_state;
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@ -203,7 +203,7 @@ static void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae,
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void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
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u32 len32)
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{
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struct dmae_command *dmae = &bp->init_dmae;
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struct dmae_command dmae;
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u32 *wb_comp = bnx2x_sp(bp, wb_comp);
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int cnt = 200;
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@ -216,43 +216,43 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
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return;
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}
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mutex_lock(&bp->dmae_mutex);
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memset(&dmae, 0, sizeof(struct dmae_command));
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memset(dmae, 0, sizeof(struct dmae_command));
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dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
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DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
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DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
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dmae.opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
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DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
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DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
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#ifdef __BIG_ENDIAN
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DMAE_CMD_ENDIANITY_B_DW_SWAP |
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DMAE_CMD_ENDIANITY_B_DW_SWAP |
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#else
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DMAE_CMD_ENDIANITY_DW_SWAP |
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DMAE_CMD_ENDIANITY_DW_SWAP |
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#endif
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(BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
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(BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
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dmae->src_addr_lo = U64_LO(dma_addr);
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dmae->src_addr_hi = U64_HI(dma_addr);
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dmae->dst_addr_lo = dst_addr >> 2;
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dmae->dst_addr_hi = 0;
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dmae->len = len32;
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dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_comp));
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dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_comp));
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dmae->comp_val = DMAE_COMP_VAL;
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(BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
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(BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
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dmae.src_addr_lo = U64_LO(dma_addr);
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dmae.src_addr_hi = U64_HI(dma_addr);
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dmae.dst_addr_lo = dst_addr >> 2;
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dmae.dst_addr_hi = 0;
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dmae.len = len32;
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dmae.comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_comp));
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dmae.comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_comp));
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dmae.comp_val = DMAE_COMP_VAL;
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DP(BNX2X_MSG_OFF, "DMAE: opcode 0x%08x\n"
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DP_LEVEL "src_addr [%x:%08x] len [%d *4] "
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"dst_addr [%x:%08x (%08x)]\n"
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DP_LEVEL "comp_addr [%x:%08x] comp_val 0x%08x\n",
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dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
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dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo, dst_addr,
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dmae->comp_addr_hi, dmae->comp_addr_lo, dmae->comp_val);
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dmae.opcode, dmae.src_addr_hi, dmae.src_addr_lo,
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dmae.len, dmae.dst_addr_hi, dmae.dst_addr_lo, dst_addr,
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dmae.comp_addr_hi, dmae.comp_addr_lo, dmae.comp_val);
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DP(BNX2X_MSG_OFF, "data [0x%08x 0x%08x 0x%08x 0x%08x]\n",
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bp->slowpath->wb_data[0], bp->slowpath->wb_data[1],
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bp->slowpath->wb_data[2], bp->slowpath->wb_data[3]);
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mutex_lock(&bp->dmae_mutex);
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*wb_comp = 0;
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bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
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bnx2x_post_dmae(bp, &dmae, INIT_DMAE_C(bp));
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udelay(5);
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@ -276,7 +276,7 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
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void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
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{
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struct dmae_command *dmae = &bp->init_dmae;
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struct dmae_command dmae;
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u32 *wb_comp = bnx2x_sp(bp, wb_comp);
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int cnt = 200;
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@ -291,41 +291,41 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)
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return;
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}
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mutex_lock(&bp->dmae_mutex);
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memset(&dmae, 0, sizeof(struct dmae_command));
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memset(bnx2x_sp(bp, wb_data[0]), 0, sizeof(u32) * 4);
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memset(dmae, 0, sizeof(struct dmae_command));
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dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
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DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
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DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
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dmae.opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
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DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
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DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
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#ifdef __BIG_ENDIAN
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DMAE_CMD_ENDIANITY_B_DW_SWAP |
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DMAE_CMD_ENDIANITY_B_DW_SWAP |
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#else
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DMAE_CMD_ENDIANITY_DW_SWAP |
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DMAE_CMD_ENDIANITY_DW_SWAP |
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#endif
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(BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
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(BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
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dmae->src_addr_lo = src_addr >> 2;
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dmae->src_addr_hi = 0;
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dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_data));
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dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));
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dmae->len = len32;
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dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_comp));
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dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_comp));
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dmae->comp_val = DMAE_COMP_VAL;
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(BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
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(BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
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dmae.src_addr_lo = src_addr >> 2;
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dmae.src_addr_hi = 0;
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dmae.dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_data));
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dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));
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dmae.len = len32;
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dmae.comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, wb_comp));
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dmae.comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_comp));
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dmae.comp_val = DMAE_COMP_VAL;
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DP(BNX2X_MSG_OFF, "DMAE: opcode 0x%08x\n"
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DP_LEVEL "src_addr [%x:%08x] len [%d *4] "
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"dst_addr [%x:%08x (%08x)]\n"
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DP_LEVEL "comp_addr [%x:%08x] comp_val 0x%08x\n",
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dmae->opcode, dmae->src_addr_hi, dmae->src_addr_lo,
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dmae->len, dmae->dst_addr_hi, dmae->dst_addr_lo, src_addr,
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dmae->comp_addr_hi, dmae->comp_addr_lo, dmae->comp_val);
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dmae.opcode, dmae.src_addr_hi, dmae.src_addr_lo,
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dmae.len, dmae.dst_addr_hi, dmae.dst_addr_lo, src_addr,
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dmae.comp_addr_hi, dmae.comp_addr_lo, dmae.comp_val);
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mutex_lock(&bp->dmae_mutex);
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memset(bnx2x_sp(bp, wb_data[0]), 0, sizeof(u32) * 4);
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*wb_comp = 0;
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bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
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bnx2x_post_dmae(bp, &dmae, INIT_DMAE_C(bp));
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udelay(5);
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