Merge branch 'at91' into devel
This commit is contained in:
Linus Walleij
commit
5f007db68c
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@ -7,6 +7,12 @@ PIT Timer required properties:
|
|||
- interrupts: Should contain interrupt for the PIT which is the IRQ line
|
||||
shared across all System Controller members.
|
||||
|
||||
System Timer (ST) required properties:
|
||||
- compatible: Should be "atmel,at91rm9200-st"
|
||||
- reg: Should contain registers location and length
|
||||
- interrupts: Should contain interrupt for the ST which is the IRQ line
|
||||
shared across all System Controller members.
|
||||
|
||||
TC/TCLIB Timer required properties:
|
||||
- compatible: Should be "atmel,<chip>-tcb".
|
||||
<chip> can be "at91rm9200" or "at91sam9x5"
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||||
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|||
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@ -84,8 +84,13 @@ Required properties for pin configuration node:
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|||
The PERIPH 0 means gpio.
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||||
|
||||
Bits used for CONFIG:
|
||||
PULL_UP(1 << 0): indicate this pin need a pull up.
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||||
MULTIDRIVE(1 << 1): indicate this pin need to be configured as multidrive.
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||||
PULL_UP (1 << 0): indicate this pin need a pull up.
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||||
MULTIDRIVE (1 << 1): indicate this pin need to be configured as multidrive.
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||||
DEGLITCH (1 << 2): indicate this pin need deglitch.
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||||
PULL_DOWN (1 << 3): indicate this pin need a pull down.
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||||
DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
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||||
DEBOUNCE (1 << 16): indicate this pin need debounce.
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DEBOUNCE_VAL (0x3fff << 17): debounce val.
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||||
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NOTE:
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Some requirements for using atmel,at91rm9200-pinctrl binding:
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@ -1,7 +1,10 @@
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ifeq ($(CONFIG_OF),y)
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# Keep at91 dtb files sorted alphabetically for each SoC
|
||||
# rm9200
|
||||
dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
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||||
# sam9260
|
||||
dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
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dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
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||||
dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
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||||
dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
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||||
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@ -19,6 +22,7 @@ dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
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|||
dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
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||||
# sam9g45
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||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
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||||
dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
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||||
# sam9n12
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||||
dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
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||||
# sam9x5
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||||
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@ -0,0 +1,178 @@
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|||
/*
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||||
* animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
|
||||
*
|
||||
* Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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||||
*
|
||||
* Licensed under GPLv2 only.
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||||
*/
|
||||
|
||||
/dts-v1/;
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||||
/include/ "at91sam9260.dtsi"
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||||
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/ {
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||||
model = "Somfy Animeo IP";
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||||
compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
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||||
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||||
aliases {
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||||
serial0 = &usart1;
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||||
serial1 = &usart2;
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||||
serial2 = &usart0;
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||||
serial3 = &dbgu;
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serial4 = &usart3;
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serial5 = &uart0;
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serial6 = &uart1;
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||||
};
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chosen {
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||||
linux,stdout-path = &usart2;
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};
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memory {
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reg = <0x20000000 0x4000000>;
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};
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||||
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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main_clock: clock@0 {
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compatible = "atmel,osc", "fixed-clock";
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clock-frequency = <18432000>;
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};
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};
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ahb {
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apb {
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usart0: serial@fffb0000 {
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pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
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linux,rs485-enabled-at-boot-time;
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||||
status = "okay";
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};
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usart1: serial@fffb4000 {
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pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
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||||
linux,rs485-enabled-at-boot-time;
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||||
status = "okay";
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||||
};
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usart2: serial@fffb8000 {
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pinctrl-0 = <&pinctrl_usart2>;
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||||
status = "okay";
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||||
};
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||||
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macb0: ethernet@fffc4000 {
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||||
pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
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||||
phy-mode = "mii";
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status = "okay";
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||||
};
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||||
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||||
mmc0: mmc@fffa8000 {
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||||
pinctrl-0 = <&pinctrl_mmc0_clk
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||||
&pinctrl_mmc0_slot1_cmd_dat0
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||||
&pinctrl_mmc0_slot1_dat1_3>;
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||||
status = "okay";
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||||
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||||
slot@1 {
|
||||
reg = <1>;
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||||
bus-width = <4>;
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||||
};
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||||
};
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||||
};
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||||
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||||
nand0: nand@40000000 {
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||||
nand-bus-width = <8>;
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||||
nand-ecc-mode = "soft";
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||||
nand-on-flash-bbt;
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||||
status = "okay";
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||||
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||||
at91bootstrap@0 {
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||||
label = "at91bootstrap";
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||||
reg = <0x0 0x8000>;
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||||
};
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||||
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||||
barebox@8000 {
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||||
label = "barebox";
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||||
reg = <0x8000 0x40000>;
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||||
};
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||||
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||||
bareboxenv@48000 {
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||||
label = "bareboxenv";
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||||
reg = <0x48000 0x8000>;
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||||
};
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user_block@0x50000 {
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label = "user_block";
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||||
reg = <0x50000 0xb0000>;
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||||
};
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||||
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kernel@100000 {
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label = "kernel";
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reg = <0x100000 0x1b0000>;
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||||
};
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||||
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root@2b0000 {
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||||
label = "root";
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||||
reg = <0x2b0000 0x1D50000>;
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||||
};
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||||
};
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||||
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||||
usb0: ohci@00500000 {
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||||
num-ports = <2>;
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||||
atmel,vbus-gpio = <&pioB 15 1>;
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||||
status = "okay";
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||||
};
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||||
};
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||||
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||||
leds {
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||||
compatible = "gpio-leds";
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||||
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||||
power_green {
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||||
label = "power_green";
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||||
gpios = <&pioC 17 0>;
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||||
linux,default-trigger = "heartbeat";
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||||
};
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||||
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||||
power_red {
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||||
label = "power_red";
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gpios = <&pioA 2 0>;
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||||
};
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||||
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tx_green {
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||||
label = "tx_green";
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||||
gpios = <&pioC 19 0>;
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||||
};
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||||
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||||
tx_red {
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||||
label = "tx_red";
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||||
gpios = <&pioC 18 0>;
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||||
};
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||||
};
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||||
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||||
gpio_keys {
|
||||
compatible = "gpio-keys";
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
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||||
keyswitch_in {
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||||
label = "keyswitch_in";
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||||
gpios = <&pioB 1 0>;
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||||
linux,code = <28>;
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||||
gpio-key,wakeup;
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||||
};
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||||
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||||
error_in {
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||||
label = "error_in";
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||||
gpios = <&pioB 2 0>;
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||||
linux,code = <29>;
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||||
gpio-key,wakeup;
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||||
};
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||||
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||||
btn {
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label = "btn";
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gpios = <&pioC 23 0>;
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||||
linux,code = <31>;
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gpio-key,wakeup;
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||||
};
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};
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||||
};
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@ -0,0 +1,349 @@
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/*
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* at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
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||||
*
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||||
* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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||||
* 2012 Joachim Eastwood <manabian@gmail.com>
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||||
*
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||||
* Based on at91sam9260.dtsi
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*
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||||
* Licensed under GPLv2 or later.
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||||
*/
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||||
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||||
/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91RM9200 family SoC";
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compatible = "atmel,at91rm9200";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm920t";
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};
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};
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memory {
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reg = <0x20000000 0x04000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <25 26 27 28 29 30 31>;
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};
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ramc0: ramc@ffffff00 {
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compatible = "atmel,at91rm9200-sdramc";
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||||
reg = <0xffffff00 0x100>;
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};
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||||
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pmc: pmc@fffffc00 {
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||||
compatible = "atmel,at91rm9200-pmc";
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||||
reg = <0xfffffc00 0x100>;
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};
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st: timer@fffffd00 {
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compatible = "atmel,at91rm9200-st";
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reg = <0xfffffd00 0x100>;
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interrupts = <1 4 7>;
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};
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||||
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||||
tcb0: timer@fffa0000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa0000 0x100>;
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||||
interrupts = <17 4 0 18 4 0 19 4 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa4000 0x100>;
|
||||
interrupts = <20 4 0 21 4 0 22 4 0>;
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffffffff /* pioA */
|
||||
0xffffffff 0x083fffff /* pioB */
|
||||
0xffff3fff 0x00000000 /* pioC */
|
||||
0x03ff87ff 0x0fffff80 /* pioD */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<0 30 0x1 0x0 /* PA30 periph A */
|
||||
0 31 0x1 0x1>; /* PA31 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 17 0x1 0x0 /* PA17 periph A */
|
||||
0 18 0x1 0x0>; /* PA18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts: uart0_rts-0 {
|
||||
atmel,pins =
|
||||
<0 20 0x1 0x0>; /* PA20 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_cts: uart0_cts-0 {
|
||||
atmel,pins =
|
||||
<0 21 0x1 0x0>; /* PA21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<1 20 0x1 0x1 /* PB20 periph A with pullup */
|
||||
1 21 0x1 0x0>; /* PB21 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts: uart1_rts-0 {
|
||||
atmel,pins =
|
||||
<1 24 0x1 0x0>; /* PB24 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_cts: uart1_cts-0 {
|
||||
atmel,pins =
|
||||
<1 26 0x1 0x0>; /* PB26 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x0 /* PB19 periph A */
|
||||
1 25 0x1 0x0>; /* PB25 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_dcd: uart1_dcd-0 {
|
||||
atmel,pins =
|
||||
<1 23 0x1 0x0>; /* PB23 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_ri: uart1_ri-0 {
|
||||
atmel,pins =
|
||||
<1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<0 22 0x1 0x0 /* PA22 periph A */
|
||||
0 23 0x1 0x1>; /* PA23 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
atmel,pins =
|
||||
<0 30 0x2 0x0>; /* PA30 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
atmel,pins =
|
||||
<0 31 0x2 0x0>; /* PA31 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<0 5 0x2 0x1 /* PA5 periph B with pullup */
|
||||
0 6 0x2 0x0>; /* PA6 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts: uart3_rts-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_cts: uart3_cts-0 {
|
||||
atmel,pins =
|
||||
<1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
|
||||
1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 4 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fffc0000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc0000 0x200>;
|
||||
interrupts = <6 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fffc4000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc4000 0x200>;
|
||||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fffc8000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc8000 0x200>;
|
||||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fffcc000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffcc000 0x200>;
|
||||
interrupts = <23 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: gadget@fffb0000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfffb0000 0x4000>;
|
||||
interrupts = <11 4 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
nand-ecc-mode = "soft";
|
||||
gpios = <&pioC 2 0
|
||||
0
|
||||
&pioB 1 0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00300000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00300000 0x100000>;
|
||||
interrupts = <23 4 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 0 /* sda */
|
||||
&pioA 24 0 /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
|
||||
*
|
||||
* Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 only
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91rm9200.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91RM9200 evaluation kit";
|
||||
compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffc4000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_uart1
|
||||
&pinctrl_uart1_rts
|
||||
&pinctrl_uart1_cts
|
||||
&pinctrl_uart1_dtr_dsr
|
||||
&pinctrl_uart1_dcd
|
||||
&pinctrl_uart1_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: gadget@fffb0000 {
|
||||
atmel,vbus-gpio = <&pioD 4 0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00300000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds2 {
|
||||
label = "green";
|
||||
gpios = <&pioB 0 0x1>;
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
ds4 {
|
||||
label = "yellow";
|
||||
gpios = <&pioB 1 0x1>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
ds6 {
|
||||
label = "red";
|
||||
gpios = <&pioB 2 0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -21,8 +21,8 @@
|
|||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
serial5 = &usart4;
|
||||
serial6 = &usart5;
|
||||
serial5 = &uart0;
|
||||
serial6 = &uart1;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
|
|
@ -120,88 +120,104 @@
|
|||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<1 4 0x1 0x0 /* PB4 periph A */
|
||||
1 5 0x1 0x0>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<1 26 0x1 0x0 /* PB26 periph A */
|
||||
1 27 0x1 0x0>; /* PB27 periph A */
|
||||
<1 26 0x1 0x0>; /* PB26 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<1 27 0x1 0x0>; /* PB27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<1 24 0x1 0x0 /* PB24 periph A */
|
||||
1 22 0x1 0x0>; /* PB22 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_dcd: uart0_dcd-0 {
|
||||
pinctrl_usart0_dcd: usart0_dcd-0 {
|
||||
atmel,pins =
|
||||
<1 23 0x1 0x0>; /* PB23 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_ri: uart0_ri-0 {
|
||||
pinctrl_usart0_ri: usart0_ri-0 {
|
||||
atmel,pins =
|
||||
<1 25 0x1 0x0>; /* PB25 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<2 6 0x1 0x1 /* PB6 periph A with pullup */
|
||||
2 7 0x1 0x0>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<1 28 0x1 0x0 /* PB28 periph A */
|
||||
1 29 0x1 0x0>; /* PB29 periph A */
|
||||
<1 28 0x1 0x0>; /* PB28 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<1 29 0x1 0x0>; /* PB29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x1 /* PB8 periph A with pullup */
|
||||
1 9 0x1 0x0>; /* PB9 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<0 4 0x1 0x0 /* PA4 periph A */
|
||||
0 5 0x1 0x0>; /* PA5 periph A */
|
||||
<0 4 0x1 0x0>; /* PA4 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<0 5 0x1 0x0>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<2 10 0x1 0x1 /* PB10 periph A with pullup */
|
||||
2 11 0x1 0x0>; /* PB11 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x2 0x0 /* PB8 periph B */
|
||||
3 10 0x2 0x0>; /* PB10 periph B */
|
||||
<3 8 0x2 0x0>; /* PB8 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<3 10 0x2 0x0>; /* PB10 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart4 {
|
||||
pinctrl_uart4: uart4-0 {
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 31 0x2 0x1 /* PA31 periph B with pullup */
|
||||
0 30 0x2 0x0>; /* PA30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart5 {
|
||||
pinctrl_uart5: uart5-0 {
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<2 12 0x1 0x1 /* PB12 periph A with pullup */
|
||||
2 13 0x1 0x0>; /* PB13 periph A */
|
||||
|
|
@ -216,6 +232,79 @@
|
|||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<0 12 0x1 0x0 /* PA12 periph A */
|
||||
0 13 0x1 0x0 /* PA13 periph A */
|
||||
0 14 0x1 0x0 /* PA14 periph A */
|
||||
0 15 0x1 0x0 /* PA15 periph A */
|
||||
0 16 0x1 0x0 /* PA16 periph A */
|
||||
0 17 0x1 0x0 /* PA17 periph A */
|
||||
0 18 0x1 0x0 /* PA18 periph A */
|
||||
0 19 0x1 0x0 /* PA19 periph A */
|
||||
0 20 0x1 0x0 /* PA20 periph A */
|
||||
0 21 0x1 0x0>; /* PA21 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<0 22 0x2 0x0 /* PA22 periph B */
|
||||
0 23 0x2 0x0 /* PA23 periph B */
|
||||
0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0 /* PA26 periph B */
|
||||
0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
|
||||
atmel,pins =
|
||||
<0 10 0x2 0x0 /* PA10 periph B */
|
||||
0 11 0x2 0x0 /* PA11 periph B */
|
||||
0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0 /* PA26 periph B */
|
||||
0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<0 8 0x1 0x0>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 7 0x1 0x1 /* PA7 periph A with pullup */
|
||||
0 6 0x1 0x1>; /* PA6 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 9 0x1 0x1 /* PA9 periph A with pullup */
|
||||
0 10 0x1 0x1 /* PA10 periph A with pullup */
|
||||
0 11 0x1 0x1>; /* PA11 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x2 0x1 /* PA1 periph B with pullup */
|
||||
0 0 0x2 0x1>; /* PA0 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 5 0x2 0x1 /* PA5 periph B with pullup */
|
||||
0 4 0x2 0x1 /* PA4 periph B with pullup */
|
||||
0 3 0x2 0x1>; /* PA3 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
|
@ -263,7 +352,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -274,7 +363,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -285,7 +374,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -296,29 +385,29 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart4: serial@fffd4000 {
|
||||
uart0: serial@fffd4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd4000 0x200>;
|
||||
interrupts = <24 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart5: serial@fffd8000 {
|
||||
uart1: serial@fffd8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd8000 0x200>;
|
||||
interrupts = <25 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -326,6 +415,8 @@
|
|||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffc4000 0x100>;
|
||||
interrupts = <21 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -345,6 +436,15 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffa8000 0x600>;
|
||||
interrupts = <9 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@fffe0000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xfffe0000 0x100>;
|
||||
|
|
|
|||
|
|
@ -113,45 +113,57 @@
|
|||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<0 26 0x1 0x1 /* PA26 periph A with pullup */
|
||||
0 27 0x1 0x0>; /* PA27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<0 28 0x1 0x0 /* PA28 periph A */
|
||||
0 29 0x1 0x0>; /* PA29 periph A */
|
||||
<0 28 0x1 0x0>; /* PA28 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<0 29 0x1 0x0>; /* PA29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<3 0 0x1 0x1 /* PD0 periph A with pullup */
|
||||
3 1 0x1 0x0>; /* PD1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<3 7 0x2 0x0 /* PD7 periph B */
|
||||
3 8 0x2 0x0>; /* PD8 periph B */
|
||||
<3 7 0x2 0x0>; /* PD7 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x2 0x0>; /* PD8 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<3 2 0x1 0x1 /* PD2 periph A with pullup */
|
||||
3 3 0x1 0x0>; /* PD3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<3 5 0x2 0x0 /* PD5 periph B */
|
||||
4 6 0x2 0x0>; /* PD6 periph B */
|
||||
<3 5 0x2 0x0>; /* PD5 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<4 6 0x2 0x0>; /* PD6 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -163,6 +175,100 @@
|
|||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<2 25 0x2 0x0 /* PC25 periph B */
|
||||
4 21 0x1 0x0 /* PE21 periph A */
|
||||
4 23 0x1 0x0 /* PE23 periph A */
|
||||
4 24 0x1 0x0 /* PE24 periph A */
|
||||
4 25 0x1 0x0 /* PE25 periph A */
|
||||
4 26 0x1 0x0 /* PE26 periph A */
|
||||
4 27 0x1 0x0 /* PE27 periph A */
|
||||
4 28 0x1 0x0 /* PE28 periph A */
|
||||
4 29 0x1 0x0 /* PE29 periph A */
|
||||
4 30 0x1 0x0>; /* PE30 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<2 20 0x2 0x0 /* PC20 periph B */
|
||||
2 21 0x2 0x0 /* PC21 periph B */
|
||||
2 22 0x2 0x0 /* PC22 periph B */
|
||||
2 23 0x2 0x0 /* PC23 periph B */
|
||||
2 24 0x2 0x0 /* PC24 periph B */
|
||||
2 25 0x2 0x0 /* PC25 periph B */
|
||||
2 27 0x2 0x0 /* PC27 periph B */
|
||||
4 22 0x2 0x0>; /* PE22 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<0 12 0x1 0x0>; /* PA12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x1 0x1 /* PA1 periph A with pullup */
|
||||
0 0 0x1 0x1>; /* PA0 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 3 0x1 0x1 /* PA3 periph A with pullup */
|
||||
0 4 0x1 0x1 /* PA4 periph A with pullup */
|
||||
0 5 0x1 0x1>; /* PA5 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 16 0x1 0x1 /* PA16 periph A with pullup */
|
||||
0 17 0x1 0x1>; /* PA17 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 18 0x1 0x1 /* PA18 periph A with pullup */
|
||||
0 19 0x1 0x1 /* PA19 periph A with pullup */
|
||||
0 20 0x1 0x1>; /* PA20 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_clk: mmc1_clk-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x1 0x0>; /* PA6 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 7 0x1 0x1 /* PA7 periph A with pullup */
|
||||
0 8 0x1 0x1>; /* PA8 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 9 0x1 0x1 /* PA9 periph A with pullup */
|
||||
0 10 0x1 0x1 /* PA10 periph A with pullup */
|
||||
0 11 0x1 0x1>; /* PA11 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 21 0x1 0x1 /* PA21 periph A with pullup */
|
||||
0 22 0x1 0x1>; /* PA22 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 23 0x1 0x1 /* PA23 periph A with pullup */
|
||||
0 24 0x1 0x1 /* PA24 periph A with pullup */
|
||||
0 25 0x1 0x1>; /* PA25 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
|
@ -230,7 +336,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -241,7 +347,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -252,7 +358,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -260,6 +366,8 @@
|
|||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffbc000 0x100>;
|
||||
interrupts = <21 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -278,6 +386,24 @@
|
|||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff80000 0x600>;
|
||||
interrupts = <10 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@fff84000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff84000 0x600>;
|
||||
interrupts = <11 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -38,7 +38,10 @@
|
|||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>;
|
||||
pinctrl-0 = <
|
||||
&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -51,6 +54,31 @@
|
|||
atmel,vbus-gpio = <&pioA 25 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 18 0>;
|
||||
wp-gpios = <&pioE 19 0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */
|
||||
5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -12,6 +12,32 @@
|
|||
model = "Atmel at91sam9g20ek 2 mmc";
|
||||
compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb{
|
||||
mmc0: mmc@fffa8000 {
|
||||
/* clk already mux wuth slot0 */
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0_slot0
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioC 2 0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0_slot0 {
|
||||
pinctrl_board_mmc0_slot0: mmc0_slot0-board {
|
||||
atmel,pins =
|
||||
<2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
|
|
|
|||
|
|
@ -36,11 +36,12 @@
|
|||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_uart0
|
||||
&pinctrl_uart0_rts_cts
|
||||
&pinctrl_uart0_dtr_dsr
|
||||
&pinctrl_uart0_dcd
|
||||
&pinctrl_uart0_ri>;
|
||||
<&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts
|
||||
&pinctrl_usart0_dtr_dsr
|
||||
&pinctrl_usart0_dcd
|
||||
&pinctrl_usart0_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -57,6 +58,29 @@
|
|||
atmel,vbus-gpio = <&pioC 5 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0_slot1
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot1_cmd_dat0
|
||||
&pinctrl_mmc0_slot1_dat1_3>;
|
||||
status = "okay";
|
||||
slot@1 {
|
||||
reg = <1>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioC 9 0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0_slot1 {
|
||||
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
|
||||
atmel,pins =
|
||||
<2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -132,59 +132,75 @@
|
|||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x1 /* PB19 periph A with pullup */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<1 17 0x2 0x0 /* PB17 periph B */
|
||||
1 15 0x2 0x0>; /* PB15 periph B */
|
||||
<1 17 0x2 0x0>; /* PB17 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<1 15 0x2 0x0>; /* PB15 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<1 4 0x1 0x1 /* PB4 periph A with pullup */
|
||||
1 5 0x1 0x0>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x1 0x0 /* PD16 periph A */
|
||||
3 17 0x1 0x0>; /* PD17 periph A */
|
||||
<3 16 0x1 0x0>; /* PD16 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<3 17 0x1 0x0>; /* PD17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x1 /* PB6 periph A with pullup */
|
||||
1 7 0x1 0x0>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x2 0x0 /* PC9 periph B */
|
||||
2 11 0x2 0x0>; /* PC11 periph B */
|
||||
<2 9 0x2 0x0>; /* PC9 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<2 11 0x2 0x0>; /* PC11 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x1 /* PB9 periph A with pullup */
|
||||
1 9 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<0 23 0x2 0x0 /* PA23 periph B */
|
||||
0 24 0x2 0x0>; /* PA24 periph B */
|
||||
<0 23 0x2 0x0>; /* PA23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0>; /* PA24 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -196,6 +212,82 @@
|
|||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<0 10 0x1 0x0 /* PA10 periph A */
|
||||
0 11 0x1 0x0 /* PA11 periph A */
|
||||
0 12 0x1 0x0 /* PA12 periph A */
|
||||
0 13 0x1 0x0 /* PA13 periph A */
|
||||
0 14 0x1 0x0 /* PA14 periph A */
|
||||
0 15 0x1 0x0 /* PA15 periph A */
|
||||
0 16 0x1 0x0 /* PA16 periph A */
|
||||
0 17 0x1 0x0 /* PA17 periph A */
|
||||
0 18 0x1 0x0 /* PA18 periph A */
|
||||
0 19 0x1 0x0>; /* PA19 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x2 0x0 /* PA6 periph B */
|
||||
0 7 0x2 0x0 /* PA7 periph B */
|
||||
0 8 0x2 0x0 /* PA8 periph B */
|
||||
0 9 0x2 0x0 /* PA9 periph B */
|
||||
0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0 /* PA29 periph B */
|
||||
0 30 0x2 0x0>; /* PA30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x1 0x0 /* PA0 periph A */
|
||||
0 1 0x1 0x1 /* PA1 periph A with pullup */
|
||||
0 2 0x1 0x1>; /* PA2 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 3 0x1 0x1 /* PA3 periph A with pullup */
|
||||
0 4 0x1 0x1 /* PA4 periph A with pullup */
|
||||
0 5 0x1 0x1>; /* PA5 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x1 0x1 /* PA6 periph A with pullup */
|
||||
0 7 0x1 0x1 /* PA7 periph A with pullup */
|
||||
0 8 0x1 0x1 /* PA8 periph A with pullup */
|
||||
0 9 0x1 0x1>; /* PA9 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 31 0x1 0x0 /* PA31 periph A */
|
||||
0 22 0x1 0x1 /* PA22 periph A with pullup */
|
||||
0 23 0x1 0x1>; /* PA23 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x1 0x1 /* PA24 periph A with pullup */
|
||||
0 25 0x1 0x1 /* PA25 periph A with pullup */
|
||||
0 26 0x1 0x1>; /* PA26 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x1 0x1 /* PA27 periph A with pullup */
|
||||
0 28 0x1 0x1 /* PA28 periph A with pullup */
|
||||
0 29 0x1 0x1 /* PA29 periph A with pullup */
|
||||
0 20 0x1 0x1>; /* PA30 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
|
@ -263,7 +355,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -274,7 +366,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -285,7 +377,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -296,7 +388,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -304,6 +396,8 @@
|
|||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffbc000 0x100>;
|
||||
interrupts = <25 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -361,6 +455,24 @@
|
|||
trigger-value = <0x6>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff80000 0x600>;
|
||||
interrupts = <11 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@fffd0000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffd0000 0x600>;
|
||||
interrupts = <29 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -39,7 +39,10 @@
|
|||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>;
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart1
|
||||
&pinctrl_usart1_rts
|
||||
&pinctrl_usart1_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -55,6 +58,50 @@
|
|||
i2c1: i2c@fff88000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 10 0>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@fffd0000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc1
|
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc1_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 11 0>;
|
||||
wp-gpios = <&pioD 29 0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_board_mmc1: mmc1-board {
|
||||
atmel,pins =
|
||||
<3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */
|
||||
3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -84,6 +84,15 @@
|
|||
reg = <0xfffffe10 0x10>;
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
interrupts = <12 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
|
|
@ -125,66 +134,78 @@
|
|||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x1 0x1 /* PA1 periph A with pullup */
|
||||
0 0 0x1 0x0>; /* PA0 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x1 0x0 /* PA2 periph A */
|
||||
0 3 0x1 0x0>; /* PA3 periph A */
|
||||
<0 2 0x1 0x0>; /* PA2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x1 0x1 /* PA6 periph A with pullup */
|
||||
0 5 0x1 0x0>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<0 8 0x1 0x1 /* PA8 periph A with pullup */
|
||||
0 7 0x1 0x0>; /* PA7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0>; /* PB1 periph B */
|
||||
<1 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<2 23 0x2 0x1 /* PC23 periph B with pullup */
|
||||
2 22 0x2 0x0>; /* PC22 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<2 24 0x2 0x0 /* PC24 periph B */
|
||||
2 25 0x2 0x0>; /* PC25 periph B */
|
||||
<2 24 0x2 0x0>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x3 0x1 /* PC9 periph C with pullup */
|
||||
2 8 0x3 0x0>; /* PC8 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<2 16 0x3 0x1 /* PC17 periph C with pullup */
|
||||
2 17 0x3 0x0>; /* PC16 periph C */
|
||||
|
|
@ -199,6 +220,30 @@
|
|||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 17 0x1 0x0 /* PA17 periph A */
|
||||
0 16 0x1 0x1 /* PA16 periph A with pullup */
|
||||
0 15 0x1 0x1>; /* PA15 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 18 0x1 0x1 /* PA18 periph A with pullup */
|
||||
0 19 0x1 0x1 /* PA19 periph A with pullup */
|
||||
0 20 0x1 0x1>; /* PA20 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<0 11 0x2 0x1 /* PA11 periph B with pullup */
|
||||
0 12 0x2 0x1 /* PA12 periph B with pullup */
|
||||
0 13 0x2 0x1 /* PA13 periph B with pullup */
|
||||
0 14 0x2 0x1>; /* PA14 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
|
@ -256,7 +301,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -267,7 +312,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -278,7 +323,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -289,7 +334,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,28 @@
|
|||
i2c1: i2c@f8014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioA 7 0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
|
|
|||
|
|
@ -22,6 +22,27 @@
|
|||
0x80000000 0xfffd0000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
|
||||
macb1 {
|
||||
pinctrl_macb1_rmii: macb1_rmii-0 {
|
||||
atmel,pins =
|
||||
<2 16 0x2 0x0 /* PC16 periph B */
|
||||
2 18 0x2 0x0 /* PC18 periph B */
|
||||
2 19 0x2 0x0 /* PC19 periph B */
|
||||
2 20 0x2 0x0 /* PC20 periph B */
|
||||
2 21 0x2 0x0 /* PC21 periph B */
|
||||
2 27 0x2 0x0 /* PC27 periph B */
|
||||
2 28 0x2 0x0 /* PC28 periph B */
|
||||
2 29 0x2 0x0 /* PC29 periph B */
|
||||
2 30 0x2 0x0 /* PC30 periph B */
|
||||
2 31 0x2 0x0>; /* PC31 periph B */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
macb1: ethernet@f8030000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb1_rmii>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -126,72 +126,88 @@
|
|||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x1 0x1 /* PA0 periph A with pullup */
|
||||
0 1 0x1 0x0>; /* PA1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x1 0x0 /* PA2 periph A */
|
||||
0 3 0x1 0x0>; /* PA3 periph A */
|
||||
<0 2 0x1 0x0>; /* PA2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<0 5 0x1 0x1 /* PA5 periph A with pullup */
|
||||
0 6 0x1 0x0>; /* PA6 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<3 27 0x3 0x0 /* PC27 periph C */
|
||||
3 28 0x3 0x0>; /* PC28 periph C */
|
||||
<3 27 0x3 0x0>; /* PC27 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<3 28 0x3 0x0>; /* PC28 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<0 7 0x1 0x1 /* PA7 periph A with pullup */
|
||||
0 8 0x1 0x0>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x2 0x0 /* PB0 periph B */
|
||||
0 1 0x2 0x0>; /* PB1 periph B */
|
||||
<0 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
usart3 {
|
||||
pinctrl_uart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<3 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
3 23 0x2 0x0>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<3 24 0x2 0x0 /* PC24 periph B */
|
||||
3 25 0x2 0x0>; /* PC25 periph B */
|
||||
<3 24 0x2 0x0>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<3 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x3 0x0 /* PC8 periph C */
|
||||
3 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x3 0x0 /* PC16 periph C */
|
||||
3 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
|
|
@ -206,6 +222,66 @@
|
|||
};
|
||||
};
|
||||
|
||||
macb0 {
|
||||
pinctrl_macb0_rmii: macb0_rmii-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x1 0x0 /* PB0 periph A */
|
||||
1 1 0x1 0x0 /* PB1 periph A */
|
||||
1 2 0x1 0x0 /* PB2 periph A */
|
||||
1 3 0x1 0x0 /* PB3 periph A */
|
||||
1 4 0x1 0x0 /* PB4 periph A */
|
||||
1 5 0x1 0x0 /* PB5 periph A */
|
||||
1 6 0x1 0x0 /* PB6 periph A */
|
||||
1 7 0x1 0x0 /* PB7 periph A */
|
||||
1 9 0x1 0x0 /* PB9 periph A */
|
||||
1 10 0x1 0x0>; /* PB10 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x0 /* PA8 periph A */
|
||||
1 11 0x1 0x0 /* PA11 periph A */
|
||||
1 12 0x1 0x0 /* PA12 periph A */
|
||||
1 13 0x1 0x0 /* PA13 periph A */
|
||||
1 14 0x1 0x0 /* PA14 periph A */
|
||||
1 15 0x1 0x0 /* PA15 periph A */
|
||||
1 16 0x1 0x0 /* PA16 periph A */
|
||||
1 17 0x1 0x0>; /* PA17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 17 0x1 0x0 /* PA17 periph A */
|
||||
0 16 0x1 0x1 /* PA16 periph A with pullup */
|
||||
0 15 0x1 0x1>; /* PA15 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 18 0x1 0x1 /* PA18 periph A with pullup */
|
||||
0 19 0x1 0x1 /* PA19 periph A with pullup */
|
||||
0 20 0x1 0x1>; /* PA20 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<0 13 0x2 0x0 /* PA13 periph B */
|
||||
0 12 0x2 0x1 /* PA12 periph B with pullup */
|
||||
0 11 0x2 0x1>; /* PA11 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x2 0x1 /* PA2 periph B with pullup */
|
||||
0 3 0x2 0x1 /* PA3 periph B with pullup */
|
||||
0 4 0x2 0x1>; /* PA4 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
|
@ -249,6 +325,24 @@
|
|||
};
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
interrupts = <12 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@f000c000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf000c000 0x600>;
|
||||
interrupts = <26 4 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
|
@ -265,7 +359,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -276,7 +370,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -287,7 +381,7 @@
|
|||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -295,6 +389,8 @@
|
|||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xf802c000 0x100>;
|
||||
interrupts = <24 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -18,6 +18,32 @@
|
|||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 15 0>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@f000c000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc1
|
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc1_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 14 0>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -42,6 +68,22 @@
|
|||
i2c2: i2c@f8018000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_board_mmc1: mmc1-board {
|
||||
atmel,pins =
|
||||
<3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
/*
|
||||
* pm9g45.dts - Device Tree file for Ronetix pm9g45 board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g45.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Ronetix pm9g45";
|
||||
compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
|
||||
board {
|
||||
pinctrl_board_nand: nand0-board {
|
||||
atmel,pins =
|
||||
<3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
|
||||
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
mmc {
|
||||
pinctrl_board_mmc: mmc0-board {
|
||||
atmel,pins =
|
||||
<3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 6 0>;
|
||||
};
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
pinctrl-0 = <&pinctrl_board_nand>;
|
||||
|
||||
gpios = <&pioD 3 0
|
||||
&pioC 14 0
|
||||
0
|
||||
>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x1A0000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x200000 0x300000>;
|
||||
};
|
||||
|
||||
kernel@500000 {
|
||||
label = "root";
|
||||
reg = <0x500000 0x400000>;
|
||||
};
|
||||
|
||||
data@900000 {
|
||||
label = "data";
|
||||
reg = <0x900000 0x8340000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00700000 {
|
||||
status = "okay";
|
||||
num-ports = <2>;
|
||||
};
|
||||
|
||||
usb1: ehci@00800000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "led0";
|
||||
gpios = <&pioD 0 1>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "led1";
|
||||
gpios = <&pioD 31 0>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
right {
|
||||
label = "SW4";
|
||||
gpios = <&pioE 7 1>;
|
||||
linux,code = <106>;
|
||||
};
|
||||
|
||||
up {
|
||||
label = "SW3";
|
||||
gpios = <&pioE 8 1>;
|
||||
linux,code = <103>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -494,8 +494,17 @@ endif
|
|||
|
||||
comment "Generic Board Type"
|
||||
|
||||
config MACH_AT91RM9200_DT
|
||||
bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
|
||||
depends on SOC_AT91RM9200
|
||||
select USE_OF
|
||||
help
|
||||
Select this if you want to experiment device-tree with
|
||||
an Atmel RM9200 Evaluation Kit.
|
||||
|
||||
config MACH_AT91SAM_DT
|
||||
bool "Atmel AT91SAM Evaluation Kits with device-tree support"
|
||||
depends on SOC_AT91SAM9
|
||||
select USE_OF
|
||||
help
|
||||
Select this if you want to experiment device-tree with
|
||||
|
|
|
|||
|
|
@ -88,6 +88,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
|
|||
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
|
||||
|
||||
# AT91SAM board with device-tree
|
||||
obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o
|
||||
obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
|
||||
|
||||
# AT91X40 board-specific support
|
||||
|
|
|
|||
|
|
@ -194,6 +194,24 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
CLKDEV_CON_ID("pioD", &pioD_clk),
|
||||
/* usart lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
|
||||
/* tc lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
|
|
@ -91,7 +94,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
|
|||
static struct irqaction at91rm9200_timer_irq = {
|
||||
.name = "at91_tick",
|
||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.handler = at91rm9200_timer_interrupt
|
||||
.handler = at91rm9200_timer_interrupt,
|
||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||
};
|
||||
|
||||
static cycle_t read_clk32k(struct clocksource *cs)
|
||||
|
|
@ -179,8 +183,60 @@ static struct clock_event_device clkevt = {
|
|||
void __iomem *at91_st_base;
|
||||
EXPORT_SYMBOL_GPL(at91_st_base);
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static struct of_device_id at91rm9200_st_timer_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-st" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static int __init of_at91rm9200_st_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
int ret;
|
||||
|
||||
np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
|
||||
if (!np)
|
||||
goto err;
|
||||
|
||||
at91_st_base = of_iomap(np, 0);
|
||||
if (!at91_st_base)
|
||||
goto node_err;
|
||||
|
||||
/* Get the interrupts property */
|
||||
ret = irq_of_parse_and_map(np, 0);
|
||||
if (!ret)
|
||||
goto ioremap_err;
|
||||
at91rm9200_timer_irq.irq = ret;
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
return 0;
|
||||
|
||||
ioremap_err:
|
||||
iounmap(at91_st_base);
|
||||
node_err:
|
||||
of_node_put(np);
|
||||
err:
|
||||
return -EINVAL;
|
||||
}
|
||||
#else
|
||||
static int __init of_at91rm9200_st_init(void)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init at91rm9200_ioremap_st(u32 addr)
|
||||
{
|
||||
#ifdef CONFIG_OF
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
|
||||
if (np) {
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
at91_st_base = ioremap(addr, 256);
|
||||
if (!at91_st_base)
|
||||
panic("Impossible to ioremap ST\n");
|
||||
|
|
@ -191,13 +247,16 @@ void __init at91rm9200_ioremap_st(u32 addr)
|
|||
*/
|
||||
void __init at91rm9200_timer_init(void)
|
||||
{
|
||||
/* For device tree enabled device: initialize here */
|
||||
of_at91rm9200_st_init();
|
||||
|
||||
/* Disable all timer interrupts, and clear any pending ones */
|
||||
at91_st_write(AT91_ST_IDR,
|
||||
AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
|
||||
at91_st_read(AT91_ST_SR);
|
||||
|
||||
/* Make IRQs happen for the system timer */
|
||||
setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
|
||||
setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
|
||||
|
||||
/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
|
||||
* directly for the clocksource and all clockevents, after adjusting
|
||||
|
|
|
|||
|
|
@ -230,6 +230,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
|
|
|
|||
|
|
@ -211,6 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
|
||||
|
|
|
|||
|
|
@ -256,6 +256,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
|
||||
/* fake hclk clock */
|
||||
|
|
|
|||
|
|
@ -168,6 +168,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
|
||||
|
|
|
|||
|
|
@ -229,6 +229,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
|
|
|
|||
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Setup code for AT91RM9200 Evaluation Kits with Device Tree support
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
* 2012 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include "at91_aic.h"
|
||||
#include "generic.h"
|
||||
|
||||
|
||||
static const struct of_device_id irq_of_match[] __initconst = {
|
||||
{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
|
||||
{ /*sentinel*/ }
|
||||
};
|
||||
|
||||
static void __init at91rm9200_dt_init_irq(void)
|
||||
{
|
||||
of_irq_init(irq_of_match);
|
||||
}
|
||||
|
||||
static void __init at91rm9200_dt_device_init(void)
|
||||
{
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
static const char *at91rm9200_dt_board_compat[] __initdata = {
|
||||
"atmel,at91rm9200",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
|
||||
.timer = &at91rm9200_timer,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = at91rm9200_dt_initialize,
|
||||
.init_irq = at91rm9200_dt_init_irq,
|
||||
.init_machine = at91rm9200_dt_device_init,
|
||||
.dt_compat = at91rm9200_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
|
@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base,
|
|||
extern void __init at91rm9200_set_type(int type);
|
||||
extern void __init at91_initialize(unsigned long main_clock);
|
||||
extern void __init at91x40_initialize(unsigned long main_clock);
|
||||
extern void __init at91rm9200_dt_initialize(void);
|
||||
extern void __init at91_dt_initialize(void);
|
||||
|
||||
/* Interrupts */
|
||||
|
|
|
|||
|
|
@ -339,6 +339,7 @@ static void at91_dt_rstc(void)
|
|||
}
|
||||
|
||||
static struct of_device_id ramc_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-sdramc" },
|
||||
{ .compatible = "atmel,at91sam9260-sdramc" },
|
||||
{ .compatible = "atmel,at91sam9g45-ddramc" },
|
||||
{ /*sentinel*/ }
|
||||
|
|
@ -437,6 +438,19 @@ end:
|
|||
of_node_put(np);
|
||||
}
|
||||
|
||||
void __init at91rm9200_dt_initialize(void)
|
||||
{
|
||||
at91_dt_ramc();
|
||||
|
||||
/* Init clock subsystem */
|
||||
at91_dt_clock_init();
|
||||
|
||||
/* Register the processor-specific clocks */
|
||||
at91_boot_soc.register_clocks();
|
||||
|
||||
at91_boot_soc.init();
|
||||
}
|
||||
|
||||
void __init at91_dt_initialize(void)
|
||||
{
|
||||
at91_dt_rstc();
|
||||
|
|
|
|||
|
|
@ -59,6 +59,12 @@ static int gpio_banks;
|
|||
|
||||
#define PULL_UP (1 << 0)
|
||||
#define MULTI_DRIVE (1 << 1)
|
||||
#define DEGLITCH (1 << 2)
|
||||
#define PULL_DOWN (1 << 3)
|
||||
#define DIS_SCHMIT (1 << 4)
|
||||
#define DEBOUNCE (1 << 16)
|
||||
#define DEBOUNCE_VAL_SHIFT 17
|
||||
#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
|
||||
|
||||
/**
|
||||
* struct at91_pmx_func - describes AT91 pinmux functions
|
||||
|
|
@ -122,6 +128,14 @@ struct at91_pin_group {
|
|||
* @mux_B_periph: mux as periph B
|
||||
* @mux_C_periph: mux as periph C
|
||||
* @mux_D_periph: mux as periph D
|
||||
* @get_deglitch: get deglitch status
|
||||
* @set_deglitch: enable/disable deglitch
|
||||
* @get_debounce: get debounce status
|
||||
* @set_debounce: enable/disable debounce
|
||||
* @get_pulldown: get pulldown status
|
||||
* @set_pulldown: enable/disable pulldown
|
||||
* @get_schmitt_trig: get schmitt trigger status
|
||||
* @disable_schmitt_trig: disable schmitt trigger
|
||||
* @irq_type: return irq type
|
||||
*/
|
||||
struct at91_pinctrl_mux_ops {
|
||||
|
|
@ -130,6 +144,14 @@ struct at91_pinctrl_mux_ops {
|
|||
void (*mux_B_periph)(void __iomem *pio, unsigned mask);
|
||||
void (*mux_C_periph)(void __iomem *pio, unsigned mask);
|
||||
void (*mux_D_periph)(void __iomem *pio, unsigned mask);
|
||||
bool (*get_deglitch)(void __iomem *pio, unsigned pin);
|
||||
void (*set_deglitch)(void __iomem *pio, unsigned mask, bool in_on);
|
||||
bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
|
||||
void (*set_debounce)(void __iomem *pio, unsigned mask, bool in_on, u32 div);
|
||||
bool (*get_pulldown)(void __iomem *pio, unsigned pin);
|
||||
void (*set_pulldown)(void __iomem *pio, unsigned mask, bool in_on);
|
||||
bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
|
||||
void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
|
||||
/* irq */
|
||||
int (*irq_type)(struct irq_data *d, unsigned type);
|
||||
};
|
||||
|
|
@ -386,10 +408,68 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
|
|||
return select + 1;
|
||||
}
|
||||
|
||||
static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
|
||||
{
|
||||
return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
|
||||
}
|
||||
|
||||
static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
|
||||
{
|
||||
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
|
||||
}
|
||||
|
||||
static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
|
||||
{
|
||||
if (is_on)
|
||||
__raw_writel(mask, pio + PIO_IFSCDR);
|
||||
at91_mux_set_deglitch(pio, mask, is_on);
|
||||
}
|
||||
|
||||
static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
|
||||
{
|
||||
*div = __raw_readl(pio + PIO_SCDR);
|
||||
|
||||
return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1;
|
||||
}
|
||||
|
||||
static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
|
||||
bool is_on, u32 div)
|
||||
{
|
||||
if (is_on) {
|
||||
__raw_writel(mask, pio + PIO_IFSCER);
|
||||
__raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
|
||||
__raw_writel(mask, pio + PIO_IFER);
|
||||
} else {
|
||||
__raw_writel(mask, pio + PIO_IFDR);
|
||||
}
|
||||
}
|
||||
|
||||
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
|
||||
{
|
||||
return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1;
|
||||
}
|
||||
|
||||
static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
|
||||
{
|
||||
__raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
|
||||
}
|
||||
|
||||
static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
|
||||
{
|
||||
__raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
|
||||
}
|
||||
|
||||
static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
|
||||
{
|
||||
return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
|
||||
}
|
||||
|
||||
static struct at91_pinctrl_mux_ops at91rm9200_ops = {
|
||||
.get_periph = at91_mux_get_periph,
|
||||
.mux_A_periph = at91_mux_set_A_periph,
|
||||
.mux_B_periph = at91_mux_set_B_periph,
|
||||
.get_deglitch = at91_mux_get_deglitch,
|
||||
.set_deglitch = at91_mux_set_deglitch,
|
||||
.irq_type = gpio_irq_type,
|
||||
};
|
||||
|
||||
|
|
@ -399,6 +479,14 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
|
|||
.mux_B_periph = at91_mux_pio3_set_B_periph,
|
||||
.mux_C_periph = at91_mux_pio3_set_C_periph,
|
||||
.mux_D_periph = at91_mux_pio3_set_D_periph,
|
||||
.get_deglitch = at91_mux_get_deglitch,
|
||||
.set_deglitch = at91_mux_pio3_set_deglitch,
|
||||
.get_debounce = at91_mux_pio3_get_debounce,
|
||||
.set_debounce = at91_mux_pio3_set_debounce,
|
||||
.get_pulldown = at91_mux_pio3_get_pulldown,
|
||||
.set_pulldown = at91_mux_pio3_set_pulldown,
|
||||
.get_schmitt_trig = at91_mux_pio3_get_schmitt_trig,
|
||||
.disable_schmitt_trig = at91_mux_pio3_disable_schmitt_trig,
|
||||
.irq_type = alt_gpio_irq_type,
|
||||
};
|
||||
|
||||
|
|
@ -624,6 +712,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
|
|||
struct at91_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
|
||||
void __iomem *pio;
|
||||
unsigned pin;
|
||||
int div;
|
||||
|
||||
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__, __LINE__, pin_id, *config);
|
||||
pio = pin_to_controller(info, pin_to_bank(pin_id));
|
||||
|
|
@ -635,6 +724,15 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
|
|||
if (at91_mux_get_pullup(pio, pin))
|
||||
*config |= PULL_UP;
|
||||
|
||||
if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
|
||||
*config |= DEGLITCH;
|
||||
if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
|
||||
*config |= DEBOUNCE | (div << DEBOUNCE_VAL_SHIFT);
|
||||
if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
|
||||
*config |= PULL_DOWN;
|
||||
if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
|
||||
*config |= DIS_SCHMIT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -649,8 +747,21 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
|
|||
pio = pin_to_controller(info, pin_to_bank(pin_id));
|
||||
mask = pin_to_mask(pin_id % MAX_NB_GPIO_PER_BANK);
|
||||
|
||||
if (config & PULL_UP && config & PULL_DOWN)
|
||||
return -EINVAL;
|
||||
|
||||
at91_mux_set_pullup(pio, mask, config & PULL_UP);
|
||||
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
|
||||
if (info->ops->set_deglitch)
|
||||
info->ops->set_deglitch(pio, mask, config & DEGLITCH);
|
||||
if (info->ops->set_debounce)
|
||||
info->ops->set_debounce(pio, mask, config & DEBOUNCE,
|
||||
(config & DEBOUNCE_VAL) >> DEBOUNCE_VAL_SHIFT);
|
||||
if (info->ops->set_pulldown)
|
||||
info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
|
||||
if (info->ops->disable_schmitt_trig && config & DIS_SCHMIT)
|
||||
info->ops->disable_schmitt_trig(pio, mask);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1364,9 +1475,10 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
|
|||
struct gpio_chip *chip;
|
||||
struct pinctrl_gpio_range *range;
|
||||
int ret = 0;
|
||||
int irq;
|
||||
int irq, i;
|
||||
int alias_idx = of_alias_get_id(np, "gpio");
|
||||
uint32_t ngpio;
|
||||
char **names;
|
||||
|
||||
BUG_ON(alias_idx >= ARRAY_SIZE(gpio_chips));
|
||||
if (gpio_chips[alias_idx]) {
|
||||
|
|
@ -1436,6 +1548,18 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
|
|||
chip->ngpio = ngpio;
|
||||
}
|
||||
|
||||
names = devm_kzalloc(&pdev->dev, sizeof(char*) * chip->ngpio, GFP_KERNEL);
|
||||
|
||||
if (!names) {
|
||||
ret = -ENOMEM;
|
||||
goto clk_err;
|
||||
}
|
||||
|
||||
for (i = 0; i < chip->ngpio; i++)
|
||||
names[i] = kasprintf(GFP_KERNEL, "pio%c%d", alias_idx + 'A', i);
|
||||
|
||||
chip->names = (const char*const*)names;
|
||||
|
||||
range = &at91_chip->range;
|
||||
range->name = chip->label;
|
||||
range->id = alias_idx;
|
||||
|
|
|
|||
Reference in New Issue