Blackfin arch: fixing bug - under IRQ stress, running applications may wrongly trigger an ICPLB miss and be killed
Disable IRQs while frobbing the CPLB registers, to avoid accessing the data in current_rwx_mask while it isn't covered by CPLBs. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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0c7a6b2135
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5d2e321306
1 changed files with 12 additions and 2 deletions
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@ -322,9 +322,11 @@ int cplb_hdr(int seqstat, struct pt_regs *regs)
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void flush_switched_cplbs(void)
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{
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int i;
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unsigned long flags;
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nr_cplb_flush++;
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local_irq_save(flags);
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disable_icplb();
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for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
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icplb_tbl[i].data = 0;
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@ -338,6 +340,8 @@ void flush_switched_cplbs(void)
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bfin_write32(DCPLB_DATA0 + i * 4, 0);
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}
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enable_dcplb();
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local_irq_restore(flags);
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}
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void set_mask_dcplbs(unsigned long *masks)
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@ -345,10 +349,15 @@ void set_mask_dcplbs(unsigned long *masks)
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int i;
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unsigned long addr = (unsigned long)masks;
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unsigned long d_data;
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current_rwx_mask = masks;
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unsigned long flags;
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if (!masks)
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if (!masks) {
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current_rwx_mask = masks;
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return;
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}
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local_irq_save(flags);
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current_rwx_mask = masks;
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d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
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#ifdef CONFIG_BFIN_DCACHE
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@ -367,4 +376,5 @@ void set_mask_dcplbs(unsigned long *masks)
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addr += PAGE_SIZE;
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}
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enable_dcplb();
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local_irq_restore(flags);
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}
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