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Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (34 commits)
  [POWERPC] 86xx: Cleaned up platform dts files
  [POWERPC] 85xx: Renamed MPC8568 MDS board code to match other boards
  [POWERPC] 85xx: Cleaning up machine probing
  [POWERPC] QE: clean up ucc_slow.c and ucc_fast.c
  [POWERPC] 85xx: Cleaned up platform dts files
  [POWERPC] 83xx: Renamed MPC8323 MDS dts and defconfig to match other boards
  [POWERPC] 83xx: Updated and renamed MPC8360PB to MPC836x MDS
  [POWERPC] 83xx: Use of_platform_bus_probe to setup QE devices
  [POWERPC] 83xx: use default value of loops_per_jiffy
  [POWERPC] 83xx: Remove obsolete setting of ROOT_DEV.
  [POWERPC] 83xx: Cleaning up machine probing and board initcalls
  [POWERPC] Dispose irq mapping when done in mpc52xx_serial.c
  [POWERPC] 86xx: Add missing of_node_put() in mpc86xx_hpcn_init_irq().
  [POWERPC] 8[56]xx: Remove obsolete setting of ROOT_DEV for 85xx and 86xx platforms.
  [POWERPC] pseries: Enabling auto poweron after power is restored.
  [POWERPC] use winbond libata instead of ide driver for pseries CD drives
  [POWERPC] powerpc: remove references to the obsolete linux,platform property
  [POWERPC] add of_get_mac_address and update fsl_soc.c to use it
  [POWERPC] 83xx: Cleaned up 83xx platform dts files
  [POWERPC] Fix bug with early ioremap and 64k pages
  ...
This commit is contained in:
Linus Torvalds 2007-02-19 13:05:14 -08:00
commit 5c56f46683
69 changed files with 2524 additions and 1462 deletions

View File

@ -497,7 +497,7 @@ looks like in practice.
| |- device_type = "cpu"
| |- reg = <0>
| |- clock-frequency = <5f5e1000>
| |- linux,boot-cpu
| |- 64-bit
| |- linux,phandle = <2>
|
o memory@0
@ -509,7 +509,6 @@ looks like in practice.
o chosen
|- name = "chosen"
|- bootargs = "root=/dev/sda2"
|- linux,platform = <00000600>
|- linux,phandle = <4>
This tree is almost a minimal tree. It pretty much contains the
@ -519,7 +518,7 @@ physical memory layout. It also includes misc information passed
through /chosen, like in this example, the platform type (mandatory)
and the kernel command line arguments (optional).
The /cpus/PowerPC,970@0/linux,boot-cpu property is an example of a
The /cpus/PowerPC,970@0/64-bit property is an example of a
property without a value. All other properties have a value. The
significance of the #address-cells and #size-cells properties will be
explained in chapter IV which defines precisely the required nodes and
@ -733,8 +732,7 @@ address which can extend beyond that limit.
that typically get driven by the same platform code in the
kernel, you would use a different "model" property but put a
value in "compatible". The kernel doesn't directly use that
value (see /chosen/linux,platform for how the kernel chooses a
platform type) but it is generally useful.
value but it is generally useful.
The root node is also generally where you add additional properties
specific to your board like the serial number if any, that sort of
@ -778,7 +776,6 @@ address which can extend beyond that limit.
bytes
- d-cache-size : one cell, size of L1 data cache in bytes
- i-cache-size : one cell, size of L1 instruction cache in bytes
- linux, boot-cpu : Should be defined if this cpu is the boot cpu.
Recommended properties:
@ -843,11 +840,6 @@ address which can extend beyond that limit.
the prom_init() trampoline when booting with an OF client interface,
but that you have to provide yourself when using the flattened format.
Required properties:
- linux,platform : This is your platform number as assigned by the
architecture maintainers
Recommended properties:
- bootargs : This zero-terminated string is passed as the kernel

View File

@ -620,6 +620,15 @@ config RTAS_FLASH
tristate "Firmware flash interface"
depends on PPC64 && RTAS_PROC
config PPC_PMI
tristate "Support for PMI"
depends PPC_IBM_CELL_BLADE
help
PMI (Platform Management Interrupt) is a way to
communicate with the BMC (Baseboard Mangement Controller).
It is used in some IBM Cell blades.
default m
config MMIO_NVRAM
bool
default n

View File

@ -35,7 +35,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
PowerPC,603e { /* Really 8241 */
linux,phandle = <2100>;
linux,boot-cpu;
device_type = "cpu";
reg = <0>;
clock-frequency = <bebc200>; /* Fixed by bootwrapper */

View File

@ -35,7 +35,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
PowerPC,603e { /* Really 8241 */
linux,phandle = <2100>;
linux,boot-cpu;
device_type = "cpu";
reg = <0>;
clock-frequency = <fdad680>; /* Fixed by bootwrapper */

View File

@ -36,7 +36,6 @@
bus-frequency = <0>; // From U-Boot
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};

View File

@ -34,7 +34,6 @@
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};

View File

@ -11,7 +11,7 @@
/ {
model = "MPC8313ERDB";
compatible = "MPC83xx";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
#address-cells = <1>;
#size-cells = <1>;
@ -59,7 +59,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -68,7 +68,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -77,7 +77,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -88,8 +88,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
phy_type = "utmi_wide";
};
@ -99,18 +99,15 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <13 2>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
interrupts = <13 8>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@4 {
linux,phandle = <2452004>;
interrupt-parent = <700>;
interrupts = <14 2>;
phy4: ethernet-phy@4 {
interrupt-parent = < &ipic >;
interrupts = <14 8>;
reg = <4>;
device_type = "ethernet-phy";
};
@ -123,8 +120,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <25 8 24 8 23 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
ethernet@25000 {
@ -134,8 +131,8 @@
reg = <25000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <22 8 21 8 20 8>;
interrupt-parent = <700>;
phy-handle = <2452004>;
interrupt-parent = < &ipic >;
phy-handle = < &phy4 >;
};
serial@4500 {
@ -144,7 +141,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -153,7 +150,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
@ -161,17 +158,17 @@
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
7000 0 0 1 700 12 8
7000 0 0 2 700 12 8
7000 0 0 3 700 12 8
7000 0 0 4 700 12 8
7000 0 0 1 &ipic 12 8
7000 0 0 2 &ipic 12 8
7000 0 0 3 &ipic 12 8
7000 0 0 4 &ipic 12 8
/* IDSEL 0x0F - PCI slot */
7800 0 0 1 700 11 8
7800 0 0 2 700 12 8
7800 0 0 3 700 11 8
7800 0 0 4 700 12 8>;
interrupt-parent = <700>;
7800 0 0 1 &ipic 11 8
7800 0 0 2 &ipic 12 8
7800 0 0 3 &ipic 11 8
7800 0 0 4 &ipic 12 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 90000000 90000000 0 10000000
@ -192,7 +189,7 @@
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
@ -206,8 +203,7 @@
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

View File

@ -11,16 +11,14 @@
/ {
model = "MPC8323EMDS";
compatible = "MPC83xx";
compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8323@0 {
device_type = "cpu";
@ -33,14 +31,11 @@
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>;
};
@ -69,7 +64,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -79,7 +74,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -88,7 +83,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
@ -97,7 +92,7 @@
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
@ -106,51 +101,50 @@
};
pci@8500 {
linux,phandle = <8500>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 AD18 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 AD19 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 AD21*/
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 AD22*/
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 AD23*/
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 AD24*/
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 90000000 0 10000000
@ -165,8 +159,7 @@
device_type = "pci";
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
@ -180,8 +173,7 @@
device_type = "par_io";
num-ports = <7>;
ucc_pin@03 {
linux,phandle = <140003>;
pio3: ucc_pin@03 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
@ -204,8 +196,7 @@
1 c 1 0 1 0 /* TX_EN */
1 d 2 0 1 0>;/* CRS */
};
ucc_pin@04 {
linux,phandle = <140004>;
pio4: ucc_pin@04 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
3 1f 2 0 1 0 /* RX_CLK (CLK7) */
@ -252,7 +243,7 @@
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -261,7 +252,7 @@
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -270,7 +261,7 @@
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "slave";
};
@ -281,12 +272,12 @@
device-id = <3>;
reg = <2200 200>;
interrupts = <22>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <19>;
tx-clock = <1a>;
phy-handle = <212003>;
pio-handle = <140003>;
phy-handle = < &phy3 >;
pio-handle = < &pio3 >;
};
ucc@3200 {
@ -296,12 +287,12 @@
device-id = <4>;
reg = <3000 200>;
interrupts = <23>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <17>;
tx-clock = <18>;
phy-handle = <212004>;
pio-handle = <140004>;
phy-handle = < &phy4 >;
pio-handle = < &pio4 >;
};
mdio@2320 {
@ -311,26 +302,23 @@
device_type = "mdio";
compatible = "ucc_geth_phy";
ethernet-phy@03 {
linux,phandle = <212003>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy3: ethernet-phy@03 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <3>;
device_type = "ethernet-phy";
interface = <3>; //ENET_100_MII
};
ethernet-phy@04 {
linux,phandle = <212004>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy4: ethernet-phy@04 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <4>;
device_type = "ethernet-phy";
interface = <3>;
};
};
qeic@80 {
linux,phandle = <80>;
qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
@ -339,7 +327,7 @@
built-in;
big-endian;
interrupts = <20 8 21 8>; //high:32 low:33
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
};
};

View File

@ -10,7 +10,7 @@
*/
/ {
model = "MPC8349EMITX";
compatible = "MPC834xMITX";
compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
#address-cells = <1>;
#size-cells = <1>;
@ -58,7 +58,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -67,7 +67,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -76,7 +76,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -86,8 +86,8 @@
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 2>;
interrupt-parent = < &ipic >;
interrupts = <27 8>;
phy_type = "ulpi";
port1;
};
@ -98,8 +98,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
phy_type = "ulpi";
};
@ -109,22 +109,19 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1c: ethernet-phy@1c {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1c>;
device_type = "ethernet-phy";
};
/* Vitesse 7385 */
ethernet-phy@1f {
linux,phandle = <245201f>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1f: ethernet-phy@1f {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1f>;
device_type = "ethernet-phy";
};
@ -138,8 +135,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1c >;
};
ethernet@25000 {
@ -152,8 +149,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = <700>;
phy-handle = <245201f>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1f >;
};
serial@4500 {
@ -162,7 +159,7 @@
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -171,16 +168,16 @@
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
8000 0 0 1 700 16 8 /* SATA_INTA */
8000 0 0 1 &ipic 16 8 /* SATA_INTA */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <42000000 0 80000000 80000000 0 10000000
@ -199,13 +196,13 @@
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
7000 0 0 1 700 15 8 /* PCI_INTA */
7000 0 0 1 &ipic 15 8 /* PCI_INTA */
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
7800 0 0 1 &ipic 14 8 /* PCI_INTA */
7800 0 0 2 &ipic 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
@ -226,15 +223,14 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

View File

@ -10,7 +10,7 @@
*/
/ {
model = "MPC8349EMITXGP";
compatible = "MPC834xMITXGP";
compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
#address-cells = <1>;
#size-cells = <1>;
@ -58,7 +58,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -67,7 +67,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -76,7 +76,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -86,8 +86,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@ -98,13 +98,11 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1c: ethernet-phy@1c {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1c>;
device_type = "ethernet-phy";
};
@ -117,8 +115,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1c >;
};
serial@4500 {
@ -127,7 +125,7 @@
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -136,17 +134,17 @@
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8600 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
7800 0 0 1 &ipic 14 8 /* PCI_INTA */
7800 0 0 2 &ipic 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
@ -167,15 +165,14 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

View File

@ -11,7 +11,7 @@
/ {
model = "MPC8349EMDS";
compatible = "MPC834xMDS";
compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
@ -64,7 +64,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -73,7 +73,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -82,7 +82,7 @@
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
mode = <0>;
};
@ -94,8 +94,8 @@
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 2>;
interrupt-parent = < &ipic >;
interrupts = <27 8>;
phy_type = "ulpi";
port1;
};
@ -106,8 +106,8 @@
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@ -118,18 +118,15 @@
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy0: ethernet-phy@0 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1>;
device_type = "ethernet-phy";
};
@ -143,8 +140,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <2452000>;
interrupt-parent = < &ipic >;
phy-handle = < &phy0 >;
};
ethernet@25000 {
@ -157,8 +154,8 @@
address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
serial@4500 {
@ -167,7 +164,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -176,7 +173,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
pci@8500 {
@ -184,47 +181,47 @@
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 */
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 */
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 */
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 */
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
@ -244,47 +241,47 @@
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 */
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 */
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 */
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 */
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 b0000000 b0000000 0 10000000
@ -306,7 +303,7 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
@ -321,8 +318,7 @@
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;

View File

@ -15,17 +15,15 @@
*/
/ {
model = "MPC8360EPB";
compatible = "MPC83xx";
model = "MPC8360MDS";
compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8360@0 {
device_type = "cpu";
@ -38,14 +36,11 @@
bus-frequency = <FBC5200>;
clock-frequency = <1F78A400>;
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
@ -74,7 +69,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -83,7 +78,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
dfsrr;
};
@ -93,7 +88,7 @@
reg = <4500 100>;
clock-frequency = <FBC5200>;
interrupts = <9 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
serial@4600 {
@ -102,7 +97,7 @@
reg = <4600 100>;
clock-frequency = <FBC5200>;
interrupts = <a 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
@ -111,7 +106,7 @@
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
@ -120,52 +115,51 @@
};
pci@8500 {
linux,phandle = <8500>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
8800 0 0 1 700 14 8
8800 0 0 2 700 15 8
8800 0 0 3 700 16 8
8800 0 0 4 700 17 8
8800 0 0 1 &ipic 14 8
8800 0 0 2 &ipic 15 8
8800 0 0 3 &ipic 16 8
8800 0 0 4 &ipic 17 8
/* IDSEL 0x12 AD18 */
9000 0 0 1 700 16 8
9000 0 0 2 700 17 8
9000 0 0 3 700 14 8
9000 0 0 4 700 15 8
9000 0 0 1 &ipic 16 8
9000 0 0 2 &ipic 17 8
9000 0 0 3 &ipic 14 8
9000 0 0 4 &ipic 15 8
/* IDSEL 0x13 AD19 */
9800 0 0 1 700 17 8
9800 0 0 2 700 14 8
9800 0 0 3 700 15 8
9800 0 0 4 700 16 8
9800 0 0 1 &ipic 17 8
9800 0 0 2 &ipic 14 8
9800 0 0 3 &ipic 15 8
9800 0 0 4 &ipic 16 8
/* IDSEL 0x15 AD21*/
a800 0 0 1 700 14 8
a800 0 0 2 700 15 8
a800 0 0 3 700 16 8
a800 0 0 4 700 17 8
a800 0 0 1 &ipic 14 8
a800 0 0 2 &ipic 15 8
a800 0 0 3 &ipic 16 8
a800 0 0 4 &ipic 17 8
/* IDSEL 0x16 AD22*/
b000 0 0 1 700 17 8
b000 0 0 2 700 14 8
b000 0 0 3 700 15 8
b000 0 0 4 700 16 8
b000 0 0 1 &ipic 17 8
b000 0 0 2 &ipic 14 8
b000 0 0 3 &ipic 15 8
b000 0 0 4 &ipic 16 8
/* IDSEL 0x17 AD23*/
b800 0 0 1 700 16 8
b800 0 0 2 700 17 8
b800 0 0 3 700 14 8
b800 0 0 4 700 15 8
b800 0 0 1 &ipic 16 8
b800 0 0 2 &ipic 17 8
b800 0 0 3 &ipic 14 8
b800 0 0 4 &ipic 15 8
/* IDSEL 0x18 AD24*/
c000 0 0 1 700 15 8
c000 0 0 2 700 16 8
c000 0 0 3 700 17 8
c000 0 0 4 700 14 8>;
interrupt-parent = <700>;
c000 0 0 1 &ipic 15 8
c000 0 0 2 &ipic 16 8
c000 0 0 3 &ipic 17 8
c000 0 0 4 &ipic 14 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
@ -180,8 +174,7 @@
device_type = "pci";
};
pic@700 {
linux,phandle = <700>;
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
@ -195,8 +188,7 @@
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
linux,phandle = <140001>;
pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 3 1 0 1 0 /* TxD0 */
@ -223,8 +215,7 @@
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
};
ucc_pin@02 {
linux,phandle = <140002>;
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 11 1 0 1 0 /* TxD0 */
@ -281,7 +272,7 @@
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -290,7 +281,7 @@
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "cpu";
};
@ -299,7 +290,7 @@
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mode = "slave";
};
@ -310,12 +301,12 @@
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <212000>;
pio-handle = <140001>;
phy-handle = < &phy0 >;
pio-handle = < &pio1 >;
};
ucc@3000 {
@ -325,12 +316,12 @@
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <80>;
interrupt-parent = < &qeic >;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <212001>;
pio-handle = <140002>;
phy-handle = < &phy1 >;
pio-handle = < &pio2 >;
};
mdio@2120 {
@ -340,26 +331,23 @@
device_type = "mdio";
compatible = "ucc_geth_phy";
ethernet-phy@00 {
linux,phandle = <212000>;
interrupt-parent = <700>;
interrupts = <11 2>;
phy0: ethernet-phy@00 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@01 {
linux,phandle = <212001>;
interrupt-parent = <700>;
interrupts = <12 2>;
phy1: ethernet-phy@01 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
};
qeic@80 {
linux,phandle = <80>;
qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
@ -368,7 +356,7 @@
built-in;
big-endian;
interrupts = <20 8 21 8>; //high:32 low:33
interrupt-parent = <700>;
interrupt-parent = < &ipic >;
};
};

View File

@ -12,16 +12,14 @@
/ {
model = "MPC8540ADS";
compatible = "MPC85xxADS";
compatible = "MPC8540ADS", "MPC85xxADS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8540@0 {
device_type = "cpu";
@ -34,13 +32,11 @@
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
@ -58,7 +54,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -68,24 +64,20 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <3>;
device_type = "ethernet-phy";
@ -102,8 +94,8 @@
address = [ 00 E0 0C 00 73 00 ];
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -116,8 +108,8 @@
address = [ 00 E0 0C 00 73 01 ];
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
ethernet@26000 {
@ -130,8 +122,8 @@
address = [ 00 E0 0C 00 73 02 ];
local-mac-address = [ 00 E0 0C 00 73 02 ];
interrupts = <19 2>;
interrupt-parent = <40000>;
phy-handle = <2452003>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
serial@4500 {
@ -140,7 +132,7 @@
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -149,85 +141,84 @@
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
pci@8000 {
linux,phandle = <8000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x02 */
1000 0 0 1 40000 31 1
1000 0 0 2 40000 32 1
1000 0 0 3 40000 33 1
1000 0 0 4 40000 34 1
1000 0 0 1 &mpic 31 1
1000 0 0 2 &mpic 32 1
1000 0 0 3 &mpic 33 1
1000 0 0 4 &mpic 34 1
/* IDSEL 0x03 */
1800 0 0 1 40000 34 1
1800 0 0 2 40000 31 1
1800 0 0 3 40000 32 1
1800 0 0 4 40000 33 1
1800 0 0 1 &mpic 34 1
1800 0 0 2 &mpic 31 1
1800 0 0 3 &mpic 32 1
1800 0 0 4 &mpic 33 1
/* IDSEL 0x04 */
2000 0 0 1 40000 33 1
2000 0 0 2 40000 34 1
2000 0 0 3 40000 31 1
2000 0 0 4 40000 32 1
2000 0 0 1 &mpic 33 1
2000 0 0 2 &mpic 34 1
2000 0 0 3 &mpic 31 1
2000 0 0 4 &mpic 32 1
/* IDSEL 0x05 */
2800 0 0 1 40000 32 1
2800 0 0 2 40000 33 1
2800 0 0 3 40000 34 1
2800 0 0 4 40000 31 1
2800 0 0 1 &mpic 32 1
2800 0 0 2 &mpic 33 1
2800 0 0 3 &mpic 34 1
2800 0 0 4 &mpic 31 1
/* IDSEL 0x0c */
6000 0 0 1 40000 31 1
6000 0 0 2 40000 32 1
6000 0 0 3 40000 33 1
6000 0 0 4 40000 34 1
6000 0 0 1 &mpic 31 1
6000 0 0 2 &mpic 32 1
6000 0 0 3 &mpic 33 1
6000 0 0 4 &mpic 34 1
/* IDSEL 0x0d */
6800 0 0 1 40000 34 1
6800 0 0 2 40000 31 1
6800 0 0 3 40000 32 1
6800 0 0 4 40000 33 1
6800 0 0 1 &mpic 34 1
6800 0 0 2 &mpic 31 1
6800 0 0 3 &mpic 32 1
6800 0 0 4 &mpic 33 1
/* IDSEL 0x0e */
7000 0 0 1 40000 33 1
7000 0 0 2 40000 34 1
7000 0 0 3 40000 31 1
7000 0 0 4 40000 32 1
7000 0 0 1 &mpic 33 1
7000 0 0 2 &mpic 34 1
7000 0 0 3 &mpic 31 1
7000 0 0 4 &mpic 32 1
/* IDSEL 0x0f */
7800 0 0 1 40000 32 1
7800 0 0 2 40000 33 1
7800 0 0 3 40000 34 1
7800 0 0 4 40000 31 1
7800 0 0 1 &mpic 32 1
7800 0 0 2 &mpic 33 1
7800 0 0 3 &mpic 34 1
7800 0 0 4 &mpic 31 1
/* IDSEL 0x12 */
9000 0 0 1 40000 31 1
9000 0 0 2 40000 32 1
9000 0 0 3 40000 33 1
9000 0 0 4 40000 34 1
9000 0 0 1 &mpic 31 1
9000 0 0 2 &mpic 32 1
9000 0 0 3 &mpic 33 1
9000 0 0 4 &mpic 34 1
/* IDSEL 0x13 */
9800 0 0 1 40000 34 1
9800 0 0 2 40000 31 1
9800 0 0 3 40000 32 1
9800 0 0 4 40000 33 1
9800 0 0 1 &mpic 34 1
9800 0 0 2 &mpic 31 1
9800 0 0 3 &mpic 32 1
9800 0 0 4 &mpic 33 1
/* IDSEL 0x14 */
a000 0 0 1 40000 33 1
a000 0 0 2 40000 34 1
a000 0 0 3 40000 31 1
a000 0 0 4 40000 32 1
a000 0 0 1 &mpic 33 1
a000 0 0 2 &mpic 34 1
a000 0 0 3 &mpic 31 1
a000 0 0 4 &mpic 32 1
/* IDSEL 0x15 */
a800 0 0 1 40000 32 1
a800 0 0 2 40000 33 1
a800 0 0 3 40000 34 1
a800 0 0 4 40000 31 1>;
interrupt-parent = <40000>;
a800 0 0 1 &mpic 32 1
a800 0 0 2 &mpic 33 1
a800 0 0 3 &mpic 34 1
a800 0 0 4 &mpic 31 1>;
interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
@ -241,8 +232,7 @@
device_type = "pci";
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;

View File

@ -12,16 +12,14 @@
/ {
model = "MPC8541CDS";
compatible = "MPC85xxCDS";
compatible = "MPC8541CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8541@0 {
device_type = "cpu";
@ -34,13 +32,11 @@
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
@ -58,7 +54,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -68,17 +64,14 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
@ -94,8 +87,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -107,8 +100,8 @@
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
serial@4500 {
@ -117,7 +110,7 @@
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -126,57 +119,56 @@
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
pci@8000 {
linux,phandle = <8000>;
pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
08000 0 0 1 40000 30 1
08000 0 0 2 40000 31 1
08000 0 0 3 40000 32 1
08000 0 0 4 40000 33 1
08000 0 0 1 &mpic 30 1
08000 0 0 2 &mpic 31 1
08000 0 0 3 &mpic 32 1
08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
08800 0 0 1 40000 30 1
08800 0 0 2 40000 31 1
08800 0 0 3 40000 32 1
08800 0 0 4 40000 33 1
08800 0 0 1 &mpic 30 1
08800 0 0 2 &mpic 31 1
08800 0 0 3 &mpic 32 1
08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
09000 0 0 1 40000 30 1
09000 0 0 2 40000 31 1
09000 0 0 3 40000 32 1
09000 0 0 4 40000 33 1
09000 0 0 1 &mpic 30 1
09000 0 0 2 &mpic 31 1
09000 0 0 3 &mpic 32 1
09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
09800 0 0 1 40000 31 1
09800 0 0 2 40000 32 1
09800 0 0 3 40000 33 1
09800 0 0 4 40000 30 1
09800 0 0 1 &mpic 31 1
09800 0 0 2 &mpic 32 1
09800 0 0 3 &mpic 33 1
09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
0a000 0 0 1 40000 32 1
0a000 0 0 2 40000 33 1
0a000 0 0 3 40000 30 1
0a000 0 0 4 40000 31 1
0a000 0 0 1 &mpic 32 1
0a000 0 0 2 &mpic 33 1
0a000 0 0 3 &mpic 30 1
0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
0a800 0 0 1 40000 33 1
0a800 0 0 2 40000 30 1
0a800 0 0 3 40000 31 1
0a800 0 0 4 40000 32 1
0a800 0 0 1 &mpic 33 1
0a800 0 0 2 &mpic 30 1
0a800 0 0 3 &mpic 31 1
0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
19000 0 0 1 40000 30 1
19000 0 0 2 40000 31 1
19000 0 0 3 40000 32 1
19000 0 0 4 40000 33 1>;
interrupt-parent = <40000>;
19000 0 0 1 &mpic 30 1
19000 0 0 2 &mpic 31 1
19000 0 0 3 &mpic 32 1
19000 0 0 4 &mpic 33 1>;
interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
@ -200,21 +192,20 @@
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
interrupt-parent = <8000>;
interrupt-parent = <&pci1>;
};
};
pci@9000 {
linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
a800 0 0 1 40000 3b 1
a800 0 0 2 40000 3b 1
a800 0 0 3 40000 3b 1
a800 0 0 4 40000 3b 1>;
interrupt-parent = <40000>;
a800 0 0 1 &mpic 3b 1
a800 0 0 2 &mpic 3b 1
a800 0 0 3 &mpic 3b 1
a800 0 0 4 &mpic 3b 1>;
interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
@ -228,8 +219,7 @@
device_type = "pci";
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;

View File

@ -12,16 +12,14 @@
/ {
model = "MPC8548CDS";
compatible = "MPC85xxCDS";
compatible = "MPC8548CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8548@0 {
device_type = "cpu";
@ -34,13 +32,11 @@
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
@ -58,7 +54,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -68,32 +64,26 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <3>;
device_type = "ethernet-phy";
@ -109,8 +99,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -122,10 +112,11 @@
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
/* eTSEC 3/4 are currently broken
ethernet@26000 {
#address-cells = <1>;
#size-cells = <0>;
@ -135,11 +126,10 @@
reg = <26000 1000>;
local-mac-address = [ 00 E0 0C 00 73 02 ];
interrupts = <f 2 10 2 11 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy2>;
};
/* eTSEC 4 is currently broken
ethernet@27000 {
#address-cells = <1>;
#size-cells = <0>;
@ -149,8 +139,8 @@
reg = <27000 1000>;
local-mac-address = [ 00 E0 0C 00 73 03 ];
interrupts = <15 2 16 2 17 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
*/
@ -160,7 +150,7 @@
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -169,57 +159,56 @@
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
pci@8000 {
linux,phandle = <8000>;
pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
08000 0 0 1 40000 30 1
08000 0 0 2 40000 31 1
08000 0 0 3 40000 32 1
08000 0 0 4 40000 33 1
08000 0 0 1 &mpic 30 1
08000 0 0 2 &mpic 31 1
08000 0 0 3 &mpic 32 1
08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
08800 0 0 1 40000 30 1
08800 0 0 2 40000 31 1
08800 0 0 3 40000 32 1
08800 0 0 4 40000 33 1
08800 0 0 1 &mpic 30 1
08800 0 0 2 &mpic 31 1
08800 0 0 3 &mpic 32 1
08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
09000 0 0 1 40000 30 1
09000 0 0 2 40000 31 1
09000 0 0 3 40000 32 1
09000 0 0 4 40000 33 1
09000 0 0 1 &mpic 30 1
09000 0 0 2 &mpic 31 1
09000 0 0 3 &mpic 32 1
09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
09800 0 0 1 40000 31 1
09800 0 0 2 40000 32 1
09800 0 0 3 40000 33 1
09800 0 0 4 40000 30 1
09800 0 0 1 &mpic 31 1
09800 0 0 2 &mpic 32 1
09800 0 0 3 &mpic 33 1
09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
0a000 0 0 1 40000 32 1
0a000 0 0 2 40000 33 1
0a000 0 0 3 40000 30 1
0a000 0 0 4 40000 31 1
0a000 0 0 1 &mpic 32 1
0a000 0 0 2 &mpic 33 1
0a000 0 0 3 &mpic 30 1
0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
0a800 0 0 1 40000 33 1
0a800 0 0 2 40000 30 1
0a800 0 0 3 40000 31 1
0a800 0 0 4 40000 32 1
0a800 0 0 1 &mpic 33 1
0a800 0 0 2 &mpic 30 1
0a800 0 0 3 &mpic 31 1
0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
19000 0 0 1 40000 30 1
19000 0 0 2 40000 31 1
19000 0 0 3 40000 32 1
19000 0 0 4 40000 33 1>;
interrupt-parent = <40000>;
19000 0 0 1 &mpic 30 1
19000 0 0 2 &mpic 31 1
19000 0 0 3 &mpic 32 1
19000 0 0 4 &mpic 33 1>;
interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
@ -243,21 +232,20 @@
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
interrupt-parent = <8000>;
interrupt-parent = <&pci1>;
};
};
pci@9000 {
linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
a800 0 0 1 40000 3b 1
a800 0 0 2 40000 3b 1
a800 0 0 3 40000 3b 1
a800 0 0 4 40000 3b 1>;
interrupt-parent = <40000>;
a800 0 0 1 &mpic 3b 1
a800 0 0 2 &mpic 3b 1
a800 0 0 3 &mpic 3b 1
a800 0 0 4 &mpic 3b 1>;
interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
@ -271,8 +259,7 @@
device_type = "pci";
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;

View File

@ -12,16 +12,14 @@
/ {
model = "MPC8555CDS";
compatible = "MPC85xxCDS";
compatible = "MPC8555CDS", "MPC85xxCDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8555@0 {
device_type = "cpu";
@ -34,13 +32,11 @@
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 08000000>; // 128M at 0x0
};
@ -58,7 +54,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -68,17 +64,14 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <35 0>;
reg = <1>;
device_type = "ethernet-phy";
@ -94,8 +87,8 @@
reg = <24000 1000>;
local-mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <0d 2 0e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -107,8 +100,8 @@
reg = <25000 1000>;
local-mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
serial@4500 {
@ -117,7 +110,7 @@
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -126,57 +119,56 @@
reg = <4600 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
pci@8000 {
linux,phandle = <8000>;
pci1: pci@8000 {
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 */
08000 0 0 1 40000 30 1
08000 0 0 2 40000 31 1
08000 0 0 3 40000 32 1
08000 0 0 4 40000 33 1
08000 0 0 1 &mpic 30 1
08000 0 0 2 &mpic 31 1
08000 0 0 3 &mpic 32 1
08000 0 0 4 &mpic 33 1
/* IDSEL 0x11 */
08800 0 0 1 40000 30 1
08800 0 0 2 40000 31 1
08800 0 0 3 40000 32 1
08800 0 0 4 40000 33 1
08800 0 0 1 &mpic 30 1
08800 0 0 2 &mpic 31 1
08800 0 0 3 &mpic 32 1
08800 0 0 4 &mpic 33 1
/* IDSEL 0x12 (Slot 1) */
09000 0 0 1 40000 30 1
09000 0 0 2 40000 31 1
09000 0 0 3 40000 32 1
09000 0 0 4 40000 33 1
09000 0 0 1 &mpic 30 1
09000 0 0 2 &mpic 31 1
09000 0 0 3 &mpic 32 1
09000 0 0 4 &mpic 33 1
/* IDSEL 0x13 (Slot 2) */
09800 0 0 1 40000 31 1
09800 0 0 2 40000 32 1
09800 0 0 3 40000 33 1
09800 0 0 4 40000 30 1
09800 0 0 1 &mpic 31 1
09800 0 0 2 &mpic 32 1
09800 0 0 3 &mpic 33 1
09800 0 0 4 &mpic 30 1
/* IDSEL 0x14 (Slot 3) */
0a000 0 0 1 40000 32 1
0a000 0 0 2 40000 33 1
0a000 0 0 3 40000 30 1
0a000 0 0 4 40000 31 1
0a000 0 0 1 &mpic 32 1
0a000 0 0 2 &mpic 33 1
0a000 0 0 3 &mpic 30 1
0a000 0 0 4 &mpic 31 1
/* IDSEL 0x15 (Slot 4) */
0a800 0 0 1 40000 33 1
0a800 0 0 2 40000 30 1
0a800 0 0 3 40000 31 1
0a800 0 0 4 40000 32 1
0a800 0 0 1 &mpic 33 1
0a800 0 0 2 &mpic 30 1
0a800 0 0 3 &mpic 31 1
0a800 0 0 4 &mpic 32 1
/* Bus 1 (Tundra Bridge) */
/* IDSEL 0x12 (ISA bridge) */
19000 0 0 1 40000 30 1
19000 0 0 2 40000 31 1
19000 0 0 3 40000 32 1
19000 0 0 4 40000 33 1>;
interrupt-parent = <40000>;
19000 0 0 1 &mpic 30 1
19000 0 0 2 &mpic 31 1
19000 0 0 3 &mpic 32 1
19000 0 0 4 &mpic 33 1>;
interrupt-parent = <&mpic>;
interrupts = <08 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
@ -200,21 +192,20 @@
compatible = "chrp,iic";
big-endian;
interrupts = <1>;
interrupt-parent = <8000>;
interrupt-parent = <&pci1>;
};
};
pci@9000 {
linux,phandle = <9000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x15 */
a800 0 0 1 40000 3b 1
a800 0 0 2 40000 3b 1
a800 0 0 3 40000 3b 1
a800 0 0 4 40000 3b 1>;
interrupt-parent = <40000>;
a800 0 0 1 &mpic 3b 1
a800 0 0 2 &mpic 3b 1
a800 0 0 3 &mpic 3b 1
a800 0 0 4 &mpic 3b 1>;
interrupt-parent = <&mpic>;
interrupts = <09 2>;
bus-range = <0 0>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
@ -228,8 +219,7 @@
device_type = "pci";
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;

View File

@ -12,16 +12,14 @@
/ {
model = "MPC8560ADS";
compatible = "MPC85xxADS";
compatible = "MPC8560ADS", "MPC85xxADS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8560@0 {
device_type = "cpu";
@ -34,14 +32,11 @@
bus-frequency = <13ab6680>;
clock-frequency = <312c8040>;
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
@ -58,33 +53,28 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <35 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <37 1>;
reg = <3>;
device_type = "ethernet-phy";
@ -98,8 +88,8 @@
reg = <24000 1000>;
address = [ 00 00 0C 00 00 FD ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -111,12 +101,11 @@
reg = <25000 1000>;
address = [ 00 00 0C 00 01 FD ];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
pci@8000 {
linux,phandle = <8000>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@ -128,96 +117,94 @@
interrupt-map = <
/* IDSEL 0x2 */
1000 0 0 1 40000 31 1
1000 0 0 2 40000 32 1
1000 0 0 3 40000 33 1
1000 0 0 4 40000 34 1
1000 0 0 1 &mpic 31 1
1000 0 0 2 &mpic 32 1
1000 0 0 3 &mpic 33 1
1000 0 0 4 &mpic 34 1
/* IDSEL 0x3 */
1800 0 0 1 40000 34 1
1800 0 0 2 40000 31 1
1800 0 0 3 40000 32 1
1800 0 0 4 40000 33 1
1800 0 0 1 &mpic 34 1
1800 0 0 2 &mpic 31 1
1800 0 0 3 &mpic 32 1
1800 0 0 4 &mpic 33 1
/* IDSEL 0x4 */
2000 0 0 1 40000 33 1
2000 0 0 2 40000 34 1
2000 0 0 3 40000 31 1
2000 0 0 4 40000 32 1
2000 0 0 1 &mpic 33 1
2000 0 0 2 &mpic 34 1
2000 0 0 3 &mpic 31 1
2000 0 0 4 &mpic 32 1
/* IDSEL 0x5 */
2800 0 0 1 40000 32 1
2800 0 0 2 40000 33 1
2800 0 0 3 40000 34 1
2800 0 0 4 40000 31 1
2800 0 0 1 &mpic 32 1
2800 0 0 2 &mpic 33 1
2800 0 0 3 &mpic 34 1
2800 0 0 4 &mpic 31 1
/* IDSEL 12 */
6000 0 0 1 40000 31 1
6000 0 0 2 40000 32 1
6000 0 0 3 40000 33 1
6000 0 0 4 40000 34 1
6000 0 0 1 &mpic 31 1
6000 0 0 2 &mpic 32 1
6000 0 0 3 &mpic 33 1
6000 0 0 4 &mpic 34 1
/* IDSEL 13 */
6800 0 0 1 40000 34 1
6800 0 0 2 40000 31 1
6800 0 0 3 40000 32 1
6800 0 0 4 40000 33 1
6800 0 0 1 &mpic 34 1
6800 0 0 2 &mpic 31 1
6800 0 0 3 &mpic 32 1
6800 0 0 4 &mpic 33 1
/* IDSEL 14*/
7000 0 0 1 40000 33 1
7000 0 0 2 40000 34 1
7000 0 0 3 40000 31 1
7000 0 0 4 40000 32 1
7000 0 0 1 &mpic 33 1
7000 0 0 2 &mpic 34 1
7000 0 0 3 &mpic 31 1
7000 0 0 4 &mpic 32 1
/* IDSEL 15 */
7800 0 0 1 40000 32 1
7800 0 0 2 40000 33 1
7800 0 0 3 40000 34 1
7800 0 0 4 40000 31 1
7800 0 0 1 &mpic 32 1
7800 0 0 2 &mpic 33 1
7800 0 0 3 &mpic 34 1
7800 0 0 4 &mpic 31 1
/* IDSEL 18 */
9000 0 0 1 40000 31 1
9000 0 0 2 40000 32 1
9000 0 0 3 40000 33 1
9000 0 0 4 40000 34 1
9000 0 0 1 &mpic 31 1
9000 0 0 2 &mpic 32 1
9000 0 0 3 &mpic 33 1
9000 0 0 4 &mpic 34 1
/* IDSEL 19 */
9800 0 0 1 40000 34 1
9800 0 0 2 40000 31 1
9800 0 0 3 40000 32 1
9800 0 0 4 40000 33 1
9800 0 0 1 &mpic 34 1
9800 0 0 2 &mpic 31 1
9800 0 0 3 &mpic 32 1
9800 0 0 4 &mpic 33 1
/* IDSEL 20 */
a000 0 0 1 40000 33 1
a000 0 0 2 40000 34 1
a000 0 0 3 40000 31 1
a000 0 0 4 40000 32 1
a000 0 0 1 &mpic 33 1
a000 0 0 2 &mpic 34 1
a000 0 0 3 &mpic 31 1
a000 0 0 4 &mpic 32 1
/* IDSEL 21 */
a800 0 0 1 40000 32 1
a800 0 0 2 40000 33 1
a800 0 0 3 40000 34 1
a800 0 0 4 40000 31 1>;
a800 0 0 1 &mpic 32 1
a800 0 0 2 &mpic 33 1
a800 0 0 3 &mpic 34 1
a800 0 0 4 &mpic 31 1>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
interrupts = <8 0>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 01000000>;
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 20100>;
reg = <40000 40000>;
built-in;
device_type = "open-pic";
};
cpm@e0000000 {
linux,phandle = <e0000000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
@ -228,13 +215,12 @@
command-proc = <919c0>;
brg-frequency = <9d5b340>;
pic@90c00 {
linux,phandle = <90c00>;
cpmpic: pic@90c00 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 0>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
reg = <90c00 80>;
built-in;
device_type = "cpm-pic";
@ -251,7 +237,7 @@
tx-clock = <1>;
current-speed = <1c200>;
interrupts = <28 8>;
interrupt-parent = <90c00>;
interrupt-parent = <&cpmpic>;
};
scc@91a20 {
@ -265,7 +251,7 @@
tx-clock = <2>;
current-speed = <1c200>;
interrupts = <29 8>;
interrupt-parent = <90c00>;
interrupt-parent = <&cpmpic>;
};
fcc@91320 {
@ -279,8 +265,8 @@
rx-clock = <15>;
tx-clock = <16>;
interrupts = <21 8>;
interrupt-parent = <90c00>;
phy-handle = <2452002>;
interrupt-parent = <&cpmpic>;
phy-handle = <&phy2>;
};
fcc@91340 {
@ -294,8 +280,8 @@
rx-clock = <17>;
tx-clock = <18>;
interrupts = <22 8>;
interrupt-parent = <90c00>;
phy-handle = <2452003>;
interrupt-parent = <&cpmpic>;
phy-handle = <&phy3>;
};
};
};

View File

@ -16,16 +16,14 @@
/ {
model = "MPC8568EMDS";
compatible = "MPC85xxMDS";
compatible = "MPC8568EMDS", "MPC85xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8568@0 {
device_type = "cpu";
@ -38,13 +36,11 @@
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
@ -67,7 +63,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -76,7 +72,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -86,32 +82,26 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
@ -127,8 +117,8 @@
reg = <24000 1000>;
mac-address = [ 00 00 00 00 00 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452002>;
interrupt-parent = <&mpic>;
phy-handle = <&phy2>;
};
ethernet@25000 {
@ -140,8 +130,8 @@
reg = <25000 1000>;
mac-address = [ 00 00 00 00 00 00];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452003>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
serial@4500 {
@ -150,7 +140,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -159,7 +149,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
crypto@30000 {
@ -168,15 +158,14 @@
compatible = "talitos";
reg = <30000 f000>;
interrupts = <1d 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <000000fe>;
descriptor-types-mask = <012b0ebf>;
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
@ -192,8 +181,7 @@
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
linux,phandle = <e010001>;
pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
4 0a 1 0 2 0 /* TxD0 */
@ -220,8 +208,7 @@
4 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0>; /* GTX125 */
};
ucc_pin@02 {
linux,phandle = <e010002>;
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
5 0a 1 0 2 0 /* TxD0 */
@ -277,7 +264,7 @@
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
interrupt-parent = <&qeic>;
mode = "cpu";
};
@ -286,7 +273,7 @@
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
interrupt-parent = <&qeic>;
mode = "cpu";
};
@ -297,12 +284,12 @@
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <80>;
interrupt-parent = <&qeic>;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <212000>;
pio-handle = <e010001>;
phy-handle = <&qe_phy0>;
pio-handle = <&pio1>;
};
ucc@3000 {
@ -312,12 +299,12 @@
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <80>;
interrupt-parent = <&qeic>;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <212001>;
pio-handle = <e010002>;
phy-handle = <&qe_phy1>;
pio-handle = <&pio2>;
};
mdio@2120 {
@ -329,33 +316,29 @@
/* These are the same PHYs as on
* gianfar's MDIO bus */
ethernet-phy@00 {
linux,phandle = <212000>;
interrupt-parent = <40000>;
qe_phy0: ethernet-phy@00 {
interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@01 {
linux,phandle = <212001>;
interrupt-parent = <40000>;
qe_phy1: ethernet-phy@01 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
ethernet-phy@02 {
linux,phandle = <212002>;
interrupt-parent = <40000>;
qe_phy2: ethernet-phy@02 {
interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@03 {
linux,phandle = <212003>;
interrupt-parent = <40000>;
qe_phy3: ethernet-phy@03 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
@ -363,8 +346,7 @@
};
};
qeic@80 {
linux,phandle = <80>;
qeic: qeic@80 {
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
@ -373,7 +355,7 @@
built-in;
big-endian;
interrupts = <1e 2 1e 2>; //high:30 low:30
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
};

View File

@ -32,7 +32,6 @@
bus-frequency = <0>; // From uboot
clock-frequency = <0>; // From uboot
32-bit;
linux,boot-cpu;
};
PowerPC,8641@1 {
device_type = "cpu";
@ -67,7 +66,7 @@
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -76,7 +75,7 @@
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <2b 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
dfsrr;
};
@ -86,31 +85,26 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
reg = <3>;
device_type = "ethernet-phy";
@ -126,8 +120,8 @@
reg = <24000 1000>;
mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <40000>;
phy-handle = <2452000>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
ethernet@25000 {
@ -139,8 +133,8 @@
reg = <25000 1000>;
mac-address = [ 00 E0 0C 00 73 01 ];
interrupts = <23 2 24 2 28 2>;
interrupt-parent = <40000>;
phy-handle = <2452001>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
ethernet@26000 {
@ -152,8 +146,8 @@
reg = <26000 1000>;
mac-address = [ 00 E0 0C 00 02 FD ];
interrupts = <1F 2 20 2 21 2>;
interrupt-parent = <40000>;
phy-handle = <2452002>;
interrupt-parent = <&mpic>;
phy-handle = <&phy2>;
};
ethernet@27000 {
@ -165,8 +159,8 @@
reg = <27000 1000>;
mac-address = [ 00 E0 0C 00 03 FD ];
interrupts = <25 2 26 2 27 2>;
interrupt-parent = <40000>;
phy-handle = <2452003>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
serial@4500 {
device_type = "serial";
@ -174,7 +168,7 @@
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <2a 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
serial@4600 {
@ -183,7 +177,7 @@
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <1c 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
pci@8000 {
@ -197,103 +191,102 @@
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <1fca055>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 4d0 3 2
8800 0 0 2 4d0 4 2
8800 0 0 3 4d0 5 2
8800 0 0 4 4d0 6 2
8800 0 0 1 &i8259 3 2
8800 0 0 2 &i8259 4 2
8800 0 0 3 &i8259 5 2
8800 0 0 4 &i8259 6 2
/* IDSEL 0x12 */
9000 0 0 1 4d0 4 2
9000 0 0 2 4d0 5 2
9000 0 0 3 4d0 6 2
9000 0 0 4 4d0 3 2
9000 0 0 1 &i8259 4 2
9000 0 0 2 &i8259 5 2
9000 0 0 3 &i8259 6 2
9000 0 0 4 &i8259 3 2
/* IDSEL 0x13 */
9800 0 0 1 4d0 0 0
9800 0 0 2 4d0 0 0
9800 0 0 3 4d0 0 0
9800 0 0 4 4d0 0 0
9800 0 0 1 &i8259 0 0
9800 0 0 2 &i8259 0 0
9800 0 0 3 &i8259 0 0
9800 0 0 4 &i8259 0 0
/* IDSEL 0x14 */
a000 0 0 1 4d0 0 0
a000 0 0 2 4d0 0 0
a000 0 0 3 4d0 0 0
a000 0 0 4 4d0 0 0
a000 0 0 1 &i8259 0 0
a000 0 0 2 &i8259 0 0
a000 0 0 3 &i8259 0 0
a000 0 0 4 &i8259 0 0
/* IDSEL 0x15 */
a800 0 0 1 4d0 0 0
a800 0 0 2 4d0 0 0
a800 0 0 3 4d0 0 0
a800 0 0 4 4d0 0 0
a800 0 0 1 &i8259 0 0
a800 0 0 2 &i8259 0 0
a800 0 0 3 &i8259 0 0
a800 0 0 4 &i8259 0 0
/* IDSEL 0x16 */
b000 0 0 1 4d0 0 0
b000 0 0 2 4d0 0 0
b000 0 0 3 4d0 0 0
b000 0 0 4 4d0 0 0
b000 0 0 1 &i8259 0 0
b000 0 0 2 &i8259 0 0
b000 0 0 3 &i8259 0 0
b000 0 0 4 &i8259 0 0
/* IDSEL 0x17 */
b800 0 0 1 4d0 0 0
b800 0 0 2 4d0 0 0
b800 0 0 3 4d0 0 0
b800 0 0 4 4d0 0 0
b800 0 0 1 &i8259 0 0
b800 0 0 2 &i8259 0 0
b800 0 0 3 &i8259 0 0
b800 0 0 4 &i8259 0 0
/* IDSEL 0x18 */
c000 0 0 1 4d0 0 0
c000 0 0 2 4d0 0 0
c000 0 0 3 4d0 0 0
c000 0 0 4 4d0 0 0
c000 0 0 1 &i8259 0 0
c000 0 0 2 &i8259 0 0
c000 0 0 3 &i8259 0 0
c000 0 0 4 &i8259 0 0
/* IDSEL 0x19 */
c800 0 0 1 4d0 0 0
c800 0 0 2 4d0 0 0
c800 0 0 3 4d0 0 0
c800 0 0 4 4d0 0 0
c800 0 0 1 &i8259 0 0
c800 0 0 2 &i8259 0 0
c800 0 0 3 &i8259 0 0
c800 0 0 4 &i8259 0 0
/* IDSEL 0x1a */
d000 0 0 1 4d0 6 2
d000 0 0 2 4d0 3 2
d000 0 0 3 4d0 4 2
d000 0 0 4 4d0 5 2
d000 0 0 1 &i8259 6 2
d000 0 0 2 &i8259 3 2
d000 0 0 3 &i8259 4 2
d000 0 0 4 &i8259 5 2
/* IDSEL 0x1b */
d800 0 0 1 4d0 5 2
d800 0 0 2 4d0 0 0
d800 0 0 3 4d0 0 0
d800 0 0 4 4d0 0 0
d800 0 0 1 &i8259 5 2
d800 0 0 2 &i8259 0 0
d800 0 0 3 &i8259 0 0
d800 0 0 4 &i8259 0 0
/* IDSEL 0x1c */
e000 0 0 1 4d0 9 2
e000 0 0 2 4d0 a 2
e000 0 0 3 4d0 c 2
e000 0 0 4 4d0 7 2
e000 0 0 1 &i8259 9 2
e000 0 0 2 &i8259 a 2
e000 0 0 3 &i8259 c 2
e000 0 0 4 &i8259 7 2
/* IDSEL 0x1d */
e800 0 0 1 4d0 9 2
e800 0 0 2 4d0 a 2
e800 0 0 3 4d0 b 2
e800 0 0 4 4d0 0 0
e800 0 0 1 &i8259 9 2
e800 0 0 2 &i8259 a 2
e800 0 0 3 &i8259 b 2
e800 0 0 4 &i8259 0 0
/* IDSEL 0x1e */
f000 0 0 1 4d0 c 2
f000 0 0 2 4d0 0 0
f000 0 0 3 4d0 0 0
f000 0 0 4 4d0 0 0
f000 0 0 1 &i8259 c 2
f000 0 0 2 &i8259 0 0
f000 0 0 3 &i8259 0 0
f000 0 0 4 &i8259 0 0
/* IDSEL 0x1f */
f800 0 0 1 4d0 6 2
f800 0 0 2 4d0 0 0
f800 0 0 3 4d0 0 0
f800 0 0 4 4d0 0 0
f800 0 0 1 &i8259 6 2
f800 0 0 2 &i8259 0 0
f800 0 0 3 &i8259 0 0
f800 0 0 4 &i8259 0 0
>;
i8259@4d0 {
linux,phandle = <4d0>;
i8259: i8259@4d0 {
clock-frequency = <0>;
interrupt-controller;
device_type = "interrupt-controller";
@ -303,12 +296,11 @@
compatible = "chrp,iic";
big-endian;
interrupts = <49 2>;
interrupt-parent = <40000>;
interrupt-parent = <&mpic>;
};
};
pic@40000 {
linux,phandle = <40000>;
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
@ -317,23 +309,7 @@
built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
interrupts = <
10 2 11 2 12 2 13 2
14 2 15 2 16 2 17 2
18 2 19 2 1a 2 1b 2
1c 2 1d 2 1e 2 1f 2
20 2 21 2 22 2 23 2
24 2 25 2 26 2 27 2
28 2 29 2 2a 2 2b 2
2c 2 2d 2 2e 2 2f 2
30 2 31 2 32 2 33 2
34 2 35 2 36 2 37 2
38 2 39 2 2a 2 3b 2
3c 2 3d 2 3e 2 3f 2
48 1 49 2 4a 1
>;
interrupt-parent = <40000>;
big-endian;
};
};
};

View File

@ -37,7 +37,6 @@
interrupts = <f 2>; // decrementer interrupt
interrupt-parent = <ff000000>;
linux,phandle = <201>;
linux,boot-cpu;
};
};

View File

@ -37,7 +37,6 @@
interrupts = <f 2>; // decrementer interrupt
interrupt-parent = <ff000000>;
linux,phandle = <201>;
linux,boot-cpu;
};
};

View File

@ -147,6 +147,7 @@ CONFIG_PPC_RTAS=y
# CONFIG_RTAS_ERROR_LOGGING is not set
CONFIG_RTAS_PROC=y
CONFIG_RTAS_FLASH=y
CONFIG_PPC_PMI=m
CONFIG_MMIO_NVRAM=y
# CONFIG_PPC_MPC106 is not set
# CONFIG_PPC_970_NAP is not set

View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Fri Jan 26 00:19:45 2007
# Linux kernel version: 2.6.20
# Sat Feb 17 10:09:26 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
@ -63,6 +63,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
@ -129,10 +130,11 @@ CONFIG_PPC_GEN550=y
#
# Platform support
#
# CONFIG_MPC8313_RDB is not set
# CONFIG_MPC832x_MDS is not set
# CONFIG_MPC834x_SYS is not set
# CONFIG_MPC834x_MDS is not set
# CONFIG_MPC834x_ITX is not set
CONFIG_MPC8360E_PB=y
CONFIG_MPC836x_MDS=y
CONFIG_PPC_MPC836x=y
# CONFIG_MPIC is not set
@ -162,6 +164,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
@ -171,6 +174,7 @@ CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
CONFIG_GENERIC_ISA_DMA=y
# CONFIG_MPIC_WEIRD is not set
# CONFIG_PPC_I8259 is not set
@ -219,6 +223,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
@ -528,6 +533,7 @@ CONFIG_UCC_GETH=y
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
@ -620,6 +626,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@ -690,6 +697,7 @@ CONFIG_I2C_MPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PASEMI is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
# CONFIG_I2C_SIS5595 is not set
@ -804,6 +812,7 @@ CONFIG_FIRMWARE_EDID=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
@ -867,6 +876,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
@ -1011,7 +1024,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
#
# Instrumentation Support
@ -1060,8 +1074,10 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
@ -1075,6 +1091,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
#

View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Wed Feb 7 23:54:25 2007
# Linux kernel version: 2.6.20
# Sat Feb 17 16:26:53 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
# CONFIG_PPC_83xx is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_85xx=y
CONFIG_E500=y
@ -63,6 +63,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
@ -130,7 +131,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
CONFIG_MPC8568_MDS=y
CONFIG_MPC85xx_MDS=y
CONFIG_MPC85xx=y
CONFIG_PPC_INDIRECT_PCI_BE=y
CONFIG_MPIC=y
@ -162,6 +163,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
@ -171,6 +173,7 @@ CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
# CONFIG_MPIC_WEIRD is not set
# CONFIG_PPC_I8259 is not set
CONFIG_PPC_INDIRECT_PCI=y
@ -216,6 +219,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
@ -301,6 +305,7 @@ CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
#
@ -341,7 +346,6 @@ CONFIG_BLK_DEV_INITRD=y
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
@ -543,6 +547,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@ -698,6 +703,7 @@ CONFIG_FIRMWARE_EDID=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
@ -759,6 +765,10 @@ CONFIG_HID=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
@ -896,7 +906,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
#
# Instrumentation Support
@ -914,6 +925,7 @@ CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
@ -922,7 +934,6 @@ CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
@ -932,6 +943,8 @@ CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_DEBUG_LIST is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUGGER=y
# CONFIG_XMON is not set
# CONFIG_BDI_SWITCH is not set
@ -943,6 +956,8 @@ CONFIG_PPC_EARLY_DEBUG=y
# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
#
# Security options
@ -970,8 +985,10 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
@ -985,6 +1002,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
#

View File

@ -500,7 +500,7 @@ CONFIG_BLK_DEV_AMD74XX=y
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
CONFIG_BLK_DEV_SL82C105=y
# CONFIG_BLK_DEV_SL82C105 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
@ -646,7 +646,7 @@ CONFIG_SATA_SVW=y
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
CONFIG_PATA_WINBOND=y
#
# Multi-device support (RAID and LVM)

View File

@ -483,7 +483,7 @@ CONFIG_BLK_DEV_AMD74XX=y
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
CONFIG_BLK_DEV_SL82C105=y
# CONFIG_BLK_DEV_SL82C105 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
@ -628,7 +628,7 @@ CONFIG_ATA=y
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
CONFIG_PATA_WINBOND=y
#
# Multi-device support (RAID and LVM)

View File

@ -1599,6 +1599,7 @@ struct property *of_find_property(const struct device_node *np,
return pp;
}
EXPORT_SYMBOL(of_find_property);
/*
* Find a property with a given name for a given node

View File

@ -5,6 +5,7 @@
#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <asm/prom.h>
#include <asm/pci-bridge.h>
@ -1003,3 +1004,42 @@ int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq
return res;
}
EXPORT_SYMBOL_GPL(of_irq_map_one);
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
* address. If that isn't set, then 'local-mac-address' is checked next,
* because that is the default address. If that isn't set, then the obsolete
* 'address' is checked, just in case we're using an old device tree.
*
* Note that the 'address' property is supposed to contain a virtual address of
* the register set, but some DTS files have redefined that property to be the
* MAC address.
*
* All-zero MAC addresses are rejected, because those could be properties that
* exist in the device tree, but were not set by U-Boot. For example, the
* DTS could define 'mac-address' and 'local-mac-address', with zero MAC
* addresses. Some older U-Boots only initialized 'local-mac-address'. In
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*/
const void *of_get_mac_address(struct device_node *np)
{
struct property *pp;
pp = of_find_property(np, "mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "local-mac-address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
pp = of_find_property(np, "address", NULL);
if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
return pp->value;
return NULL;
}
EXPORT_SYMBOL(of_get_mac_address);

View File

@ -103,7 +103,7 @@ static int map_io_page(unsigned long ea, unsigned long pa, int flags)
*
*/
if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
mmu_virtual_psize)) {
mmu_io_psize)) {
printk(KERN_ERR "Failed to do bolted mapping IO "
"memory at %016lx !\n", pa);
return -ENOMEM;

View File

@ -38,12 +38,12 @@ config MPC834x_ITX
Be aware that PCI initialization is the bootloader's
responsibility.
config MPC8360E_PB
bool "Freescale MPC8360E PB"
config MPC836x_MDS
bool "Freescale MPC836x MDS"
select DEFAULT_UIMAGE
select QUICC_ENGINE
help
This option enables support for the MPC836x EMDS Processor Board.
This option enables support for the MPC836x MDS Processor Board.
endchoice
@ -69,6 +69,6 @@ config PPC_MPC836x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC8360E_PB
default y if MPC836x_MDS
endmenu

View File

@ -6,5 +6,5 @@ obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o

View File

@ -74,16 +74,9 @@ void __init mpc8313_rdb_init_IRQ(void)
*/
static int __init mpc8313_rdb_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8313ERDB"))
return 0;
unsigned long root = of_get_flat_dt_root();
DBG("MPC8313 RDB found\n");
return 1;
return of_flat_dt_is_compatible(root, "MPC8313ERDB");
}
define_machine(mpc8313_rdb) {

View File

@ -57,11 +57,6 @@ unsigned long isa_mem_base = 0;
static u8 *bcsr_regs = NULL;
u8 *get_bcsr(void)
{
return bcsr_regs;
}
/* ************************************************************************
*
* Setup the architecture
@ -74,17 +69,6 @@ static void __init mpc832x_sys_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc832x_sys_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
unsigned int *fp =
(int *)get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np != 0) {
@ -121,34 +105,23 @@ static void __init mpc832x_sys_setup_arch(void)
iounmap(bcsr_regs);
of_node_put(np);
}
#endif /* CONFIG_QUICC_ENGINE */
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static struct of_device_id mpc832x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc832x_declare_of_platform_devices(void)
{
struct device_node *np;
if (!machine_is(mpc832x_mds))
return 0;
for (np = NULL; (np = of_find_compatible_node(np, "network",
"ucc_geth")) != NULL;) {
int ucc_num;
char bus_id[BUS_ID_SIZE];
ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
of_platform_device_create(np, bus_id, NULL);
}
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc832x_ids, NULL);
return 0;
}
@ -156,7 +129,6 @@ device_initcall(mpc832x_declare_of_platform_devices);
static void __init mpc832x_sys_init_IRQ(void)
{
struct device_node *np;
np = of_find_node_by_type(NULL, "ipic");
@ -189,6 +161,9 @@ static int __init mpc832x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc832x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -207,17 +182,9 @@ late_initcall(mpc832x_rtc_hookup);
*/
static int __init mpc832x_sys_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
unsigned long root = of_get_flat_dt_root();
if (model == NULL)
return 0;
if (strcmp(model, "MPC8323EMDS"))
return 0;
DBG("%s found\n", model);
return 1;
return of_flat_dt_is_compatible(root, "MPC832xMDS");
}
define_machine(mpc832x_mds) {

View File

@ -55,28 +55,12 @@ static void __init mpc834x_itx_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc834x_itx_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void __init mpc834x_itx_init_IRQ(void)
@ -100,10 +84,9 @@ static void __init mpc834x_itx_init_IRQ(void)
*/
static int __init mpc834x_itx_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC834xMITX");
}
define_machine(mpc834x_itx) {

View File

@ -125,17 +125,6 @@ static void __init mpc834x_mds_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc834x_mds_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
#ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
@ -144,12 +133,6 @@ static void __init mpc834x_mds_setup_arch(void)
#endif
mpc834x_usb_cfg();
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void __init mpc834x_mds_init_IRQ(void)
@ -176,6 +159,9 @@ static int __init mpc834x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc834x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -194,10 +180,9 @@ late_initcall(mpc834x_rtc_hookup);
*/
static int __init mpc834x_mds_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC834xMDS");
}
define_machine(mpc834x_mds) {

View File

@ -5,12 +5,12 @@
* Yin Olivia <Hong-hua.Yin@freescale.com>
*
* Description:
* MPC8360E MDS PB board specific routines.
* MPC8360E MDS board specific routines.
*
* Changelog:
* Jun 21, 2006 Initial version
*
* This program is free software; you can redistribute it and/or modify it
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
@ -62,33 +62,17 @@ unsigned long isa_mem_base = 0;
static u8 *bcsr_regs = NULL;
u8 *get_bcsr(void)
{
return bcsr_regs;
}
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc8360_sys_setup_arch(void)
static void __init mpc836x_mds_setup_arch(void)
{
struct device_node *np;
if (ppc_md.progress)
ppc_md.progress("mpc8360_sys_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
const unsigned int *fp =
get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
loops_per_jiffy = 50000000 / HZ;
of_node_put(np);
}
ppc_md.progress("mpc836x_mds_setup_arch()", 0);
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
@ -128,40 +112,29 @@ static void __init mpc8360_sys_setup_arch(void)
}
#endif /* CONFIG_QUICC_ENGINE */
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static int __init mpc8360_declare_of_platform_devices(void)
static struct of_device_id mpc836x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc836x_declare_of_platform_devices(void)
{
struct device_node *np;
if (!machine_is(mpc836x_mds))
return 0;
for (np = NULL; (np = of_find_compatible_node(np, "network",
"ucc_geth")) != NULL;) {
int ucc_num;
char bus_id[BUS_ID_SIZE];
ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
of_platform_device_create(np, bus_id, NULL);
}
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc836x_ids, NULL);
return 0;
}
device_initcall(mpc8360_declare_of_platform_devices);
device_initcall(mpc836x_declare_of_platform_devices);
static void __init mpc8360_sys_init_IRQ(void)
static void __init mpc836x_mds_init_IRQ(void)
{
struct device_node *np;
np = of_find_node_by_type(NULL, "ipic");
@ -194,6 +167,9 @@ static int __init mpc8360_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc836x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
@ -210,28 +186,21 @@ late_initcall(mpc8360_rtc_hookup);
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc8360_sys_probe(void)
static int __init mpc836x_mds_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8360EPB"))
return 0;
unsigned long root = of_get_flat_dt_root();
DBG("MPC8360EMDS-PB found\n");
return 1;
return of_flat_dt_is_compatible(root, "MPC836xMDS");
}
define_machine(mpc8360_sys) {
.name = "MPC8360E PB",
.probe = mpc8360_sys_probe,
.setup_arch = mpc8360_sys_setup_arch,
.init_IRQ = mpc8360_sys_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,
define_machine(mpc836x_mds) {
.name = "MPC836x MDS",
.probe = mpc836x_mds_probe,
.setup_arch = mpc836x_mds_setup_arch,
.init_IRQ = mpc836x_mds_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
.progress = udbg_progress,
};

View File

@ -23,12 +23,12 @@ config MPC85xx_CDS
help
This option enables support for the MPC85xx CDS board
config MPC8568_MDS
bool "Freescale MPC8568 MDS"
config MPC85xx_MDS
bool "Freescale MPC85xx MDS"
select DEFAULT_UIMAGE
# select QUICC_ENGINE
help
This option enables support for the MPC8568 MDS board
This option enables support for the MPC85xx MDS board
endchoice
@ -47,7 +47,7 @@ config MPC85xx
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC85xx_MDS
config PPC_INDIRECT_PCI_BE
bool

View File

@ -5,4 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o

View File

@ -17,7 +17,6 @@
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/time.h>
@ -245,12 +244,6 @@ static void __init mpc85xx_ads_setup_arch(void)
add_bridge(np);
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
@ -279,10 +272,9 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
*/
static int __init mpc85xx_ads_probe(void)
{
/* We always match for now, eventually we should look at the flat
dev tree to ensure this is the board we are suppose to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC85xxADS");
}
define_machine(mpc85xx_ads) {

View File

@ -22,7 +22,6 @@
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/fsl_devices.h>
@ -263,12 +262,6 @@ static void __init mpc85xx_cds_setup_arch(void)
ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
}
static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
@ -298,11 +291,9 @@ static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
*/
static int __init mpc85xx_cds_probe(void)
{
/* We always match for now, eventually we should look at
* the flat dev tree to ensure this is the board we are
* supposed to run on
*/
return 1;
unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "MPC85xxCDS");
}
define_machine(mpc85xx_cds) {

View File

@ -8,7 +8,7 @@
* Yin Olivia <Hong-hua.Yin@freescale.com>
*
* Description:
* MPC8568E MDS PB board specific routines.
* MPC85xx MDS board specific routines.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@ -27,7 +27,6 @@
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/fsl_devices.h>
@ -70,14 +69,13 @@ unsigned long isa_mem_base = 0;
* Setup the architecture
*
*/
static void __init mpc8568_mds_setup_arch(void)
static void __init mpc85xx_mds_setup_arch(void)
{
struct device_node *np;
static u8 *bcsr_regs = NULL;
if (ppc_md.progress)
ppc_md.progress("mpc8568_mds_setup_arch()", 0);
ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
np = of_find_node_by_type(NULL, "cpu");
if (np != NULL) {
@ -145,26 +143,26 @@ static void __init mpc8568_mds_setup_arch(void)
#endif /* CONFIG_QUICC_ENGINE */
}
static struct of_device_id mpc8568_ids[] = {
static struct of_device_id mpc85xx_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
{},
};
static int __init mpc8568_publish_devices(void)
static int __init mpc85xx_publish_devices(void)
{
if (!machine_is(mpc8568_mds))
if (!machine_is(mpc85xx_mds))
return 0;
/* Publish the QE devices */
of_platform_bus_probe(NULL,mpc8568_ids,NULL);
of_platform_bus_probe(NULL,mpc85xx_ids,NULL);
return 0;
}
device_initcall(mpc8568_publish_devices);
device_initcall(mpc85xx_publish_devices);
static void __init mpc8568_mds_pic_init(void)
static void __init mpc85xx_mds_pic_init(void)
{
struct mpic *mpic;
struct resource r;
@ -207,7 +205,6 @@ static void __init mpc8568_mds_pic_init(void)
mpic_init(mpic);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_node_by_type(NULL, "qeic");
if (!np)
@ -218,27 +215,18 @@ static void __init mpc8568_mds_pic_init(void)
#endif /* CONFIG_QUICC_ENGINE */
}
static int __init mpc8568_mds_probe(void)
static int __init mpc85xx_mds_probe(void)
{
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
"model", NULL);
if (model == NULL)
return 0;
if (strcmp(model, "MPC8568EMDS"))
return 0;
unsigned long root = of_get_flat_dt_root();
DBG("MPC8568EMDS found\n");
return 1;
return of_flat_dt_is_compatible(root, "MPC85xxMDS");
}
define_machine(mpc8568_mds) {
.name = "MPC8568E MDS",
.probe = mpc8568_mds_probe,
.setup_arch = mpc8568_mds_setup_arch,
.init_IRQ = mpc8568_mds_pic_init,
define_machine(mpc85xx_mds) {
.name = "MPC85xx MDS",
.probe = mpc85xx_mds_probe,
.setup_arch = mpc85xx_mds_setup_arch,
.init_IRQ = mpc85xx_mds_pic_init,
.get_irq = mpic_get_irq,
.restart = mpc85xx_restart,
.calibrate_decr = generic_calibrate_decr,

View File

@ -18,7 +18,6 @@
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/time.h>
@ -120,6 +119,8 @@ mpc86xx_hpcn_init_irq(void)
DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
i8259_init(cascade_node, 0);
of_node_put(cascade_node);
set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
#endif
}
@ -365,12 +366,6 @@ mpc86xx_hpcn_setup_arch(void)
printk("MPC86xx HPCN board from Freescale Semiconductor\n");
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDA1;
#endif
#ifdef CONFIG_SMP
mpc86xx_smp_init();
#endif

View File

@ -1,9 +1,8 @@
obj-y += interrupt.o iommu.o setup.o \
htab.o beat.o pci.o \
scc_epci.o hvCall.o
scc_epci.o scc_uhc.o hvCall.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_PPC_UDBG_BEAT) += udbg_beat.o
obj-$(CONFIG_USB) += scc_uhc.o
obj-$(CONFIG_HAS_TXX9_SERIAL) += scc_sio.o
obj-$(CONFIG_SPU_BASE) += spu_priv1.o

View File

@ -137,10 +137,12 @@ static int celleb_check_legacy_ioport(unsigned int baseport)
return -ENODEV;
}
#ifdef CONFIG_KEXEC
static void celleb_kexec_cpu_down(int crash, int secondary)
{
beatic_deinit_IRQ();
}
#endif
static struct of_device_id celleb_bus_ids[] = {
{ .type = "scc", },

View File

@ -62,4 +62,14 @@ config PS3_PS3AV
This support is required for graphics and sound. In
general, all users will say Y or M.
config PS3_SYS_MANAGER
bool "PS3 System Manager driver"
select PS3_VUART
default y
help
Include support for the PS3 System Manager.
This support is required for system control. In
general, all users will say Y.
endmenu

View File

@ -42,6 +42,10 @@
#define DBG(fmt...) do{if(0)printk(fmt);}while(0)
#endif
#if !defined(CONFIG_SMP)
static void smp_send_stop(void) {}
#endif
int ps3_get_firmware_version(union ps3_firmware_version *v)
{
int result = lv1_get_version_info(&v->raw);
@ -66,22 +70,35 @@ static void ps3_power_save(void)
lv1_pause(0);
}
static void ps3_restart(char *cmd)
{
DBG("%s:%d cmd '%s'\n", __func__, __LINE__, cmd);
smp_send_stop();
ps3_sys_manager_restart(); /* never returns */
}
static void ps3_power_off(void)
{
DBG("%s:%d\n", __func__, __LINE__);
smp_send_stop();
ps3_sys_manager_power_off(); /* never returns */
}
static void ps3_panic(char *str)
{
DBG("%s:%d %s\n", __func__, __LINE__, str);
#ifdef CONFIG_SMP
smp_send_stop();
#endif
printk("\n");
printk(" System does not reboot automatically.\n");
printk(" Please press POWER button.\n");
printk("\n");
for (;;) ;
while(1);
}
static void prealloc(struct ps3_prealloc *p)
{
if (!p->size)
@ -219,6 +236,8 @@ define_machine(ps3) {
.get_rtc_time = ps3_get_rtc_time,
.calibrate_decr = ps3_calibrate_decr,
.progress = ps3_progress,
.restart = ps3_restart,
.power_off = ps3_power_off,
#if defined(CONFIG_KEXEC)
.kexec_cpu_down = ps3_kexec_cpu_down,
.machine_kexec = ps3_machine_kexec,

View File

@ -4,7 +4,7 @@ endif
obj-y := pci.o lpar.o hvCall.o nvram.o reconfig.o \
setup.o iommu.o ras.o rtasd.o pci_dlpar.o \
firmware.o
firmware.o power.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_XICS) += xics.o
obj-$(CONFIG_SCANLOG) += scanlog.o

View File

@ -0,0 +1,87 @@
/*
* Interface for power-management for ppc64 compliant platform
*
* Manish Ahuja <mahuja@us.ibm.com>
*
* Feb 2007
*
* Copyright (C) 2007 IBM Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kobject.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/init.h>
unsigned long rtas_poweron_auto; /* default and normal state is 0 */
static ssize_t auto_poweron_show(struct subsystem *subsys, char *buf)
{
return sprintf(buf, "%lu\n", rtas_poweron_auto);
}
static ssize_t
auto_poweron_store(struct subsystem *subsys, const char *buf, size_t n)
{
int ret;
unsigned long ups_restart;
ret = sscanf(buf, "%lu", &ups_restart);
if ((ret == 1) && ((ups_restart == 1) || (ups_restart == 0))){
rtas_poweron_auto = ups_restart;
return n;
}
return -EINVAL;
}
static struct subsys_attribute auto_poweron_attr = {
.attr = {
.name = __stringify(auto_poweron),
.mode = 0644,
},
.show = auto_poweron_show,
.store = auto_poweron_store,
};
#ifndef CONFIG_PM
decl_subsys(power,NULL,NULL);
static struct attribute *g[] = {
&auto_poweron_attr.attr,
NULL,
};
static struct attribute_group attr_group = {
.attrs = g,
};
static int __init pm_init(void)
{
int error = subsystem_register(&power_subsys);
if (!error)
error = sysfs_create_group(&power_subsys.kset.kobj,&attr_group);
return error;
}
core_initcall(pm_init);
#else
extern struct subsystem power_subsys;
static int __init apo_pm_init(void)
{
return (subsys_create_file(&power_subsys, &auto_poweron_attr));
}
__initcall(apo_pm_init);
#endif

View File

@ -29,8 +29,11 @@ static inline smp_init_pseries_xics(void) { };
extern void setup_kexec_cpu_down_xics(void);
extern void setup_kexec_cpu_down_mpic(void);
#else
static inline setup_kexec_cpu_down_xics(void) { };
static inline setup_kexec_cpu_down_mpic(void) { };
static inline void setup_kexec_cpu_down_xics(void) { }
static inline void setup_kexec_cpu_down_mpic(void) { }
#endif
/* Poweron flag used for enabling auto ups restart */
extern unsigned long rtas_poweron_auto;
#endif /* _PSERIES_PSERIES_H */

View File

@ -486,6 +486,34 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
return PCI_PROBE_NORMAL;
}
/**
* pSeries_power_off - tell firmware about how to power off the system.
*
* This function calls either the power-off rtas token in normal cases
* or the ibm,power-off-ups token (if present & requested) in case of
* a power failure. If power-off token is used, power on will only be
* possible with power button press. If ibm,power-off-ups token is used
* it will allow auto poweron after power is restored.
*/
void pSeries_power_off(void)
{
int rc;
int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
if (rtas_flash_term_hook)
rtas_flash_term_hook(SYS_POWER_OFF);
if (rtas_poweron_auto == 0 ||
rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
printk(KERN_INFO "RTAS power-off returned %d\n", rc);
} else {
rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
}
for (;;);
}
define_machine(pseries) {
.name = "pSeries",
.probe = pSeries_probe,
@ -496,7 +524,7 @@ define_machine(pseries) {
.pcibios_fixup = pSeries_final_fixup,
.pci_probe_mode = pSeries_pci_probe_mode,
.restart = rtas_restart,
.power_off = rtas_power_off,
.power_off = pSeries_power_off,
.halt = rtas_halt,
.panic = rtas_os_term,
.get_boot_time = rtas_get_boot_time,

View File

@ -7,6 +7,7 @@ obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
obj-$(CONFIG_PPC_MPC106) += grackle.o
obj-$(CONFIG_PPC_DCR) += dcr.o
obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
obj-$(CONFIG_PPC_PMI) += pmi.o
obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o

View File

@ -233,14 +233,7 @@ static int __init gfar_of_init(void)
goto err;
}
mac_addr = get_property(np, "local-mac-address", NULL);
if (mac_addr == NULL)
mac_addr = get_property(np, "mac-address", NULL);
if (mac_addr == NULL) {
/* Obsolete */
mac_addr = get_property(np, "address", NULL);
}
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(gfar_data.mac_addr, mac_addr, 6);
@ -646,8 +639,9 @@ static int __init fs_enet_of_init(void)
goto unreg;
}
mac_addr = get_property(np, "mac-address", NULL);
memcpy(fs_enet_data.macaddr, mac_addr, 6);
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(fs_enet_data.macaddr, mac_addr, 6);
ph = get_property(np, "phy-handle", NULL);
phy = of_find_node_by_phandle(*ph);
@ -931,8 +925,9 @@ static int __init fs_enet_of_init(void)
goto err;
r[0].name = enet_regs;
mac_addr = (void *)get_property(np, "mac-address", NULL);
memcpy(fs_enet_data.macaddr, mac_addr, 6);
mac_addr = of_get_mac_address(np);
if (mac_addr)
memcpy(fs_enet_data.macaddr, mac_addr, 6);
ph = (phandle *) get_property(np, "phy-handle", NULL);
if (ph != NULL)

View File

@ -1370,7 +1370,7 @@ void mpic_request_ipis(void)
printk(KERN_ERR "Failed to map IPI %d\n", i);
break;
}
request_irq(vipi, mpic_ipi_action, IRQF_DISABLED,
request_irq(vipi, mpic_ipi_action, IRQF_DISABLED|IRQF_PERCPU,
ipi_names[i], mpic);
}
}

305
arch/powerpc/sysdev/pmi.c Normal file
View File

@ -0,0 +1,305 @@
/*
* pmi driver
*
* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
*
* PMI (Platform Management Interrupt) is a way to communicate
* with the BMC (Baseboard Management Controller) via interrupts.
* Unlike IPMI it is bidirectional and has a low latency.
*
* Author: Christian Krafft <krafft@de.ibm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <asm/of_device.h>
#include <asm/of_platform.h>
#include <asm/io.h>
#include <asm/pmi.h>
struct pmi_data {
struct list_head handler;
spinlock_t handler_spinlock;
spinlock_t pmi_spinlock;
struct mutex msg_mutex;
pmi_message_t msg;
struct completion *completion;
struct of_device *dev;
int irq;
u8 __iomem *pmi_reg;
struct work_struct work;
};
static void __iomem *of_iomap(struct device_node *np)
{
struct resource res;
if (of_address_to_resource(np, 0, &res))
return NULL;
pr_debug("Resource start: 0x%lx\n", res.start);
pr_debug("Resource end: 0x%lx\n", res.end);
return ioremap(res.start, 1 + res.end - res.start);
}
static int pmi_irq_handler(int irq, void *dev_id)
{
struct pmi_data *data;
u8 type;
int rc;
data = dev_id;
spin_lock(&data->pmi_spinlock);
type = ioread8(data->pmi_reg + PMI_READ_TYPE);
pr_debug("pmi: got message of type %d\n", type);
if (type & PMI_ACK && !data->completion) {
printk(KERN_WARNING "pmi: got unexpected ACK message.\n");
rc = -EIO;
goto unlock;
}
if (data->completion && !(type & PMI_ACK)) {
printk(KERN_WARNING "pmi: expected ACK, but got %d\n", type);
rc = -EIO;
goto unlock;
}
data->msg.type = type;
data->msg.data0 = ioread8(data->pmi_reg + PMI_READ_DATA0);
data->msg.data1 = ioread8(data->pmi_reg + PMI_READ_DATA1);
data->msg.data2 = ioread8(data->pmi_reg + PMI_READ_DATA2);
rc = 0;
unlock:
spin_unlock(&data->pmi_spinlock);
if (rc == -EIO) {
rc = IRQ_HANDLED;
goto out;
}
if (data->msg.type & PMI_ACK) {
complete(data->completion);
rc = IRQ_HANDLED;
goto out;
}
schedule_work(&data->work);
rc = IRQ_HANDLED;
out:
return rc;
}
static struct of_device_id pmi_match[] = {
{ .type = "ibm,pmi", .name = "ibm,pmi" },
{},
};
MODULE_DEVICE_TABLE(of, pmi_match);
static void pmi_notify_handlers(struct work_struct *work)
{
struct pmi_data *data;
struct pmi_handler *handler;
data = container_of(work, struct pmi_data, work);
spin_lock(&data->handler_spinlock);
list_for_each_entry(handler, &data->handler, node) {
pr_debug(KERN_INFO "pmi: notifying handler %p\n", handler);
if (handler->type == data->msg.type)
handler->handle_pmi_message(data->dev, data->msg);
}
spin_unlock(&data->handler_spinlock);
}
static int pmi_of_probe(struct of_device *dev,
const struct of_device_id *match)
{
struct device_node *np = dev->node;
struct pmi_data *data;
int rc;
data = kzalloc(sizeof(struct pmi_data), GFP_KERNEL);
if (!data) {
printk(KERN_ERR "pmi: could not allocate memory.\n");
rc = -ENOMEM;
goto out;
}
data->pmi_reg = of_iomap(np);
if (!data->pmi_reg) {
printk(KERN_ERR "pmi: invalid register address.\n");
rc = -EFAULT;
goto error_cleanup_data;
}
INIT_LIST_HEAD(&data->handler);
mutex_init(&data->msg_mutex);
spin_lock_init(&data->pmi_spinlock);
spin_lock_init(&data->handler_spinlock);
INIT_WORK(&data->work, pmi_notify_handlers);
dev->dev.driver_data = data;
data->dev = dev;
data->irq = irq_of_parse_and_map(np, 0);
if (data->irq == NO_IRQ) {
printk(KERN_ERR "pmi: invalid interrupt.\n");
rc = -EFAULT;
goto error_cleanup_iomap;
}
rc = request_irq(data->irq, pmi_irq_handler, 0, "pmi", data);
if (rc) {
printk(KERN_ERR "pmi: can't request IRQ %d: returned %d\n",
data->irq, rc);
goto error_cleanup_iomap;
}
printk(KERN_INFO "pmi: found pmi device at addr %p.\n", data->pmi_reg);
goto out;
error_cleanup_iomap:
iounmap(data->pmi_reg);
error_cleanup_data:
kfree(data);
out:
return rc;
}
static int pmi_of_remove(struct of_device *dev)
{
struct pmi_data *data;
struct pmi_handler *handler, *tmp;
data = dev->dev.driver_data;
free_irq(data->irq, data);
iounmap(data->pmi_reg);
spin_lock(&data->handler_spinlock);
list_for_each_entry_safe(handler, tmp, &data->handler, node)
list_del(&handler->node);
spin_unlock(&data->handler_spinlock);
kfree(dev->dev.driver_data);
return 0;
}
static struct of_platform_driver pmi_of_platform_driver = {
.name = "pmi",
.match_table = pmi_match,
.probe = pmi_of_probe,
.remove = pmi_of_remove
};
static int __init pmi_module_init(void)
{
return of_register_platform_driver(&pmi_of_platform_driver);
}
module_init(pmi_module_init);
static void __exit pmi_module_exit(void)
{
of_unregister_platform_driver(&pmi_of_platform_driver);
}
module_exit(pmi_module_exit);
void pmi_send_message(struct of_device *device, pmi_message_t msg)
{
struct pmi_data *data;
unsigned long flags;
DECLARE_COMPLETION_ONSTACK(completion);
data = device->dev.driver_data;
mutex_lock(&data->msg_mutex);
data->msg = msg;
pr_debug("pmi_send_message: msg is %08x\n", *(u32*)&msg);
data->completion = &completion;
spin_lock_irqsave(&data->pmi_spinlock, flags);
iowrite8(msg.data0, data->pmi_reg + PMI_WRITE_DATA0);
iowrite8(msg.data1, data->pmi_reg + PMI_WRITE_DATA1);
iowrite8(msg.data2, data->pmi_reg + PMI_WRITE_DATA2);
iowrite8(msg.type, data->pmi_reg + PMI_WRITE_TYPE);
spin_unlock_irqrestore(&data->pmi_spinlock, flags);
pr_debug("pmi_send_message: wait for completion\n");
wait_for_completion_interruptible_timeout(data->completion,
PMI_TIMEOUT);
data->completion = NULL;
mutex_unlock(&data->msg_mutex);
}
EXPORT_SYMBOL_GPL(pmi_send_message);
void pmi_register_handler(struct of_device *device,
struct pmi_handler *handler)
{
struct pmi_data *data;
data = device->dev.driver_data;
spin_lock(&data->handler_spinlock);
list_add_tail(&handler->node, &data->handler);
spin_unlock(&data->handler_spinlock);
}
EXPORT_SYMBOL_GPL(pmi_register_handler);
void pmi_unregister_handler(struct of_device *device,
struct pmi_handler *handler)
{
struct pmi_data *data;
pr_debug("pmi: unregistering handler %p\n", handler);
data = device->dev.driver_data;
spin_lock(&data->handler_spinlock);
list_del(&handler->node);
spin_unlock(&data->handler_spinlock);
}
EXPORT_SYMBOL_GPL(pmi_unregister_handler);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
MODULE_DESCRIPTION("IBM Platform Management Interrupt driver");

View File

@ -1,13 +1,12 @@
/*
* arch/powerpc/sysdev/qe_lib/ucc_fast.c
*
* QE UCC Fast API Set - UCC Fast specific routines implementations.
*
* Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
*
* Authors: Shlomi Gridish <gridish@freescale.com>
* Li Yang <leoli@freescale.com>
*
* Description:
* QE UCC Fast API Set - UCC Fast specific routines implementations.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@ -27,79 +26,61 @@
#include <asm/ucc.h>
#include <asm/ucc_fast.h>
#define uccf_printk(level, format, arg...) \
printk(level format "\n", ## arg)
#define uccf_dbg(format, arg...) \
uccf_printk(KERN_DEBUG , format , ## arg)
#define uccf_err(format, arg...) \
uccf_printk(KERN_ERR , format , ## arg)
#define uccf_info(format, arg...) \
uccf_printk(KERN_INFO , format , ## arg)
#define uccf_warn(format, arg...) \
uccf_printk(KERN_WARNING , format , ## arg)
#ifdef UCCF_VERBOSE_DEBUG
#define uccf_vdbg uccf_dbg
#else
#define uccf_vdbg(fmt, args...) do { } while (0)
#endif /* UCCF_VERBOSE_DEBUG */
void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
{
uccf_info("UCC%d Fast registers:", uccf->uf_info->ucc_num);
uccf_info("Base address: 0x%08x", (u32) uccf->uf_regs);
printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
uccf_info("gumr : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
uccf_info("upsmr : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
uccf_info("utodr : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
uccf_info("udsr : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
uccf_info("ucce : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
uccf_info("uccm : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
uccf_info("uccs : addr - 0x%08x, val - 0x%02x",
printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x",
(u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
uccf_info("urfb : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
uccf_info("urfs : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
uccf_info("urfet : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
uccf_info("urfset: addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->urfset,
in_be16(&uccf->uf_regs->urfset));
uccf_info("utfb : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
uccf_info("utfs : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
uccf_info("utfet : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
uccf_info("utftt : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
uccf_info("utpt : addr - 0x%08x, val - 0x%04x",
printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x",
(u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
uccf_info("urtry : addr - 0x%08x, val - 0x%08x",
printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
(u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
uccf_info("guemr : addr - 0x%08x, val - 0x%02x",
printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
(u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
}
u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
{
switch (uccf_num) {
case 0: return QE_CR_SUBBLOCK_UCCFAST1;
case 0: return QE_CR_SUBBLOCK_UCCFAST1;
case 1: return QE_CR_SUBBLOCK_UCCFAST2;
case 2: return QE_CR_SUBBLOCK_UCCFAST3;
case 3: return QE_CR_SUBBLOCK_UCCFAST4;
case 4: return QE_CR_SUBBLOCK_UCCFAST5;
case 5: return QE_CR_SUBBLOCK_UCCFAST6;
case 6: return QE_CR_SUBBLOCK_UCCFAST7;
case 7: return QE_CR_SUBBLOCK_UCCFAST8;
case 7: return QE_CR_SUBBLOCK_UCCFAST8;
default: return QE_CR_SUBBLOCK_INVALID;
}
}
@ -153,84 +134,72 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
{
struct ucc_fast_private *uccf;
struct ucc_fast *uf_regs;
u32 gumr = 0;
u32 gumr;
int ret;
uccf_vdbg("%s: IN", __FUNCTION__);
if (!uf_info)
return -EINVAL;
/* check if the UCC port number is in range. */
if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
uccf_err("ucc_fast_init: Illegal UCC number!");
printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
return -EINVAL;
}
/* Check that 'max_rx_buf_length' is properly aligned (4). */
if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
uccf_err("ucc_fast_init: max_rx_buf_length not aligned.");
printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
return -EINVAL;
}
/* Validate Virtual Fifo register values */
if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfs too small.");
printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfs not aligned.");
printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfet not aligned.");
printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
return -EINVAL;
}
if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register urfset not aligned.");
printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utfs not aligned.");
printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utfet not aligned.");
printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
return -EINVAL;
}
if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
uccf_err
("ucc_fast_init: Virtual Fifo register utftt not aligned.");
printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
return -EINVAL;
}
uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
if (!uccf) {
uccf_err
("ucc_fast_init: No memory for UCC slow data structure!");
printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
return -ENOMEM;
}
/* Fill fast UCC structure */
uccf->uf_info = uf_info;
/* Set the PHY base address */
uccf->uf_regs =
(struct ucc_fast *) ioremap(uf_info->regs, sizeof(struct ucc_fast));
uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
if (uccf->uf_regs == NULL) {
uccf_err
("ucc_fast_init: No memory map for UCC slow controller!");
printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
return -ENOMEM;
}
@ -249,7 +218,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Init Guemr register */
if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
uccf_err("ucc_fast_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
ucc_fast_free(uccf);
return ret;
}
@ -258,7 +227,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
if ((ret = ucc_set_type(uf_info->ucc_num,
(struct ucc_common *) (uf_regs),
UCC_SPEED_TYPE_FAST))) {
uccf_err("ucc_fast_init: Could not set type to fast.");
printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
ucc_fast_free(uccf);
return ret;
}
@ -267,10 +236,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Set GUMR */
/* For more details see the hardware spec. */
/* gumr starts as zero. */
gumr = uf_info->ttx_trx;
if (uf_info->tci)
gumr |= UCC_FAST_GUMR_TCI;
gumr |= uf_info->ttx_trx;
if (uf_info->cdp)
gumr |= UCC_FAST_GUMR_CDP;
if (uf_info->ctsp)
@ -298,9 +266,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
uccf->ucc_fast_tx_virtual_fifo_base_offset =
qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
uccf_err
("ucc_fast_init: Can not allocate MURAM memory for "
"struct ucc_fastx_virtual_fifo_base_offset.");
printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
ucc_fast_free(uccf);
return -ENOMEM;
@ -308,14 +274,11 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* Allocate memory for Rx Virtual Fifo */
uccf->ucc_fast_rx_virtual_fifo_base_offset =
qe_muram_alloc(uf_info->urfs +
(u32)
qe_muram_alloc(uf_info->urfs +
UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
uccf_err
("ucc_fast_init: Can not allocate MURAM memory for "
"ucc_fast_rx_virtual_fifo_base_offset.");
printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
ucc_fast_free(uccf);
return -ENOMEM;
@ -342,26 +305,22 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* If NMSI (not Tsa), set Tx and Rx clock. */
if (!uf_info->tsa) {
/* Rx clock routing */
if (uf_info->rx_clock != QE_CLK_NONE) {
if (ucc_set_qe_mux_rxtx
(uf_info->ucc_num, uf_info->rx_clock,
COMM_DIR_RX)) {
uccf_err
("ucc_fast_init: Illegal value for parameter 'RxClock'.");
ucc_fast_free(uccf);
return -EINVAL;
}
if ((uf_info->rx_clock != QE_CLK_NONE) &&
ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
COMM_DIR_RX)) {
printk(KERN_ERR "%s: illegal value for RX clock",
__FUNCTION__);
ucc_fast_free(uccf);
return -EINVAL;
}
/* Tx clock routing */
if (uf_info->tx_clock != QE_CLK_NONE) {
if (ucc_set_qe_mux_rxtx
(uf_info->ucc_num, uf_info->tx_clock,
COMM_DIR_TX)) {
uccf_err
("ucc_fast_init: Illegal value for parameter 'TxClock'.");
ucc_fast_free(uccf);
return -EINVAL;
}
if ((uf_info->tx_clock != QE_CLK_NONE) &&
ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
COMM_DIR_TX)) {
printk(KERN_ERR "%s: illegal value for TX clock",
__FUNCTION__);
ucc_fast_free(uccf);
return -EINVAL;
}
}
@ -370,9 +329,9 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
/* First, clear anything pending at UCC level,
* otherwise, old garbage may come through
* as soon as the dam is opened
* Writing '1' clears
*/
* as soon as the dam is opened. */
/* Writing '1' clears */
out_be32(&uf_regs->ucce, 0xffffffff);
*uccf_ret = uccf;

View File

@ -19,7 +19,6 @@
#include <linux/stddef.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
@ -27,24 +26,6 @@
#include <asm/ucc.h>
#include <asm/ucc_slow.h>
#define uccs_printk(level, format, arg...) \
printk(level format "\n", ## arg)
#define uccs_dbg(format, arg...) \
uccs_printk(KERN_DEBUG , format , ## arg)
#define uccs_err(format, arg...) \
uccs_printk(KERN_ERR , format , ## arg)
#define uccs_info(format, arg...) \
uccs_printk(KERN_INFO , format , ## arg)
#define uccs_warn(format, arg...) \
uccs_printk(KERN_WARNING , format , ## arg)
#ifdef UCCS_VERBOSE_DEBUG
#define uccs_vdbg uccs_dbg
#else
#define uccs_vdbg(fmt, args...) do { } while (0)
#endif /* UCCS_VERBOSE_DEBUG */
u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
{
switch (uccs_num) {
@ -135,51 +116,53 @@ void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode)
int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret)
{
struct ucc_slow_private *uccs;
u32 i;
struct ucc_slow *us_regs;
u32 gumr;
u8 function_code = 0;
u8 *bd;
struct ucc_slow_private *uccs;
struct qe_bd *bd;
u32 id;
u32 command;
int ret;
uccs_vdbg("%s: IN", __FUNCTION__);
int ret = 0;
if (!us_info)
return -EINVAL;
/* check if the UCC port number is in range. */
if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) {
uccs_err("ucc_slow_init: Illegal UCC number!");
printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
return -EINVAL;
}
/*
* Set mrblr
* Check that 'max_rx_buf_length' is properly aligned (4), unless
* rfw is 1, meaning that QE accepts one byte at a time, unlike normal
* rfw is 1, meaning that QE accepts one byte at a time, unlike normal
* case when QE accepts 32 bits at a time.
*/
if ((!us_info->rfw) &&
(us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) {
uccs_err("max_rx_buf_length not aligned.");
printk(KERN_ERR "max_rx_buf_length not aligned.");
return -EINVAL;
}
uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL);
if (!uccs) {
uccs_err
("ucc_slow_init: No memory for UCC slow data structure!");
printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
return -ENOMEM;
}
/* Fill slow UCC structure */
uccs->us_info = us_info;
/* Set the PHY base address */
uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow));
if (uccs->us_regs == NULL) {
printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
return -ENOMEM;
}
uccs->saved_uccm = 0;
uccs->p_rx_frame = 0;
uccs->us_regs = us_info->regs;
us_regs = uccs->us_regs;
uccs->p_ucce = (u16 *) & (us_regs->ucce);
uccs->p_uccm = (u16 *) & (us_regs->uccm);
@ -190,24 +173,22 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
#endif /* STATISTICS */
/* Get PRAM base */
uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE,
ALIGNMENT_OF_UCC_SLOW_PRAM);
uccs->us_pram_offset =
qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
if (IS_MURAM_ERR(uccs->us_pram_offset)) {
uccs_err
("ucc_slow_init: Can not allocate MURAM memory "
"for Slow UCC.");
printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__);
ucc_slow_free(uccs);
return -ENOMEM;
}
id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num);
qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED,
(u32) uccs->us_pram_offset);
uccs->us_pram_offset);
uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
/* Init Guemr register */
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
ucc_slow_free(uccs);
return ret;
}
@ -216,7 +197,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
if ((ret = ucc_set_type(us_info->ucc_num,
(struct ucc_common *) (us_info->regs),
UCC_SPEED_TYPE_SLOW))) {
uccs_err("ucc_slow_init: Could not init the guemr register.");
printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
ucc_slow_free(uccs);
return ret;
}
@ -230,7 +211,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
if (IS_MURAM_ERR(uccs->rx_base_offset)) {
uccs_err("ucc_slow_init: No memory for Rx BD's.");
printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__);
uccs->rx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
@ -240,7 +221,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
QE_ALIGNMENT_OF_BD);
if (IS_MURAM_ERR(uccs->tx_base_offset)) {
uccs_err("ucc_slow_init: No memory for Tx BD's.");
printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__);
uccs->tx_base_offset = 0;
ucc_slow_free(uccs);
return -ENOMEM;
@ -248,34 +229,33 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* Init Tx bds */
bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset);
for (i = 0; i < us_info->tx_bd_ring_len; i++) {
for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) {
/* clear bd buffer */
out_be32(&(((struct qe_bd *)bd)->buf), 0);
out_be32(&bd->buf, 0);
/* set bd status and length */
out_be32((u32*)bd, 0);
bd += sizeof(struct qe_bd);
out_be32((u32 *) bd, 0);
bd++;
}
bd -= sizeof(struct qe_bd);
/* set bd status and length */
out_be32((u32*)bd, T_W); /* for last BD set Wrap bit */
/* for last BD set Wrap bit */
out_be32(&bd->buf, 0);
out_be32((u32 *) bd, cpu_to_be32(T_W));
/* Init Rx bds */
bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset);
for (i = 0; i < us_info->rx_bd_ring_len; i++) {
for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) {
/* set bd status and length */
out_be32((u32*)bd, 0);
/* clear bd buffer */
out_be32(&(((struct qe_bd *)bd)->buf), 0);
bd += sizeof(struct qe_bd);
out_be32(&bd->buf, 0);
bd++;
}
bd -= sizeof(struct qe_bd);
/* set bd status and length */
out_be32((u32*)bd, R_W); /* for last BD set Wrap bit */
/* for last BD set Wrap bit */
out_be32((u32*)bd, cpu_to_be32(R_W));
out_be32(&bd->buf, 0);
/* Set GUMR (For more details see the hardware spec.). */
/* gumr_h */
gumr = 0;
gumr |= us_info->tcrc;
gumr = us_info->tcrc;
if (us_info->cdp)
gumr |= UCC_SLOW_GUMR_H_CDP;
if (us_info->ctsp)
@ -295,7 +275,8 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
out_be32(&us_regs->gumr_h, gumr);
/* gumr_l */
gumr = 0;
gumr = us_info->tdcr | us_info->rdcr | us_info->tenc | us_info->renc |
us_info->diag | us_info->mode;
if (us_info->tci)
gumr |= UCC_SLOW_GUMR_L_TCI;
if (us_info->rinv)
@ -304,23 +285,14 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
gumr |= UCC_SLOW_GUMR_L_TINV;
if (us_info->tend)
gumr |= UCC_SLOW_GUMR_L_TEND;
gumr |= us_info->tdcr;
gumr |= us_info->rdcr;
gumr |= us_info->tenc;
gumr |= us_info->renc;
gumr |= us_info->diag;
gumr |= us_info->mode;
out_be32(&us_regs->gumr_l, gumr);
/* Function code registers */
/* function_code has initial value 0 */
/* if the data is in cachable memory, the 'global' */
/* in the function code should be set. */
function_code |= us_info->data_mem_part;
function_code |= QE_BMR_BYTE_ORDER_BO_MOT; /* Required for QE */
uccs->us_pram->tfcr = function_code;
uccs->us_pram->rfcr = function_code;
uccs->us_pram->tfcr = uccs->us_pram->rfcr =
us_info->data_mem_part | QE_BMR_BYTE_ORDER_BO_MOT;
/* rbase, tbase are offsets from MURAM base */
out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset);
@ -336,34 +308,29 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
/* If NMSI (not Tsa), set Tx and Rx clock. */
if (!us_info->tsa) {
/* Rx clock routing */
if (ucc_set_qe_mux_rxtx
(us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) {
uccs_err
("ucc_slow_init: Illegal value for parameter"
" 'RxClock'.");
if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock,
COMM_DIR_RX)) {
printk(KERN_ERR "%s: illegal value for RX clock",
__FUNCTION__);
ucc_slow_free(uccs);
return -EINVAL;
}
/* Tx clock routing */
if (ucc_set_qe_mux_rxtx(us_info->ucc_num,
us_info->tx_clock, COMM_DIR_TX)) {
uccs_err
("ucc_slow_init: Illegal value for parameter "
"'TxClock'.");
if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock,
COMM_DIR_TX)) {
printk(KERN_ERR "%s: illegal value for TX clock",
__FUNCTION__);
ucc_slow_free(uccs);
return -EINVAL;
}
}
/*
* INTERRUPTS
*/
/* Set interrupt mask register at UCC level. */
out_be16(&us_regs->uccm, us_info->uccm_mask);
/* First, clear anything pending at UCC level, */
/* otherwise, old garbage may come through */
/* as soon as the dam is opened. */
/* First, clear anything pending at UCC level,
* otherwise, old garbage may come through
* as soon as the dam is opened. */
/* Writing '1' clears */
out_be16(&us_regs->ucce, 0xffff);
@ -400,3 +367,5 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
kfree(uccs);
}

View File

@ -1,2 +1,3 @@
obj-$(CONFIG_PS3_VUART) += vuart.o
obj-$(CONFIG_PS3_PS3AV) += ps3av.o ps3av_cmd.o
obj-$(CONFIG_PS3_SYS_MANAGER) += sys-manager.o

604
drivers/ps3/sys-manager.c Normal file
View File

@ -0,0 +1,604 @@
/*
* PS3 System Manager.
*
* Copyright (C) 2007 Sony Computer Entertainment Inc.
* Copyright 2007 Sony Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/workqueue.h>
#include <linux/reboot.h>
#include <asm/ps3.h>
#include "vuart.h"
MODULE_AUTHOR("Sony Corporation");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("PS3 System Manager");
/**
* ps3_sys_manager - PS3 system manager driver.
*
* The system manager provides an asyncronous system event notification
* mechanism for reporting events like thermal alert and button presses to
* guests. It also provides support to control system shutdown and startup.
*
* The actual system manager is implemented as an application running in the
* system policy module in lpar_1. Guests communicate with the system manager
* through port 2 of the vuart using a simple packet message protocol.
* Messages are comprised of a fixed field header followed by a message
* specific payload.
*/
/**
* struct ps3_sys_manager_header - System manager message header.
* @version: Header version, currently 1.
* @size: Header size in bytes, curently 16.
* @payload_size: Message payload size in bytes.
* @service_id: Message type, one of enum ps3_sys_manager_service_id.
*/
struct ps3_sys_manager_header {
/* version 1 */
u8 version;
u8 size;
u16 reserved_1;
u32 payload_size;
u16 service_id;
u16 reserved_2[3];
};
/**
* @PS3_SM_RX_MSG_LEN - System manager received message length.
*
* Currently all messages received from the system manager are the same length
* (16 bytes header + 16 bytes payload = 32 bytes). This knowlege is used to
* simplify the logic.
*/
enum {
PS3_SM_RX_MSG_LEN = 32,
};
/**
* enum ps3_sys_manager_service_id - Message header service_id.
* @PS3_SM_SERVICE_ID_REQUEST: guest --> sys_manager.
* @PS3_SM_SERVICE_ID_COMMAND: guest <-- sys_manager.
* @PS3_SM_SERVICE_ID_RESPONSE: guest --> sys_manager.
* @PS3_SM_SERVICE_ID_SET_ATTR: guest --> sys_manager.
* @PS3_SM_SERVICE_ID_EXTERN_EVENT: guest <-- sys_manager.
* @PS3_SM_SERVICE_ID_SET_NEXT_OP: guest --> sys_manager.
*/
enum ps3_sys_manager_service_id {
/* version 1 */
PS3_SM_SERVICE_ID_REQUEST = 1,
PS3_SM_SERVICE_ID_RESPONSE = 2,
PS3_SM_SERVICE_ID_COMMAND = 3,
PS3_SM_SERVICE_ID_EXTERN_EVENT = 4,
PS3_SM_SERVICE_ID_SET_NEXT_OP = 5,
PS3_SM_SERVICE_ID_SET_ATTR = 8,
};
/**
* enum ps3_sys_manager_attr - Notification attribute (bit position mask).
* @PS3_SM_ATTR_POWER: Power button.
* @PS3_SM_ATTR_RESET: Reset button, not available on retail console.
* @PS3_SM_ATTR_THERMAL: Sytem thermal alert.
* @PS3_SM_ATTR_CONTROLLER: Remote controller event.
* @PS3_SM_ATTR_ALL: Logical OR of all.
*
* The guest tells the system manager which events it is interested in receiving
* notice of by sending the system manager a logical OR of notification
* attributes via the ps3_sys_manager_send_attr() routine.
*/
enum ps3_sys_manager_attr {
/* version 1 */
PS3_SM_ATTR_POWER = 1,
PS3_SM_ATTR_RESET = 2,
PS3_SM_ATTR_THERMAL = 4,
PS3_SM_ATTR_CONTROLLER = 8, /* bogus? */
PS3_SM_ATTR_ALL = 0x0f,
};
/**
* enum ps3_sys_manager_event - External event type, reported by system manager.
* @PS3_SM_EVENT_POWER_PRESSED: payload.value not used.
* @PS3_SM_EVENT_POWER_RELEASED: payload.value = time pressed in millisec.
* @PS3_SM_EVENT_RESET_PRESSED: payload.value not used.
* @PS3_SM_EVENT_RESET_RELEASED: payload.value = time pressed in millisec.
* @PS3_SM_EVENT_THERMAL_ALERT: payload.value = thermal zone id.
* @PS3_SM_EVENT_THERMAL_CLEARED: payload.value = thermal zone id.
*/
enum ps3_sys_manager_event {
/* version 1 */
PS3_SM_EVENT_POWER_PRESSED = 3,
PS3_SM_EVENT_POWER_RELEASED = 4,
PS3_SM_EVENT_RESET_PRESSED = 5,
PS3_SM_EVENT_RESET_RELEASED = 6,
PS3_SM_EVENT_THERMAL_ALERT = 7,
PS3_SM_EVENT_THERMAL_CLEARED = 8,
/* no info on controller events */
};
/**
* enum ps3_sys_manager_next_op - Operation to perform after lpar is destroyed.
*/
enum ps3_sys_manager_next_op {
/* version 3 */
PS3_SM_NEXT_OP_SYS_SHUTDOWN = 1,
PS3_SM_NEXT_OP_SYS_REBOOT = 2,
PS3_SM_NEXT_OP_LPAR_REBOOT = 0x82,
};
/**
* enum ps3_sys_manager_wake_source - Next-op wakeup source (bit position mask).
* @PS3_SM_WAKE_DEFAULT: Disk insert, power button, eject button, IR
* controller, and bluetooth controller.
* @PS3_SM_WAKE_RTC:
* @PS3_SM_WAKE_RTC_ERROR:
* @PS3_SM_WAKE_P_O_R: Power on reset.
*
* Additional wakeup sources when specifying PS3_SM_NEXT_OP_SYS_SHUTDOWN.
* System will always wake from the PS3_SM_WAKE_DEFAULT sources.
*/
enum ps3_sys_manager_wake_source {
/* version 3 */
PS3_SM_WAKE_DEFAULT = 0,
PS3_SM_WAKE_RTC = 0x00000040,
PS3_SM_WAKE_RTC_ERROR = 0x00000080,
PS3_SM_WAKE_P_O_R = 0x10000000,
};
/**
* enum ps3_sys_manager_cmd - Command from system manager to guest.
*
* The guest completes the actions needed, then acks or naks the command via
* ps3_sys_manager_send_response(). In the case of @PS3_SM_CMD_SHUTDOWN,
* the guest must be fully prepared for a system poweroff prior to acking the
* command.
*/
enum ps3_sys_manager_cmd {
/* version 1 */
PS3_SM_CMD_SHUTDOWN = 1, /* shutdown guest OS */
};
/**
* ps3_sys_manager_write - Helper to write a two part message to the vuart.
*
*/
static int ps3_sys_manager_write(struct ps3_vuart_port_device *dev,
const struct ps3_sys_manager_header *header, const void *payload)
{
int result;
BUG_ON(header->version != 1);
BUG_ON(header->size != 16);
BUG_ON(header->payload_size != 8 && header->payload_size != 16);
BUG_ON(header->service_id > 8);
result = ps3_vuart_write(dev, header,
sizeof(struct ps3_sys_manager_header));
if (!result)
result = ps3_vuart_write(dev, payload, header->payload_size);
return result;
}
/**
* ps3_sys_manager_send_attr - Send a 'set attribute' to the system manager.
*
*/
static int ps3_sys_manager_send_attr(struct ps3_vuart_port_device *dev,
enum ps3_sys_manager_attr attr)
{
static const struct ps3_sys_manager_header header = {
.version = 1,
.size = 16,
.payload_size = 16,
.service_id = PS3_SM_SERVICE_ID_SET_ATTR,
};
struct {
u8 version;
u8 reserved_1[3];
u32 attribute;
} payload;
BUILD_BUG_ON(sizeof(payload) != 8);
dev_dbg(&dev->core, "%s:%d: %xh\n", __func__, __LINE__, attr);
memset(&payload, 0, sizeof(payload));
payload.version = 1;
payload.attribute = attr;
return ps3_sys_manager_write(dev, &header, &payload);
}
/**
* ps3_sys_manager_send_next_op - Send a 'set next op' to the system manager.
*
* Tell the system manager what to do after this lpar is destroyed.
*/
static int ps3_sys_manager_send_next_op(struct ps3_vuart_port_device *dev,
enum ps3_sys_manager_next_op op,
enum ps3_sys_manager_wake_source wake_source)
{
static const struct ps3_sys_manager_header header = {
.version = 1,
.size = 16,
.payload_size = 16,
.service_id = PS3_SM_SERVICE_ID_SET_NEXT_OP,
};
struct {
u8 version;
u8 type;
u8 gos_id;
u8 reserved_1;
u32 wake_source;
u8 reserved_2[8];
} payload;
BUILD_BUG_ON(sizeof(payload) != 16);
dev_dbg(&dev->core, "%s:%d: (%xh)\n", __func__, __LINE__, op);
memset(&payload, 0, sizeof(payload));
payload.version = 3;
payload.type = op;
payload.gos_id = 3; /* other os */
payload.wake_source = wake_source;
return ps3_sys_manager_write(dev, &header, &payload);
}
/**
* ps3_sys_manager_send_request_shutdown - Send 'request' to the system manager.
*
* The guest sends this message to request an operation or action of the system
* manager. The reply is a command message from the system manager. In the
* command handler the guest performs the requested operation. The result of
* the command is then communicated back to the system manager with a response
* message.
*
* Currently, the only supported request it the 'shutdown self' request.
*/
static int ps3_sys_manager_send_request_shutdown(struct ps3_vuart_port_device *dev)
{
static const struct ps3_sys_manager_header header = {
.version = 1,
.size = 16,
.payload_size = 16,
.service_id = PS3_SM_SERVICE_ID_REQUEST,
};
struct {
u8 version;
u8 type;
u8 gos_id;
u8 reserved_1[13];
} static const payload = {
.version = 1,
.type = 1, /* shutdown */
.gos_id = 0, /* self */
};
BUILD_BUG_ON(sizeof(payload) != 16);
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
return ps3_sys_manager_write(dev, &header, &payload);
}
/**
* ps3_sys_manager_send_response - Send a 'response' to the system manager.
* @status: zero = success, others fail.
*
* The guest sends this message to the system manager to acnowledge success or
* failure of a command sent by the system manager.
*/
static int ps3_sys_manager_send_response(struct ps3_vuart_port_device *dev,
u64 status)
{
static const struct ps3_sys_manager_header header = {
.version = 1,
.size = 16,
.payload_size = 16,
.service_id = PS3_SM_SERVICE_ID_RESPONSE,
};
struct {
u8 version;
u8 reserved_1[3];
u8 status;
u8 reserved_2[11];
} payload;
BUILD_BUG_ON(sizeof(payload) != 16);
dev_dbg(&dev->core, "%s:%d: (%s)\n", __func__, __LINE__,
(status ? "nak" : "ack"));
memset(&payload, 0, sizeof(payload));
payload.version = 1;
payload.status = status;
return ps3_sys_manager_write(dev, &header, &payload);
}
/**
* ps3_sys_manager_handle_event - Second stage event msg handler.
*
*/
static int ps3_sys_manager_handle_event(struct ps3_vuart_port_device *dev)
{
int result;
struct {
u8 version;
u8 type;
u8 reserved_1[2];
u32 value;
u8 reserved_2[8];
} event;
BUILD_BUG_ON(sizeof(event) != 16);
result = ps3_vuart_read(dev, &event, sizeof(event));
BUG_ON(result);
if (event.version != 1) {
dev_dbg(&dev->core, "%s:%d: unsupported event version (%u)\n",
__func__, __LINE__, event.version);
return -EIO;
}
switch (event.type) {
case PS3_SM_EVENT_POWER_PRESSED:
dev_dbg(&dev->core, "%s:%d: POWER_PRESSED\n",
__func__, __LINE__);
break;
case PS3_SM_EVENT_POWER_RELEASED:
dev_dbg(&dev->core, "%s:%d: POWER_RELEASED (%u ms)\n",
__func__, __LINE__, event.value);
kill_cad_pid(SIGINT, 1);
break;
case PS3_SM_EVENT_THERMAL_ALERT:
dev_dbg(&dev->core, "%s:%d: THERMAL_ALERT (zone %u)\n",
__func__, __LINE__, event.value);
printk(KERN_INFO "PS3 Thermal Alert Zone %u\n", event.value);
break;
case PS3_SM_EVENT_THERMAL_CLEARED:
dev_dbg(&dev->core, "%s:%d: THERMAL_CLEARED (zone %u)\n",
__func__, __LINE__, event.value);
break;
default:
dev_dbg(&dev->core, "%s:%d: unknown event (%u)\n",
__func__, __LINE__, event.type);
return -EIO;
}
return 0;
}
/**
* ps3_sys_manager_handle_cmd - Second stage command msg handler.
*
* The system manager sends this in reply to a 'request' message from the guest.
*/
static int ps3_sys_manager_handle_cmd(struct ps3_vuart_port_device *dev)
{
int result;
struct {
u8 version;
u8 type;
u8 reserved_1[14];
} cmd;
BUILD_BUG_ON(sizeof(cmd) != 16);
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
result = ps3_vuart_read(dev, &cmd, sizeof(cmd));
if(result)
return result;
if (cmd.version != 1) {
dev_dbg(&dev->core, "%s:%d: unsupported cmd version (%u)\n",
__func__, __LINE__, cmd.version);
return -EIO;
}
if (cmd.type != PS3_SM_CMD_SHUTDOWN) {
dev_dbg(&dev->core, "%s:%d: unknown cmd (%u)\n",
__func__, __LINE__, cmd.type);
return -EIO;
}
ps3_sys_manager_send_response(dev, 0);
return 0;
}
/**
* ps3_sys_manager_handle_msg - First stage msg handler.
*
*/
static int ps3_sys_manager_handle_msg(struct ps3_vuart_port_device *dev)
{
int result;
struct ps3_sys_manager_header header;
result = ps3_vuart_read(dev, &header,
sizeof(struct ps3_sys_manager_header));
if(result)
return result;
if (header.version != 1) {
dev_dbg(&dev->core, "%s:%d: unsupported header version (%u)\n",
__func__, __LINE__, header.version);
goto fail_header;
}
BUILD_BUG_ON(sizeof(header) != 16);
BUG_ON(header.size != 16);
BUG_ON(header.payload_size != 16);
switch (header.service_id) {
case PS3_SM_SERVICE_ID_EXTERN_EVENT:
dev_dbg(&dev->core, "%s:%d: EVENT\n", __func__, __LINE__);
return ps3_sys_manager_handle_event(dev);
case PS3_SM_SERVICE_ID_COMMAND:
dev_dbg(&dev->core, "%s:%d: COMMAND\n", __func__, __LINE__);
return ps3_sys_manager_handle_cmd(dev);
default:
dev_dbg(&dev->core, "%s:%d: unknown service_id (%u)\n",
__func__, __LINE__, header.service_id);
break;
}
goto fail_id;
fail_header:
ps3_vuart_clear_rx_bytes(dev, 0);
return -EIO;
fail_id:
ps3_vuart_clear_rx_bytes(dev, header.payload_size);
return -EIO;
}
/**
* ps3_sys_manager_work - Asyncronous read handler.
*
* Signaled when a complete message arrives at the vuart port.
*/
static void ps3_sys_manager_work(struct work_struct *work)
{
struct ps3_vuart_port_device *dev = ps3_vuart_work_to_port_device(work);
ps3_sys_manager_handle_msg(dev);
ps3_vuart_read_async(dev, ps3_sys_manager_work, PS3_SM_RX_MSG_LEN);
}
struct {
struct ps3_vuart_port_device *dev;
} static drv_priv;
/**
* ps3_sys_manager_restart - The final platform machine_restart routine.
*
* This routine never returns. The routine disables asyncronous vuart reads
* then spins calling ps3_sys_manager_handle_msg() to receive and acknowledge
* the shutdown command sent from the system manager. Soon after the
* acknowledgement is sent the lpar is destroyed by the HV. This routine
* should only be called from ps3_restart().
*/
void ps3_sys_manager_restart(void)
{
struct ps3_vuart_port_device *dev = drv_priv.dev;
BUG_ON(!drv_priv.dev);
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
ps3_vuart_cancel_async(dev);
ps3_sys_manager_send_attr(dev, 0);
ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_LPAR_REBOOT,
PS3_SM_WAKE_DEFAULT);
ps3_sys_manager_send_request_shutdown(dev);
printk(KERN_EMERG "System Halted, OK to turn off power\n");
while(1)
ps3_sys_manager_handle_msg(dev);
}
/**
* ps3_sys_manager_power_off - The final platform machine_power_off routine.
*
* This routine never returns. The routine disables asyncronous vuart reads
* then spins calling ps3_sys_manager_handle_msg() to receive and acknowledge
* the shutdown command sent from the system manager. Soon after the
* acknowledgement is sent the lpar is destroyed by the HV. This routine
* should only be called from ps3_power_off().
*/
void ps3_sys_manager_power_off(void)
{
struct ps3_vuart_port_device *dev = drv_priv.dev;
BUG_ON(!drv_priv.dev);
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
ps3_vuart_cancel_async(dev);
ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_SHUTDOWN,
PS3_SM_WAKE_DEFAULT);
ps3_sys_manager_send_request_shutdown(dev);
printk(KERN_EMERG "System Halted, OK to turn off power\n");
while(1)
ps3_sys_manager_handle_msg(dev);
}
static int ps3_sys_manager_probe(struct ps3_vuart_port_device *dev)
{
int result;
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
BUG_ON(drv_priv.dev);
drv_priv.dev = dev;
result = ps3_sys_manager_send_attr(dev, PS3_SM_ATTR_ALL);
BUG_ON(result);
result = ps3_vuart_read_async(dev, ps3_sys_manager_work,
PS3_SM_RX_MSG_LEN);
BUG_ON(result);
return result;
}
static struct ps3_vuart_port_driver ps3_sys_manager = {
.match_id = PS3_MATCH_ID_SYSTEM_MANAGER,
.core = {
.name = "ps3_sys_manager",
},
.probe = ps3_sys_manager_probe,
};
static int __init ps3_sys_manager_init(void)
{
return ps3_vuart_port_driver_register(&ps3_sys_manager);
}
module_init(ps3_sys_manager_init);

View File

@ -21,8 +21,10 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <asm/ps3.h>
#include <asm/firmware.h>
#include <asm/lv1call.h>
#include <asm/bitops.h>
@ -30,7 +32,7 @@
MODULE_AUTHOR("Sony Corporation");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("ps3 vuart");
MODULE_DESCRIPTION("PS3 vuart");
/**
* vuart - An inter-partition data link service.
@ -157,7 +159,7 @@ int ps3_vuart_get_triggers(struct ps3_vuart_port_device *dev,
unsigned long size;
unsigned long val;
result = lv1_get_virtual_uart_param(dev->port_number,
result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_TX_TRIGGER, &trig->tx);
if (result) {
@ -166,7 +168,7 @@ int ps3_vuart_get_triggers(struct ps3_vuart_port_device *dev,
return result;
}
result = lv1_get_virtual_uart_param(dev->port_number,
result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_RX_BUF_SIZE, &size);
if (result) {
@ -175,7 +177,7 @@ int ps3_vuart_get_triggers(struct ps3_vuart_port_device *dev,
return result;
}
result = lv1_get_virtual_uart_param(dev->port_number,
result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_RX_TRIGGER, &val);
if (result) {
@ -198,7 +200,7 @@ int ps3_vuart_set_triggers(struct ps3_vuart_port_device *dev, unsigned int tx,
int result;
unsigned long size;
result = lv1_set_virtual_uart_param(dev->port_number,
result = lv1_set_virtual_uart_param(dev->priv->port_number,
PARAM_TX_TRIGGER, tx);
if (result) {
@ -207,7 +209,7 @@ int ps3_vuart_set_triggers(struct ps3_vuart_port_device *dev, unsigned int tx,
return result;
}
result = lv1_get_virtual_uart_param(dev->port_number,
result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_RX_BUF_SIZE, &size);
if (result) {
@ -216,7 +218,7 @@ int ps3_vuart_set_triggers(struct ps3_vuart_port_device *dev, unsigned int tx,
return result;
}
result = lv1_set_virtual_uart_param(dev->port_number,
result = lv1_set_virtual_uart_param(dev->priv->port_number,
PARAM_RX_TRIGGER, size - rx);
if (result) {
@ -232,9 +234,9 @@ int ps3_vuart_set_triggers(struct ps3_vuart_port_device *dev, unsigned int tx,
}
static int ps3_vuart_get_rx_bytes_waiting(struct ps3_vuart_port_device *dev,
unsigned long *bytes_waiting)
u64 *bytes_waiting)
{
int result = lv1_get_virtual_uart_param(dev->port_number,
int result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_RX_BYTES, bytes_waiting);
if (result)
@ -253,10 +255,10 @@ static int ps3_vuart_set_interrupt_mask(struct ps3_vuart_port_device *dev,
dev_dbg(&dev->core, "%s:%d: %lxh\n", __func__, __LINE__, mask);
dev->interrupt_mask = mask;
dev->priv->interrupt_mask = mask;
result = lv1_set_virtual_uart_param(dev->port_number,
PARAM_INTERRUPT_MASK, dev->interrupt_mask);
result = lv1_set_virtual_uart_param(dev->priv->port_number,
PARAM_INTERRUPT_MASK, dev->priv->interrupt_mask);
if (result)
dev_dbg(&dev->core, "%s:%d: interrupt_mask failed: %s\n",
@ -265,62 +267,64 @@ static int ps3_vuart_set_interrupt_mask(struct ps3_vuart_port_device *dev,
return result;
}
static int ps3_vuart_get_interrupt_mask(struct ps3_vuart_port_device *dev,
static int ps3_vuart_get_interrupt_status(struct ps3_vuart_port_device *dev,
unsigned long *status)
{
int result = lv1_get_virtual_uart_param(dev->port_number,
PARAM_INTERRUPT_STATUS, status);
u64 tmp;
int result = lv1_get_virtual_uart_param(dev->priv->port_number,
PARAM_INTERRUPT_STATUS, &tmp);
if (result)
dev_dbg(&dev->core, "%s:%d: interrupt_status failed: %s\n",
__func__, __LINE__, ps3_result(result));
*status = tmp & dev->priv->interrupt_mask;
dev_dbg(&dev->core, "%s:%d: m %lxh, s %lxh, m&s %lxh\n",
__func__, __LINE__, dev->interrupt_mask, *status,
dev->interrupt_mask & *status);
__func__, __LINE__, dev->priv->interrupt_mask, tmp, *status);
return result;
}
int ps3_vuart_enable_interrupt_tx(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_TX) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_TX) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
| INTERRUPT_MASK_TX);
}
int ps3_vuart_enable_interrupt_rx(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_RX) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_RX) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
| INTERRUPT_MASK_RX);
}
int ps3_vuart_enable_interrupt_disconnect(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_DISCONNECT) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_DISCONNECT) ? 0
: ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
| INTERRUPT_MASK_DISCONNECT);
}
int ps3_vuart_disable_interrupt_tx(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_TX)
? ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_TX)
? ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
& ~INTERRUPT_MASK_TX) : 0;
}
int ps3_vuart_disable_interrupt_rx(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_RX)
? ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_RX)
? ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
& ~INTERRUPT_MASK_RX) : 0;
}
int ps3_vuart_disable_interrupt_disconnect(struct ps3_vuart_port_device *dev)
{
return (dev->interrupt_mask & INTERRUPT_MASK_DISCONNECT)
? ps3_vuart_set_interrupt_mask(dev, dev->interrupt_mask
return (dev->priv->interrupt_mask & INTERRUPT_MASK_DISCONNECT)
? ps3_vuart_set_interrupt_mask(dev, dev->priv->interrupt_mask
& ~INTERRUPT_MASK_DISCONNECT) : 0;
}
@ -335,9 +339,7 @@ static int ps3_vuart_raw_write(struct ps3_vuart_port_device *dev,
{
int result;
dev_dbg(&dev->core, "%s:%d: %xh\n", __func__, __LINE__, bytes);
result = lv1_write_virtual_uart(dev->port_number,
result = lv1_write_virtual_uart(dev->priv->port_number,
ps3_mm_phys_to_lpar(__pa(buf)), bytes, bytes_written);
if (result) {
@ -346,10 +348,10 @@ static int ps3_vuart_raw_write(struct ps3_vuart_port_device *dev,
return result;
}
dev->stats.bytes_written += *bytes_written;
dev->priv->stats.bytes_written += *bytes_written;
dev_dbg(&dev->core, "%s:%d: wrote %lxh/%xh=>%lxh\n", __func__,
__LINE__, *bytes_written, bytes, dev->stats.bytes_written);
dev_dbg(&dev->core, "%s:%d: wrote %lxh/%xh=>%lxh\n", __func__, __LINE__,
*bytes_written, bytes, dev->priv->stats.bytes_written);
return result;
}
@ -367,7 +369,7 @@ static int ps3_vuart_raw_read(struct ps3_vuart_port_device *dev, void* buf,
dev_dbg(&dev->core, "%s:%d: %xh\n", __func__, __LINE__, bytes);
result = lv1_read_virtual_uart(dev->port_number,
result = lv1_read_virtual_uart(dev->priv->port_number,
ps3_mm_phys_to_lpar(__pa(buf)), bytes, bytes_read);
if (result) {
@ -376,14 +378,57 @@ static int ps3_vuart_raw_read(struct ps3_vuart_port_device *dev, void* buf,
return result;
}
dev->stats.bytes_read += *bytes_read;
dev->priv->stats.bytes_read += *bytes_read;
dev_dbg(&dev->core, "%s:%d: read %lxh/%xh=>%lxh\n", __func__, __LINE__,
*bytes_read, bytes, dev->stats.bytes_read);
*bytes_read, bytes, dev->priv->stats.bytes_read);
return result;
}
/**
* ps3_vuart_clear_rx_bytes - Discard bytes received.
* @bytes: Max byte count to discard, zero = all pending.
*
* Used to clear pending rx interrupt source. Will not block.
*/
void ps3_vuart_clear_rx_bytes(struct ps3_vuart_port_device *dev,
unsigned int bytes)
{
int result;
u64 bytes_waiting;
void* tmp;
result = ps3_vuart_get_rx_bytes_waiting(dev, &bytes_waiting);
BUG_ON(result);
bytes = bytes ? min(bytes, (unsigned int)bytes_waiting) : bytes_waiting;
dev_dbg(&dev->core, "%s:%d: %u\n", __func__, __LINE__, bytes);
if (!bytes)
return;
/* Add some extra space for recently arrived data. */
bytes += 128;
tmp = kmalloc(bytes, GFP_KERNEL);
if (!tmp)
return;
ps3_vuart_raw_read(dev, tmp, bytes, &bytes_waiting);
kfree(tmp);
/* Don't include these bytes in the stats. */
dev->priv->stats.bytes_read -= bytes_waiting;
}
/**
* struct list_buffer - An element for a port device fifo buffer list.
*/
@ -416,14 +461,14 @@ int ps3_vuart_write(struct ps3_vuart_port_device *dev, const void* buf,
dev_dbg(&dev->core, "%s:%d: %u(%xh) bytes\n", __func__, __LINE__,
bytes, bytes);
spin_lock_irqsave(&dev->tx_list.lock, flags);
spin_lock_irqsave(&dev->priv->tx_list.lock, flags);
if (list_empty(&dev->tx_list.head)) {
if (list_empty(&dev->priv->tx_list.head)) {
unsigned long bytes_written;
result = ps3_vuart_raw_write(dev, buf, bytes, &bytes_written);
spin_unlock_irqrestore(&dev->tx_list.lock, flags);
spin_unlock_irqrestore(&dev->priv->tx_list.lock, flags);
if (result) {
dev_dbg(&dev->core,
@ -441,7 +486,7 @@ int ps3_vuart_write(struct ps3_vuart_port_device *dev, const void* buf,
bytes -= bytes_written;
buf += bytes_written;
} else
spin_unlock_irqrestore(&dev->tx_list.lock, flags);
spin_unlock_irqrestore(&dev->priv->tx_list.lock, flags);
lb = kmalloc(sizeof(struct list_buffer) + bytes, GFP_KERNEL);
@ -454,10 +499,10 @@ int ps3_vuart_write(struct ps3_vuart_port_device *dev, const void* buf,
lb->tail = lb->data + bytes;
lb->dbg_number = ++dbg_number;
spin_lock_irqsave(&dev->tx_list.lock, flags);
list_add_tail(&lb->link, &dev->tx_list.head);
spin_lock_irqsave(&dev->priv->tx_list.lock, flags);
list_add_tail(&lb->link, &dev->priv->tx_list.head);
ps3_vuart_enable_interrupt_tx(dev);
spin_unlock_irqrestore(&dev->tx_list.lock, flags);
spin_unlock_irqrestore(&dev->priv->tx_list.lock, flags);
dev_dbg(&dev->core, "%s:%d: queued buf_%lu, %xh bytes\n",
__func__, __LINE__, lb->dbg_number, bytes);
@ -484,47 +529,83 @@ int ps3_vuart_read(struct ps3_vuart_port_device *dev, void* buf,
dev_dbg(&dev->core, "%s:%d: %u(%xh) bytes\n", __func__, __LINE__,
bytes, bytes);
spin_lock_irqsave(&dev->rx_list.lock, flags);
spin_lock_irqsave(&dev->priv->rx_list.lock, flags);
if (dev->rx_list.bytes_held < bytes) {
spin_unlock_irqrestore(&dev->rx_list.lock, flags);
if (dev->priv->rx_list.bytes_held < bytes) {
spin_unlock_irqrestore(&dev->priv->rx_list.lock, flags);
dev_dbg(&dev->core, "%s:%d: starved for %lxh bytes\n",
__func__, __LINE__, bytes - dev->rx_list.bytes_held);
__func__, __LINE__,
bytes - dev->priv->rx_list.bytes_held);
return -EAGAIN;
}
list_for_each_entry_safe(lb, n, &dev->rx_list.head, link) {
list_for_each_entry_safe(lb, n, &dev->priv->rx_list.head, link) {
bytes_read = min((unsigned int)(lb->tail - lb->head), bytes);
memcpy(buf, lb->head, bytes_read);
buf += bytes_read;
bytes -= bytes_read;
dev->rx_list.bytes_held -= bytes_read;
dev->priv->rx_list.bytes_held -= bytes_read;
if (bytes_read < lb->tail - lb->head) {
lb->head += bytes_read;
spin_unlock_irqrestore(&dev->rx_list.lock, flags);
dev_dbg(&dev->core,
"%s:%d: dequeued buf_%lu, %lxh bytes\n",
__func__, __LINE__, lb->dbg_number, bytes_read);
dev_dbg(&dev->core, "%s:%d: buf_%lu: dequeued %lxh "
"bytes\n", __func__, __LINE__, lb->dbg_number,
bytes_read);
spin_unlock_irqrestore(&dev->priv->rx_list.lock, flags);
return 0;
}
dev_dbg(&dev->core, "%s:%d free buf_%lu\n", __func__, __LINE__,
lb->dbg_number);
dev_dbg(&dev->core, "%s:%d: buf_%lu: free, dequeued %lxh "
"bytes\n", __func__, __LINE__, lb->dbg_number,
bytes_read);
list_del(&lb->link);
kfree(lb);
}
spin_unlock_irqrestore(&dev->rx_list.lock, flags);
dev_dbg(&dev->core, "%s:%d: dequeued buf_%lu, %xh bytes\n",
__func__, __LINE__, lb->dbg_number, bytes);
spin_unlock_irqrestore(&dev->priv->rx_list.lock, flags);
return 0;
}
int ps3_vuart_read_async(struct ps3_vuart_port_device *dev, work_func_t func,
unsigned int bytes)
{
unsigned long flags;
if(dev->priv->work.trigger) {
dev_dbg(&dev->core, "%s:%d: warning, multiple calls\n",
__func__, __LINE__);
return -EAGAIN;
}
BUG_ON(!bytes);
PREPARE_WORK(&dev->priv->work.work, func);
spin_lock_irqsave(&dev->priv->work.lock, flags);
if(dev->priv->rx_list.bytes_held >= bytes) {
dev_dbg(&dev->core, "%s:%d: schedule_work %xh bytes\n",
__func__, __LINE__, bytes);
schedule_work(&dev->priv->work.work);
spin_unlock_irqrestore(&dev->priv->work.lock, flags);
return 0;
}
dev->priv->work.trigger = bytes;
spin_unlock_irqrestore(&dev->priv->work.lock, flags);
dev_dbg(&dev->core, "%s:%d: waiting for %u(%xh) bytes\n", __func__,
__LINE__, bytes, bytes);
return 0;
}
void ps3_vuart_cancel_async(struct ps3_vuart_port_device *dev)
{
dev->priv->work.trigger = 0;
}
/**
* ps3_vuart_handle_interrupt_tx - third stage transmit interrupt handler
*
@ -542,9 +623,9 @@ static int ps3_vuart_handle_interrupt_tx(struct ps3_vuart_port_device *dev)
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
spin_lock_irqsave(&dev->tx_list.lock, flags);
spin_lock_irqsave(&dev->priv->tx_list.lock, flags);
list_for_each_entry_safe(lb, n, &dev->tx_list.head, link) {
list_for_each_entry_safe(lb, n, &dev->priv->tx_list.head, link) {
unsigned long bytes_written;
@ -578,7 +659,7 @@ static int ps3_vuart_handle_interrupt_tx(struct ps3_vuart_port_device *dev)
ps3_vuart_disable_interrupt_tx(dev);
port_full:
spin_unlock_irqrestore(&dev->tx_list.lock, flags);
spin_unlock_irqrestore(&dev->priv->tx_list.lock, flags);
dev_dbg(&dev->core, "%s:%d wrote %lxh bytes total\n",
__func__, __LINE__, bytes_total);
return result;
@ -609,7 +690,7 @@ static int ps3_vuart_handle_interrupt_rx(struct ps3_vuart_port_device *dev)
BUG_ON(!bytes);
/* add some extra space for recently arrived data */
/* Add some extra space for recently arrived data. */
bytes += 128;
@ -624,14 +705,23 @@ static int ps3_vuart_handle_interrupt_rx(struct ps3_vuart_port_device *dev)
lb->tail = lb->data + bytes;
lb->dbg_number = ++dbg_number;
spin_lock_irqsave(&dev->rx_list.lock, flags);
list_add_tail(&lb->link, &dev->rx_list.head);
dev->rx_list.bytes_held += bytes;
spin_unlock_irqrestore(&dev->rx_list.lock, flags);
spin_lock_irqsave(&dev->priv->rx_list.lock, flags);
list_add_tail(&lb->link, &dev->priv->rx_list.head);
dev->priv->rx_list.bytes_held += bytes;
spin_unlock_irqrestore(&dev->priv->rx_list.lock, flags);
dev_dbg(&dev->core, "%s:%d: queued buf_%lu, %lxh bytes\n",
dev_dbg(&dev->core, "%s:%d: buf_%lu: queued %lxh bytes\n",
__func__, __LINE__, lb->dbg_number, bytes);
spin_lock_irqsave(&dev->priv->work.lock, flags);
if(dev->priv->work.trigger
&& dev->priv->rx_list.bytes_held >= dev->priv->work.trigger) {
dev_dbg(&dev->core, "%s:%d: schedule_work %lxh bytes\n",
__func__, __LINE__, dev->priv->work.trigger);
dev->priv->work.trigger = 0;
schedule_work(&dev->priv->work.work);
}
spin_unlock_irqrestore(&dev->priv->work.lock, flags);
return 0;
}
@ -656,7 +746,7 @@ static int ps3_vuart_handle_port_interrupt(struct ps3_vuart_port_device *dev)
int result;
unsigned long status;
result = ps3_vuart_get_interrupt_mask(dev, &status);
result = ps3_vuart_get_interrupt_status(dev, &status);
if (result)
return result;
@ -665,21 +755,21 @@ static int ps3_vuart_handle_port_interrupt(struct ps3_vuart_port_device *dev)
status);
if (status & INTERRUPT_MASK_DISCONNECT) {
dev->stats.disconnect_interrupts++;
dev->priv->stats.disconnect_interrupts++;
result = ps3_vuart_handle_interrupt_disconnect(dev);
if (result)
ps3_vuart_disable_interrupt_disconnect(dev);
}
if (status & INTERRUPT_MASK_TX) {
dev->stats.tx_interrupts++;
dev->priv->stats.tx_interrupts++;
result = ps3_vuart_handle_interrupt_tx(dev);
if (result)
ps3_vuart_disable_interrupt_tx(dev);
}
if (status & INTERRUPT_MASK_RX) {
dev->stats.rx_interrupts++;
dev->priv->stats.rx_interrupts++;
result = ps3_vuart_handle_interrupt_rx(dev);
if (result)
ps3_vuart_disable_interrupt_rx(dev);
@ -688,12 +778,13 @@ static int ps3_vuart_handle_port_interrupt(struct ps3_vuart_port_device *dev)
return 0;
}
struct vuart_private {
unsigned int in_use;
unsigned int virq;
struct ps3_vuart_port_device *devices[PORT_COUNT];
struct vuart_bus_priv {
const struct ports_bmp bmp;
};
unsigned int virq;
struct semaphore probe_mutex;
int use_count;
struct ps3_vuart_port_device *devices[PORT_COUNT];
} static vuart_bus_priv;
/**
* ps3_vuart_irq_handler - first stage interrupt handler
@ -705,25 +796,25 @@ struct vuart_private {
static irqreturn_t ps3_vuart_irq_handler(int irq, void *_private)
{
struct vuart_private *private;
struct vuart_bus_priv *bus_priv;
BUG_ON(!_private);
private = (struct vuart_private *)_private;
bus_priv = (struct vuart_bus_priv *)_private;
while (1) {
unsigned int port;
dump_ports_bmp(&private->bmp);
dump_ports_bmp(&bus_priv->bmp);
port = (BITS_PER_LONG - 1) - __ilog2(private->bmp.status);
port = (BITS_PER_LONG - 1) - __ilog2(bus_priv->bmp.status);
if (port == BITS_PER_LONG)
break;
BUG_ON(port >= PORT_COUNT);
BUG_ON(!private->devices[port]);
BUG_ON(!bus_priv->devices[port]);
ps3_vuart_handle_port_interrupt(private->devices[port]);
ps3_vuart_handle_port_interrupt(bus_priv->devices[port]);
}
return IRQ_HANDLED;
@ -744,12 +835,10 @@ static int ps3_vuart_match(struct device *_dev, struct device_driver *_drv)
return result;
}
static struct vuart_private vuart_private;
static int ps3_vuart_probe(struct device *_dev)
{
int result;
unsigned long tmp;
unsigned int port_number;
struct ps3_vuart_port_device *dev = to_ps3_vuart_port_device(_dev);
struct ps3_vuart_port_driver *drv =
to_ps3_vuart_port_driver(_dev->driver);
@ -758,7 +847,12 @@ static int ps3_vuart_probe(struct device *_dev)
BUG_ON(!drv);
result = ps3_vuart_match_id_to_port(dev->match_id, &dev->port_number);
down(&vuart_bus_priv.probe_mutex);
/* Setup vuart_bus_priv.devices[]. */
result = ps3_vuart_match_id_to_port(dev->match_id,
&port_number);
if (result) {
dev_dbg(&dev->core, "%s:%d: unknown match_id (%d)\n",
@ -767,24 +861,41 @@ static int ps3_vuart_probe(struct device *_dev)
goto fail_match;
}
if (vuart_private.devices[dev->port_number]) {
if (vuart_bus_priv.devices[port_number]) {
dev_dbg(&dev->core, "%s:%d: port busy (%d)\n", __func__,
__LINE__, dev->port_number);
__LINE__, port_number);
result = -EBUSY;
goto fail_match;
}
vuart_private.devices[dev->port_number] = dev;
vuart_bus_priv.devices[port_number] = dev;
INIT_LIST_HEAD(&dev->tx_list.head);
spin_lock_init(&dev->tx_list.lock);
INIT_LIST_HEAD(&dev->rx_list.head);
spin_lock_init(&dev->rx_list.lock);
/* Setup dev->priv. */
dev->priv = kzalloc(sizeof(struct ps3_vuart_port_priv), GFP_KERNEL);
if (!dev->priv) {
result = -ENOMEM;
goto fail_alloc;
}
dev->priv->port_number = port_number;
INIT_LIST_HEAD(&dev->priv->tx_list.head);
spin_lock_init(&dev->priv->tx_list.lock);
INIT_LIST_HEAD(&dev->priv->rx_list.head);
spin_lock_init(&dev->priv->rx_list.lock);
INIT_WORK(&dev->priv->work.work, NULL);
spin_lock_init(&dev->priv->work.lock);
dev->priv->work.trigger = 0;
dev->priv->work.dev = dev;
if (++vuart_bus_priv.use_count == 1) {
vuart_private.in_use++;
if (vuart_private.in_use == 1) {
result = ps3_alloc_vuart_irq(PS3_BINDING_CPU_ANY,
(void*)&vuart_private.bmp.status, &vuart_private.virq);
(void*)&vuart_bus_priv.bmp.status, &vuart_bus_priv.virq);
if (result) {
dev_dbg(&dev->core,
@ -794,8 +905,8 @@ static int ps3_vuart_probe(struct device *_dev)
goto fail_alloc_irq;
}
result = request_irq(vuart_private.virq, ps3_vuart_irq_handler,
IRQF_DISABLED, "vuart", &vuart_private);
result = request_irq(vuart_bus_priv.virq, ps3_vuart_irq_handler,
IRQF_DISABLED, "vuart", &vuart_bus_priv);
if (result) {
dev_info(&dev->core, "%s:%d: request_irq failed (%d)\n",
@ -804,10 +915,11 @@ static int ps3_vuart_probe(struct device *_dev)
}
}
ps3_vuart_set_interrupt_mask(dev, INTERRUPT_MASK_RX);
/* clear stale pending interrupts */
ps3_vuart_get_interrupt_mask(dev, &tmp);
ps3_vuart_clear_rx_bytes(dev, 0);
ps3_vuart_set_interrupt_mask(dev, INTERRUPT_MASK_RX);
ps3_vuart_set_triggers(dev, 1, 1);
@ -822,20 +934,27 @@ static int ps3_vuart_probe(struct device *_dev)
if (result) {
dev_dbg(&dev->core, "%s:%d: drv->probe failed\n",
__func__, __LINE__);
down(&vuart_bus_priv.probe_mutex);
goto fail_probe;
}
up(&vuart_bus_priv.probe_mutex);
return result;
fail_probe:
ps3_vuart_set_interrupt_mask(dev, 0);
fail_request_irq:
vuart_private.in_use--;
if (!vuart_private.in_use) {
ps3_free_vuart_irq(vuart_private.virq);
vuart_private.virq = NO_IRQ;
}
ps3_free_vuart_irq(vuart_bus_priv.virq);
vuart_bus_priv.virq = NO_IRQ;
fail_alloc_irq:
--vuart_bus_priv.use_count;
kfree(dev->priv);
dev->priv = NULL;
fail_alloc:
vuart_bus_priv.devices[port_number] = 0;
fail_match:
up(&vuart_bus_priv.probe_mutex);
dev_dbg(&dev->core, "%s:%d failed\n", __func__, __LINE__);
return result;
}
@ -846,10 +965,12 @@ static int ps3_vuart_remove(struct device *_dev)
struct ps3_vuart_port_driver *drv =
to_ps3_vuart_port_driver(_dev->driver);
down(&vuart_bus_priv.probe_mutex);
dev_dbg(&dev->core, "%s:%d: %s\n", __func__, __LINE__,
dev->core.bus_id);
BUG_ON(vuart_private.in_use < 1);
BUG_ON(vuart_bus_priv.use_count < 1);
if (drv->remove)
drv->remove(dev);
@ -857,13 +978,19 @@ static int ps3_vuart_remove(struct device *_dev)
dev_dbg(&dev->core, "%s:%d: %s no remove method\n", __func__,
__LINE__, dev->core.bus_id);
vuart_private.in_use--;
vuart_bus_priv.devices[dev->priv->port_number] = 0;
if (!vuart_private.in_use) {
free_irq(vuart_private.virq, &vuart_private);
ps3_free_vuart_irq(vuart_private.virq);
vuart_private.virq = NO_IRQ;
if (--vuart_bus_priv.use_count == 0) {
BUG();
free_irq(vuart_bus_priv.virq, &vuart_bus_priv);
ps3_free_vuart_irq(vuart_bus_priv.virq);
vuart_bus_priv.virq = NO_IRQ;
}
kfree(dev->priv);
dev->priv = NULL;
up(&vuart_bus_priv.probe_mutex);
return 0;
}
@ -884,12 +1011,12 @@ static void ps3_vuart_shutdown(struct device *_dev)
}
/**
* ps3_vuart - The vuart instance.
* ps3_vuart_bus - The vuart bus instance.
*
* The vuart is managed as a bus that port devices connect to.
*/
struct bus_type ps3_vuart = {
struct bus_type ps3_vuart_bus = {
.name = "ps3_vuart",
.match = ps3_vuart_match,
.probe = ps3_vuart_probe,
@ -897,24 +1024,30 @@ struct bus_type ps3_vuart = {
.shutdown = ps3_vuart_shutdown,
};
int __init ps3_vuart_init(void)
int __init ps3_vuart_bus_init(void)
{
int result;
pr_debug("%s:%d:\n", __func__, __LINE__);
result = bus_register(&ps3_vuart);
if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
return 0;
init_MUTEX(&vuart_bus_priv.probe_mutex);
result = bus_register(&ps3_vuart_bus);
BUG_ON(result);
return result;
}
void __exit ps3_vuart_exit(void)
void __exit ps3_vuart_bus_exit(void)
{
pr_debug("%s:%d:\n", __func__, __LINE__);
bus_unregister(&ps3_vuart);
bus_unregister(&ps3_vuart_bus);
}
core_initcall(ps3_vuart_init);
module_exit(ps3_vuart_exit);
core_initcall(ps3_vuart_bus_init);
module_exit(ps3_vuart_bus_exit);
/**
* ps3_vuart_port_release_device - Remove a vuart port device.
@ -922,11 +1055,14 @@ module_exit(ps3_vuart_exit);
static void ps3_vuart_port_release_device(struct device *_dev)
{
struct ps3_vuart_port_device *dev = to_ps3_vuart_port_device(_dev);
#if defined(DEBUG)
memset(dev, 0xad, sizeof(struct ps3_vuart_port_device));
struct ps3_vuart_port_device *dev = to_ps3_vuart_port_device(_dev);
dev_dbg(&dev->core, "%s:%d\n", __func__, __LINE__);
BUG_ON(dev->priv && "forgot to free");
memset(&dev->core, 0, sizeof(dev->core));
#endif
kfree(dev);
}
/**
@ -935,11 +1071,12 @@ static void ps3_vuart_port_release_device(struct device *_dev)
int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev)
{
int result;
static unsigned int dev_count = 1;
BUG_ON(dev->priv && "forgot to free");
dev->core.parent = NULL;
dev->core.bus = &ps3_vuart;
dev->core.bus = &ps3_vuart_bus;
dev->core.release = ps3_vuart_port_release_device;
snprintf(dev->core.bus_id, sizeof(dev->core.bus_id), "vuart_%02x",
@ -947,9 +1084,7 @@ int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev)
dev_dbg(&dev->core, "%s:%d register\n", __func__, __LINE__);
result = device_register(&dev->core);
return result;
return device_register(&dev->core);
}
EXPORT_SYMBOL_GPL(ps3_vuart_port_device_register);
@ -963,7 +1098,7 @@ int ps3_vuart_port_driver_register(struct ps3_vuart_port_driver *drv)
int result;
pr_debug("%s:%d: (%s)\n", __func__, __LINE__, drv->core.name);
drv->core.bus = &ps3_vuart;
drv->core.bus = &ps3_vuart_bus;
result = driver_register(&drv->core);
return result;
}
@ -976,6 +1111,7 @@ EXPORT_SYMBOL_GPL(ps3_vuart_port_driver_register);
void ps3_vuart_port_driver_unregister(struct ps3_vuart_port_driver *drv)
{
pr_debug("%s:%d: (%s)\n", __func__, __LINE__, drv->core.name);
driver_unregister(&drv->core);
}

View File

@ -21,6 +21,44 @@
#if !defined(_PS3_VUART_H)
#define _PS3_VUART_H
#include <asm/ps3.h>
struct ps3_vuart_stats {
unsigned long bytes_written;
unsigned long bytes_read;
unsigned long tx_interrupts;
unsigned long rx_interrupts;
unsigned long disconnect_interrupts;
};
struct ps3_vuart_work {
struct work_struct work;
unsigned long trigger;
spinlock_t lock;
struct ps3_vuart_port_device* dev; /* to convert work to device */
};
/**
* struct ps3_vuart_port_priv - private vuart device data.
*/
struct ps3_vuart_port_priv {
unsigned int port_number;
u64 interrupt_mask;
struct {
spinlock_t lock;
struct list_head head;
} tx_list;
struct {
unsigned long bytes_held;
spinlock_t lock;
struct list_head head;
} rx_list;
struct ps3_vuart_stats stats;
struct ps3_vuart_work work;
};
/**
* struct ps3_vuart_port_driver - a driver for a device on a vuart port
*/
@ -41,10 +79,6 @@ struct ps3_vuart_port_driver {
int ps3_vuart_port_driver_register(struct ps3_vuart_port_driver *drv);
void ps3_vuart_port_driver_unregister(struct ps3_vuart_port_driver *drv);
int ps3_vuart_write(struct ps3_vuart_port_device *dev,
const void* buf, unsigned int bytes);
int ps3_vuart_read(struct ps3_vuart_port_device *dev, void* buf,
unsigned int bytes);
static inline struct ps3_vuart_port_driver *to_ps3_vuart_port_driver(
struct device_driver *_drv)
{
@ -55,5 +89,22 @@ static inline struct ps3_vuart_port_device *to_ps3_vuart_port_device(
{
return container_of(_dev, struct ps3_vuart_port_device, core);
}
static inline struct ps3_vuart_port_device *ps3_vuart_work_to_port_device(
struct work_struct *_work)
{
struct ps3_vuart_work *vw = container_of(_work, struct ps3_vuart_work,
work);
return vw->dev;
}
int ps3_vuart_write(struct ps3_vuart_port_device *dev, const void* buf,
unsigned int bytes);
int ps3_vuart_read(struct ps3_vuart_port_device *dev, void* buf,
unsigned int bytes);
int ps3_vuart_read_async(struct ps3_vuart_port_device *dev, work_func_t func,
unsigned int bytes);
void ps3_vuart_cancel_async(struct ps3_vuart_port_device *dev);
void ps3_vuart_clear_rx_bytes(struct ps3_vuart_port_device *dev,
unsigned int bytes);
#endif

View File

@ -285,7 +285,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
int __init cpm_uart_init_portdesc(void)
{
#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
u32 addr;
u16 *addr;
#endif
pr_debug("CPM uart[-]:init portdesc\n");

View File

@ -995,8 +995,10 @@ mpc52xx_uart_of_remove(struct of_device *op)
struct uart_port *port = dev_get_drvdata(&op->dev);
dev_set_drvdata(&op->dev, NULL);
if (port)
if (port) {
uart_remove_one_port(&mpc52xx_uart_driver, port);
irq_dispose_mapping(port->irq);
}
return 0;
}

View File

@ -165,7 +165,8 @@ static __inline__ int atomic_dec_return(atomic_t *v)
return t;
}
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_cmpxchg(v, o, n) \
((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
/**
@ -413,6 +414,43 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
return t;
}
#define atomic64_cmpxchg(v, o, n) \
((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
/**
* atomic64_add_unless - add unless the number is a given value
* @v: pointer of type atomic64_t
* @a: the amount to add to v...
* @u: ...unless v is equal to u.
*
* Atomically adds @a to @v, so long as it was not @u.
* Returns non-zero if @v was not @u, and zero otherwise.
*/
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
{
long t;
__asm__ __volatile__ (
LWSYNC_ON_SMP
"1: ldarx %0,0,%1 # atomic_add_unless\n\
cmpd 0,%0,%3 \n\
beq- 2f \n\
add %0,%2,%0 \n"
" stdcx. %0,0,%1 \n\
bne- 1b \n"
ISYNC_ON_SMP
" subf %0,%2,%0 \n\
2:"
: "=&r" (t)
: "r" (&v->counter), "r" (a), "r" (u)
: "cc", "memory");
return t != u;
}
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
#endif /* __powerpc64__ */
#include <asm-generic/atomic.h>

View File

@ -26,8 +26,8 @@ typedef struct {} dcr_host_t;
#define DCR_MAP_OK(host) (1)
#define dcr_map(dev, dcr_n, dcr_c) {}
#define dcr_unmap(host, dcr_n, dcr_c) {}
#define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){})
#define dcr_unmap(host, dcr_n, dcr_c) do {} while (0)
#define dcr_read(host, dcr_n) mfdcr(dcr_n)
#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value)

67
include/asm-powerpc/pmi.h Normal file
View File

@ -0,0 +1,67 @@
#ifndef _POWERPC_PMI_H
#define _POWERPC_PMI_H
/*
* Definitions for talking with PMI device on PowerPC
*
* PMI (Platform Management Interrupt) is a way to communicate
* with the BMC (Baseboard Management Controller) via interrupts.
* Unlike IPMI it is bidirectional and has a low latency.
*
* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
*
* Author: Christian Krafft <krafft@de.ibm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifdef __KERNEL__
#include <asm/of_device.h>
#define PMI_TYPE_FREQ_CHANGE 0x01
#define PMI_READ_TYPE 0
#define PMI_READ_DATA0 1
#define PMI_READ_DATA1 2
#define PMI_READ_DATA2 3
#define PMI_WRITE_TYPE 4
#define PMI_WRITE_DATA0 5
#define PMI_WRITE_DATA1 6
#define PMI_WRITE_DATA2 7
#define PMI_ACK 0x80
#define PMI_TIMEOUT 100
typedef struct {
u8 type;
u8 data0;
u8 data1;
u8 data2;
} pmi_message_t;
struct pmi_handler {
struct list_head node;
u8 type;
void (*handle_pmi_message) (struct of_device *, pmi_message_t);
};
void pmi_register_handler(struct of_device *, struct pmi_handler *);
void pmi_unregister_handler(struct of_device *, struct pmi_handler *);
void pmi_send_message(struct of_device *, pmi_message_t);
#endif /* __KERNEL__ */
#endif /* _POWERPC_PMI_H */

View File

@ -255,6 +255,8 @@ extern void kdump_move_device_tree(void);
/* CPU OF node matching */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
/* Get the MAC address */
extern const void *of_get_mac_address(struct device_node *np);
/*
* OF interrupt mapping

View File

@ -355,13 +355,7 @@ extern struct bus_type ps3_system_bus_type;
/* vuart routines */
struct ps3_vuart_stats {
unsigned long bytes_written;
unsigned long bytes_read;
unsigned long tx_interrupts;
unsigned long rx_interrupts;
unsigned long disconnect_interrupts;
};
struct ps3_vuart_port_priv;
/**
* struct ps3_vuart_port_device - a device on a vuart port
@ -370,24 +364,17 @@ struct ps3_vuart_stats {
struct ps3_vuart_port_device {
enum ps3_match_id match_id;
struct device core;
struct ps3_vuart_port_priv* priv; /* private driver variables */
/* private driver variables */
unsigned int port_number;
u64 interrupt_mask;
struct {
spinlock_t lock;
struct list_head head;
} tx_list;
struct {
unsigned long bytes_held;
spinlock_t lock;
struct list_head head;
} rx_list;
struct ps3_vuart_stats stats;
};
int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev);
/* system manager */
void ps3_sys_manager_restart(void);
void ps3_sys_manager_power_off(void);
struct ps3_prealloc {
const char *name;
void *address;

View File

@ -150,7 +150,7 @@ struct ucc_slow_info {
int ucc_num;
enum qe_clock rx_clock;
enum qe_clock tx_clock;
struct ucc_slow *regs;
u32 regs;
int irq;
u16 uccm_mask;
int data_mem_part;
@ -199,9 +199,9 @@ struct ucc_slow_private {
and length for first BD in a frame */
u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */
u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */
u8 *confBd; /* next BD for confirm after Tx */
u8 *tx_bd; /* next BD for new Tx request */
u8 *rx_bd; /* next BD to collect after Rx */
struct qe_bd *confBd; /* next BD for confirm after Tx */
struct qe_bd *tx_bd; /* next BD for new Tx request */
struct qe_bd *rx_bd; /* next BD to collect after Rx */
void *p_rx_frame; /* accumulating receive frame */
u16 *p_ucce; /* a pointer to the event register in memory.
*/