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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6 

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (171 commits)
  Blackfin arch: fix bug - BF527 0.2 silicon has different CPUID (DSPID) value
  Blackfin arch: Enlarge flash partition for kenel for bf533/bf537 boards
  Blackfin arch: fix bug: kernel crash when enable SDIO host driver
  Blackfin arch: Print FP at level KERN_NOTICE
  Blackfin arch: drop ad73311 test code
  Blackfin arch: update board default configs
  Blackfin arch: Set PB4 as the default irq for bf548 board v1.4+.
  Blackfin arch: fix typo in early printk bit size processing
  Blackfin arch: enable reprogram cclk and sclk for bf518f-ezbrd
  Blackfin arch: add SDIO host driver platform data
  Blackfin arch: fix bug - kernel stops at initial console
  Blackfin arch: fix bug - kernel crash after config IP for ethernet port
  Blackfin arch: add sdh support for bf518f-ezbrd
  Blackfin arch: fix bug - kernel detects BF532 incorrectly
  Blackfin arch: add () to avoid warnings from gcc
  Blackfin arch: change HWTRACE Kconfig and set it on default
  Blackfin arch: Clean oprofile build path for blackfin
  Blackfin arch: remove hardware PM code, oprofile not use it
  Blackfin arch: rewrite get_sclk()/get_vco()
  Blackfin arch: cleanup and unify the ins functions
  ...
This commit is contained in:
Linus Torvalds 2009-01-07 12:00:25 -08:00
parent 2f2408a88c 06af15e086
commit 5bb47b9ff3
270 changed files with 30966 additions and 10118 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/blackfin/00-INDEX
View File

@ -9,3 +9,6 @@ cachefeatures.txt
Filesystems
- Requirements for mounting the root file system.
bfin-gpio-note.txt
- Notes in developing/using bfin-gpio driver.

71
Documentation/blackfin/bfin-gpio-notes.txt Normal file
View File

@ -0,0 +1,71 @@
/*
* File: Documentation/blackfin/bfin-gpio-note.txt
* Based on:
* Author:
*
* Created: $Id: bfin-gpio-note.txt 2008-11-24 16:42 grafyang $
* Description: This file contains the notes in developing/using bfin-gpio.
*
*
* Rev:
*
* Modified:
* Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
*/
1. Blackfin GPIO introduction
There are many GPIO pins on Blackfin. Most of these pins are muxed to
multi-functions. They can be configured as peripheral, or just as GPIO,
configured to input with interrupt enabled, or output.
For detailed information, please see "arch/blackfin/kernel/bfin_gpio.c",
or the relevant HRM.
2. Avoiding resource conflict
Followed function groups are used to avoiding resource conflict,
- Use the pin as peripheral,
int peripheral_request(unsigned short per, const char *label);
int peripheral_request_list(const unsigned short per[], const char *label);
void peripheral_free(unsigned short per);
void peripheral_free_list(const unsigned short per[]);
- Use the pin as GPIO,
int bfin_gpio_request(unsigned gpio, const char *label);
void bfin_gpio_free(unsigned gpio);
- Use the pin as GPIO interrupt,
int bfin_gpio_irq_request(unsigned gpio, const char *label);
void bfin_gpio_irq_free(unsigned gpio);
The request functions will record the function state for a certain pin,
the free functions will clear it's function state.
Once a pin is requested, it can't be requested again before it is freed by
previous caller, otherwise kernel will dump stacks, and the request
function fail.
These functions are wrapped by other functions, most of the users need not
care.
3. But there are some exceptions
- Kernel permit the identical GPIO be requested both as GPIO and GPIO
interrut.
Some drivers, like gpio-keys, need this behavior. Kernel only print out
warning messages like,
bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are
configuring it as IRQ!
Note: Consider the case that, if there are two drivers need the
identical GPIO, one of them use it as GPIO, the other use it as
GPIO interrupt. This will really cause resource conflict. So if
there is any abnormal driver behavior, please check the bfin-gpio
warning messages.
- Kernel permit the identical GPIO be requested from the same driver twice.

204
arch/blackfin/Kconfig
View File

@ -26,6 +26,7 @@ config BLACKFIN
default y
select HAVE_IDE
select HAVE_OPROFILE
select ARCH_WANT_OPTIONAL_GPIOLIB
config ZONE_DMA
bool
@ -59,10 +60,6 @@ config GENERIC_CALIBRATE_DELAY
bool
default y
config HARDWARE_PM
def_bool y
depends on OPROFILE
source "init/Kconfig"
source "kernel/Kconfig.preempt"
@ -77,6 +74,26 @@ choice
prompt "CPU"
default BF533
config BF512
bool "BF512"
help
BF512 Processor Support.
config BF514
bool "BF514"
help
BF514 Processor Support.
config BF516
bool "BF516"
help
BF516 Processor Support.
config BF518
bool "BF518"
help
BF518 Processor Support.
config BF522
bool "BF522"
help
@ -137,6 +154,16 @@ config BF537
help
BF537 Processor Support.
config BF538
bool "BF538"
help
BF538 Processor Support.
config BF539
bool "BF539"
help
BF539 Processor Support.
config BF542
bool "BF542"
help
@ -169,28 +196,55 @@ config BF561
endchoice
config SMP
depends on BF561
bool "Symmetric multi-processing support"
---help---
This enables support for systems with more than one CPU,
like the dual core BF561. If you have a system with only one
CPU, say N. If you have a system with more than one CPU, say Y.
If you don't know what to do here, say N.
config NR_CPUS
int
depends on SMP
default 2 if BF561
config IRQ_PER_CPU
bool
depends on SMP
default y
config TICK_SOURCE_SYSTMR0
bool
select BFIN_GPTIMERS
depends on SMP
default y
config BF_REV_MIN
int
default 0 if (BF52x || BF54x)
default 0 if (BF51x || BF52x || BF54x)
default 2 if (BF537 || BF536 || BF534)
default 3 if (BF561 ||BF533 || BF532 || BF531)
default 4 if (BF538 || BF539)
config BF_REV_MAX
int
default 2 if (BF52x || BF54x)
default 2 if (BF51x || BF52x || BF54x)
default 3 if (BF537 || BF536 || BF534)
default 5 if (BF561)
default 5 if (BF561 || BF538 || BF539)
default 6 if (BF533 || BF532 || BF531)
choice
prompt "Silicon Rev"
default BF_REV_0_1 if (BF52x || BF54x)
default BF_REV_0_1 if (BF51x || BF52x || BF54x)
default BF_REV_0_2 if (BF534 || BF536 || BF537)
default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561)
config BF_REV_0_0
bool "0.0"
depends on (BF52x || BF54x)
depends on (BF51x || BF52x || BF54x)
config BF_REV_0_1
bool "0.1"
@ -206,11 +260,11 @@ config BF_REV_0_3
config BF_REV_0_4
bool "0.4"
depends on (BF561 || BF533 || BF532 || BF531)
depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539)
config BF_REV_0_5
bool "0.5"
depends on (BF561 || BF533 || BF532 || BF531)
depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539)
config BF_REV_0_6
bool "0.6"
@ -224,6 +278,11 @@ config BF_REV_NONE
endchoice
config BF51x
bool
depends on (BF512 || BF514 || BF516 || BF518)
default y
config BF52x
bool
depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
@ -258,7 +317,7 @@ config MEM_MT48LC16M16A2TG_75
config MEM_MT48LC32M8A2_75
bool
depends on (BFIN537_STAMP || PNAV10)
depends on (BFIN537_STAMP || PNAV10 || BFIN538_EZKIT)
default y
config MEM_MT48LC8M32B2B5_7
@ -271,10 +330,17 @@ config MEM_MT48LC32M16A2TG_75
depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD)
default y
config MEM_MT48LC32M8A2_75
bool
depends on (BFIN518F_EZBRD)
default y
source "arch/blackfin/mach-bf518/Kconfig"
source "arch/blackfin/mach-bf527/Kconfig"
source "arch/blackfin/mach-bf533/Kconfig"
source "arch/blackfin/mach-bf561/Kconfig"
source "arch/blackfin/mach-bf537/Kconfig"
source "arch/blackfin/mach-bf538/Kconfig"
source "arch/blackfin/mach-bf548/Kconfig"
menu "Board customizations"
@ -307,6 +373,7 @@ config BOOT_LOAD
config ROM_BASE
hex "Kernel ROM Base"
depends on ROMKERNEL
default "0x20040000"
range 0x20000000 0x20400000 if !(BF54x || BF561)
range 0x20000000 0x30000000 if (BF54x || BF561)
@ -318,7 +385,7 @@ config CLKIN_HZ
int "Frequency of the crystal on the board in Hz"
default "11059200" if BFIN533_STAMP
default "27000000" if BFIN533_EZKIT
default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)
default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT || BFIN518F-EZBRD)
default "30000000" if BFIN561_EZKIT
default "24576000" if PNAV10
default "10000000" if BFIN532_IP0X
@ -354,11 +421,11 @@ config VCO_MULT
range 1 64
default "22" if BFIN533_EZKIT
default "45" if BFIN533_STAMP
default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
default "22" if BFIN533_BLUETECHNIX_CM
default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
default "20" if BFIN561_EZKIT
default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)
default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD)
help
This controls the frequency of the on-chip PLL. This can be between 1 and 64.
PLL Frequency = (Crystal Frequency) * (this setting)
@ -407,19 +474,70 @@ config MEM_MT46V32M16_5B
bool "MT46V32M16_5B"
endchoice
config MAX_MEM_SIZE
int "Max SDRAM Memory Size in MBytes"
depends on !MPU
default 512
choice
prompt "DDR/SDRAM Timing"
depends on BFIN_KERNEL_CLOCK
default BFIN_KERNEL_CLOCK_MEMINIT_CALC
help
This is the max memory size that the kernel will create CPLB
tables for. Your system will not be able to handle any more.
This option allows you to specify Blackfin SDRAM/DDR Timing parameters
The calculated SDRAM timing parameters may not be 100%
accurate - This option is therefore marked experimental.
config BFIN_KERNEL_CLOCK_MEMINIT_CALC
bool "Calculate Timings (EXPERIMENTAL)"
depends on EXPERIMENTAL
config BFIN_KERNEL_CLOCK_MEMINIT_SPEC
bool "Provide accurate Timings based on target SCLK"
help
Please consult the Blackfin Hardware Reference Manuals as well
as the memory device datasheet.
http://docs.blackfin.uclinux.org/doku.php?id=bfin:sdram
endchoice
menu "Memory Init Control"
depends on BFIN_KERNEL_CLOCK_MEMINIT_SPEC
config MEM_DDRCTL0
depends on BF54x
hex "DDRCTL0"
default 0x0
config MEM_DDRCTL1
depends on BF54x
hex "DDRCTL1"
default 0x0
config MEM_DDRCTL2
depends on BF54x
hex "DDRCTL2"
default 0x0
config MEM_EBIU_DDRQUE
depends on BF54x
hex "DDRQUE"
default 0x0
config MEM_SDRRC
depends on !BF54x
hex "SDRRC"
default 0x0
config MEM_SDGCTL
depends on !BF54x
hex "SDGCTL"
default 0x0
endmenu
#
# Max & Min Speeds for various Chips
#
config MAX_VCO_HZ
int
default 400000000 if BF512
default 400000000 if BF514
default 400000000 if BF516
default 400000000 if BF518
default 600000000 if BF522
default 400000000 if BF523
default 400000000 if BF524
@ -459,6 +577,7 @@ source kernel/Kconfig.hz
config GENERIC_TIME
bool "Generic time"
depends on !SMP
default y
config GENERIC_CLOCKEVENTS
@ -533,6 +652,7 @@ endmenu
menu "Blackfin Kernel Optimizations"
depends on !SMP
comment "Memory Optimizations"
@ -655,6 +775,17 @@ config APP_STACK_L1
Currently only works with FLAT binaries.
config EXCEPTION_L1_SCRATCH
bool "Locate exception stack in L1 Scratch Memory"
default n
depends on !APP_STACK_L1 && !SYSCALL_TAB_L1
help
Whenever an exception occurs, use the L1 Scratch memory for
stack storage. You cannot place the stacks of FLAT binaries
in L1 when using this option.
If you don't use L1 Scratch, then you should say Y here.
comment "Speed Optimizations"
config BFIN_INS_LOWOVERHEAD
bool "ins[bwl] low overhead, higher interrupt latency"
@ -684,7 +815,6 @@ config BFIN_INS_LOWOVERHEAD
endmenu
choice
prompt "Kernel executes from"
help
@ -714,17 +844,9 @@ config BFIN_GPTIMERS
To compile this driver as a module, choose M here: the module
will be called gptimers.ko.
config BFIN_DMA_5XX
bool "Enable DMA Support"
depends on (BF52x || BF53x || BF561 || BF54x)
default y
help
DMA driver for BF5xx.
choice
prompt "Uncached SDRAM region"
prompt "Uncached DMA region"
default DMA_UNCACHED_1M
depends on BFIN_DMA_5XX
config DMA_UNCACHED_4M
bool "Enable 4M DMA region"
config DMA_UNCACHED_2M
@ -751,9 +873,11 @@ config BFIN_ICACHE_LOCK
choice
prompt "Policy"
depends on BFIN_DCACHE
default BFIN_WB
default BFIN_WB if !SMP
default BFIN_WT if SMP
config BFIN_WB
bool "Write back"
depends on !SMP
help
Write Back Policy:
Cached data will be written back to SDRAM only when needed.
@ -790,7 +914,7 @@ endchoice
config BFIN_L2_CACHEABLE
bool "Cache L2 SRAM"
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
default n
help
Select to make L2 SRAM cacheable in L1 data and instruction cache.
@ -980,7 +1104,7 @@ config PM_WAKEUP_GPIO_NUMBER
int "GPIO number"
range 0 47
depends on PM_WAKEUP_BY_GPIO
default 2 if BFIN537_STAMP
default 2
choice
prompt "GPIO Polarity"
@ -1003,7 +1127,7 @@ comment "Possible Suspend Mem / Hibernate Wake-Up Sources"
config PM_BFIN_WAKE_PH6
bool "Allow Wake-Up from on-chip PHY or PH6 GP"
depends on PM && (BF52x || BF534 || BF536 || BF537)
depends on PM && (BF51x || BF52x || BF534 || BF536 || BF537)
default n
help
Enable PHY and PH6 GP Wake-Up (Voltage Regulator Power-Up)
@ -1020,15 +1144,21 @@ menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
config BFIN_CPU_FREQ
bool
depends on CPU_FREQ
select CPU_FREQ_TABLE
default y
config CPU_VOLTAGE
bool "CPU Voltage scaling"
depends on EXPERIMENTAL
depends on EXPERIMENTAL
depends on CPU_FREQ
default n
help
Say Y here if you want CPU voltage scaling according to the CPU frequency.
This option violates the PLL BYPASS recommendation in the Blackfin Processor
manuals. There is a theoretical risk that during VDDINT transitions
manuals. There is a theoretical risk that during VDDINT transitions
the PLL may unlock.
endmenu

30
arch/blackfin/Kconfig.debug
View File

@ -2,8 +2,30 @@ menu "Kernel hacking"
source "lib/Kconfig.debug"
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
help
This option will cause messages to be printed if free stack space
drops below a certain limit.
config DEBUG_STACK_USAGE
bool "Enable stack utilization instrumentation"
depends on DEBUG_KERNEL
help
Enables the display of the minimum amount of free stack which each
task has ever had available in the sysrq-T output.
This option will slow down process creation somewhat.
config HAVE_ARCH_KGDB
def_bool y
def_bool y
config KGDB_TESTCASE
tristate "KGDB: for test case in expect"
default n
help
This is a kgdb test case for automated testing.
config DEBUG_VERBOSE
bool "Verbose fault messages"
@ -182,11 +204,11 @@ config DEBUG_BFIN_HWTRACE_EXPAND_LEN
4 for (2^4) 16k, or 4096 entries
config DEBUG_BFIN_NO_KERN_HWTRACE
bool "Trace user apps (turn off hwtrace in kernel)"
bool "Turn off hwtrace in CPLB handlers"
depends on DEBUG_BFIN_HWTRACE_ON
default n
default y
help
Some pieces of the kernel contain a lot of flow changes which can
The CPLB error handler contains a lot of flow changes which can
quickly fill up the hardware trace buffer. When debugging crashes,
the hardware trace may indicate that the problem lies in kernel
space when in reality an application is buggy.

18
arch/blackfin/Makefile
View File

@ -21,6 +21,10 @@ KALLSYMS += --symbol-prefix=_
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
# setup the machine name and the machine dependent settings
machine-$(CONFIG_BF512) := bf518
machine-$(CONFIG_BF514) := bf518
machine-$(CONFIG_BF516) := bf518
machine-$(CONFIG_BF518) := bf518
machine-$(CONFIG_BF522) := bf527
machine-$(CONFIG_BF523) := bf527
machine-$(CONFIG_BF524) := bf527
@ -33,6 +37,8 @@ machine-$(CONFIG_BF533) := bf533
machine-$(CONFIG_BF534) := bf537
machine-$(CONFIG_BF536) := bf537
machine-$(CONFIG_BF537) := bf537
machine-$(CONFIG_BF538) := bf538
machine-$(CONFIG_BF539) := bf538
machine-$(CONFIG_BF542) := bf548
machine-$(CONFIG_BF544) := bf548
machine-$(CONFIG_BF547) := bf548
@ -42,6 +48,10 @@ machine-$(CONFIG_BF561) := bf561
MACHINE := $(machine-y)
export MACHINE
cpu-$(CONFIG_BF512) := bf512
cpu-$(CONFIG_BF514) := bf514
cpu-$(CONFIG_BF516) := bf516
cpu-$(CONFIG_BF518) := bf518
cpu-$(CONFIG_BF522) := bf522
cpu-$(CONFIG_BF523) := bf523
cpu-$(CONFIG_BF524) := bf524
@ -54,6 +64,8 @@ cpu-$(CONFIG_BF533) := bf533
cpu-$(CONFIG_BF534) := bf534
cpu-$(CONFIG_BF536) := bf536
cpu-$(CONFIG_BF537) := bf537
cpu-$(CONFIG_BF538) := bf538
cpu-$(CONFIG_BF539) := bf539
cpu-$(CONFIG_BF542) := bf542
cpu-$(CONFIG_BF544) := bf544
cpu-$(CONFIG_BF547) := bf547
@ -79,7 +91,7 @@ KBUILD_AFLAGS += -mcpu=$(cpu-y)-$(rev-y)
CHECKFLAGS_SILICON = $(shell echo "" | $(CPP) $(KBUILD_CFLAGS) -dD - 2>/dev/null | awk '$$2 == "__SILICON_REVISION__" { print $$3 }')
CHECKFLAGS += -D__SILICON_REVISION__=$(CHECKFLAGS_SILICON) -Dl1_text=__used__
head-y := arch/$(ARCH)/mach-$(MACHINE)/head.o arch/$(ARCH)/kernel/init_task.o
head-y := arch/$(ARCH)/kernel/init_task.o
core-y += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ arch/$(ARCH)/mach-common/
@ -95,10 +107,10 @@ else
core-y += arch/$(ARCH)/kernel/cplb-nompu/
endif
libs-y += arch/$(ARCH)/lib/
drivers-$(CONFIG_OPROFILE) += arch/$(ARCH)/oprofile/
libs-y += arch/$(ARCH)/lib/
machdirs := $(patsubst %,arch/blackfin/mach-%/, $(machine-y))
KBUILD_CFLAGS += -Iarch/$(ARCH)/include/

1191
arch/blackfin/configs/BF518F-EZBRD_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

361
arch/blackfin/configs/BF526-EZBRD_defconfig
View File

@ -1,7 +1,6 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.26.3
# Thu Aug 28 16:49:53 2008
# Linux kernel version: 2.6.28-rc2
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@ -37,8 +36,7 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
# CONFIG_GROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
@ -48,13 +46,13 @@ CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
@ -63,6 +61,7 @@ CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
@ -70,9 +69,7 @@ CONFIG_SLAB=y
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
# CONFIG_HAVE_DMA_ATTRS is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
@ -89,6 +86,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@ -106,6 +104,7 @@ CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
# CONFIG_FREEZER is not set
#
# Blackfin Processor Options
@ -114,6 +113,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
#
# Processor and Board Settings
#
# CONFIG_BF512 is not set
# CONFIG_BF514 is not set
# CONFIG_BF516 is not set
# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@ -126,22 +129,71 @@ CONFIG_BF526=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
# CONFIG_BF538 is not set
# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
# CONFIG_BF544 is not set
# CONFIG_BF547 is not set
# CONFIG_BF548 is not set
# CONFIG_BF549 is not set
# CONFIG_BF561 is not set
CONFIG_BF_REV_MIN=0
CONFIG_BF_REV_MAX=2
CONFIG_BF_REV_0_0=y
# CONFIG_BF_REV_0_1 is not set
# CONFIG_BF_REV_0_2 is not set
# CONFIG_BF_REV_0_3 is not set
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF52x=y
CONFIG_MEM_MT48LC32M16A2TG_75=y
CONFIG_IRQ_PLL_WAKEUP=7
CONFIG_IRQ_DMA0_ERROR=7
CONFIG_IRQ_DMAR0_BLK=7
CONFIG_IRQ_DMAR1_BLK=7
CONFIG_IRQ_DMAR0_OVR=7
CONFIG_IRQ_DMAR1_OVR=7
CONFIG_IRQ_PPI_ERROR=7
CONFIG_IRQ_MAC_ERROR=7
CONFIG_IRQ_SPORT0_ERROR=7
CONFIG_IRQ_SPORT1_ERROR=7
CONFIG_IRQ_UART0_ERROR=7
CONFIG_IRQ_UART1_ERROR=7
CONFIG_IRQ_RTC=8
CONFIG_IRQ_PPI=8
CONFIG_IRQ_SPORT0_RX=9
CONFIG_IRQ_SPORT0_TX=9
CONFIG_IRQ_SPORT1_RX=9
CONFIG_IRQ_SPORT1_TX=9
CONFIG_IRQ_TWI=10
CONFIG_IRQ_UART0_RX=10
CONFIG_IRQ_UART0_TX=10
CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_OPTSEC=11
CONFIG_IRQ_CNT=11
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_PORTH_INTA=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_PORTH_INTB=11
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTA=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
CONFIG_IRQ_WATCH=13
CONFIG_IRQ_PORTF_INTA=13
CONFIG_IRQ_PORTF_INTB=13
# CONFIG_BFIN527_EZKIT is not set
# CONFIG_BFIN527_BLUETECHNIX_CM is not set
CONFIG_BFIN526_EZBRD=y
@ -169,51 +221,7 @@ CONFIG_BF527_NAND_D_PORTH=y
#
# Priority
#
CONFIG_IRQ_PLL_WAKEUP=7
CONFIG_IRQ_DMA0_ERROR=7
CONFIG_IRQ_DMAR0_BLK=7
CONFIG_IRQ_DMAR1_BLK=7
CONFIG_IRQ_DMAR0_OVR=7
CONFIG_IRQ_DMAR1_OVR=7
CONFIG_IRQ_PPI_ERROR=7
CONFIG_IRQ_MAC_ERROR=7
CONFIG_IRQ_SPORT0_ERROR=7
CONFIG_IRQ_SPORT1_ERROR=7
CONFIG_IRQ_UART0_ERROR=7
CONFIG_IRQ_UART1_ERROR=7
CONFIG_IRQ_RTC=8
CONFIG_IRQ_PPI=8
CONFIG_IRQ_SPORT0_RX=9
CONFIG_IRQ_SPORT0_TX=9
CONFIG_IRQ_SPORT1_RX=9
CONFIG_IRQ_SPORT1_TX=9
CONFIG_IRQ_TWI=10
CONFIG_IRQ_SPI=10
CONFIG_IRQ_UART0_RX=10
CONFIG_IRQ_UART0_TX=10
CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_OPTSEC=11
CONFIG_IRQ_CNT=11
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_PORTH_INTA=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_PORTH_INTB=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_PORTG_INTA=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
CONFIG_IRQ_WATCH=13
CONFIG_IRQ_PORTF_INTA=13
CONFIG_IRQ_PORTF_INTB=13
CONFIG_IRQ_SPI_ERROR=7
CONFIG_IRQ_NFC_ERROR=7
CONFIG_IRQ_HDMA_ERROR=7
@ -235,7 +243,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=25000000
# CONFIG_BFIN_KERNEL_CLOCK is not set
CONFIG_MAX_MEM_SIZE=512
CONFIG_MAX_VCO_HZ=400000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@ -253,15 +260,10 @@ CONFIG_HZ=250
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
#
# Memory Setup
#
#
# Misc
#
@ -291,6 +293,7 @@ CONFIG_ACCESS_OK_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_APP_STACK_L1=y
#
# Speed Optimizations
@ -304,15 +307,13 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
CONFIG_BFIN_GPTIMERS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -365,6 +366,7 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
@ -378,10 +380,6 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Networking
#
CONFIG_NET=y
#
@ -432,6 +430,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
@ -452,11 +451,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_PHONET is not set
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
@ -474,6 +472,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@ -534,7 +534,8 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
# Self-contained MTD device drivers
#
# CONFIG_MTD_DATAFLASH is not set
# CONFIG_MTD_M25P80 is not set
CONFIG_MTD_M25P80=y
CONFIG_M25PXX_USE_FAST_READ=y
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
@ -579,6 +580,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
@ -595,7 +597,6 @@ CONFIG_HAVE_IDE=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@ -633,9 +634,10 @@ CONFIG_BFIN_MAC_RMII=y
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NETDEV_1000=y
# CONFIG_E1000E_ENABLED is not set
# CONFIG_AX88180 is not set
CONFIG_NETDEV_10000=y
@ -667,7 +669,7 @@ CONFIG_NETDEV_10000=y
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
#
@ -692,8 +694,9 @@ CONFIG_INPUT_MISC=y
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
# CONFIG_INPUT_POWERMATE is not set
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_CM109 is not set
# CONFIG_INPUT_UINPUT is not set
# CONFIG_TWI_KEYPAD is not set
# CONFIG_CONFIG_INPUT_PCF8574 is not set
#
# Hardware I/O ports
@ -712,12 +715,15 @@ CONFIG_INPUT_MISC=y
# CONFIG_BFIN_SPORT is not set
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_TWI_LCD is not set
CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_DEVKMEM=y
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -760,25 +766,39 @@ CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_BLACKFIN_TWI=y
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_AT24 is not set
# CONFIG_SENSORS_AD5252 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
@ -787,12 +807,14 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
@ -801,11 +823,15 @@ CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
@ -834,6 +860,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
@ -870,17 +897,15 @@ CONFIG_BFIN_WDT=y
#
# CONFIG_USBPCWATCHDOG is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
#
# Multimedia devices
@ -915,15 +940,8 @@ CONFIG_SSB_POSSIBLE=y
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
CONFIG_SOUND=m
#
# Advanced Linux Sound Architecture
#
CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
@ -937,56 +955,40 @@ CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
#
# Generic devices
#
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# SPI devices
#
CONFIG_SND_SPI=y
#
# ALSA Blackfin devices
#
# CONFIG_SND_BLACKFIN_AD1836 is not set
# CONFIG_SND_BFIN_AD73311 is not set
# CONFIG_SND_BFIN_AD73322 is not set
#
# USB devices
#
CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_CAIAQ is not set
#
# System on Chip audio support
#
CONFIG_SND_SOC=m
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_BF5XX_I2S=m
CONFIG_SND_BF5XX_SOC_SSM2602=m
# CONFIG_SND_BF5XX_AC97 is not set
# CONFIG_SND_BF5XX_SOC_AD73311 is not set
CONFIG_SND_BF5XX_AC97=m
CONFIG_SND_BF5XX_MMAP_SUPPORT=y
# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
CONFIG_SND_BF5XX_SOC_SPORT=m
CONFIG_SND_BF5XX_SOC_I2S=m
CONFIG_SND_BF5XX_SOC_AC97=m
CONFIG_SND_BF5XX_SOC_AD1980=m
CONFIG_SND_BF5XX_SPORT_NUM=0
#
# ALSA SoC audio for Freescale SOCs
#
#
# SoC Audio for the Texas Instruments OMAP
#
# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_AD1980=m
CONFIG_SND_SOC_SSM2602=m
#
# Open Sound System
#
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=m
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
@ -996,9 +998,36 @@ CONFIG_HID=y
# USB Input Devices
#
CONFIG_USB_HID=y
# CONFIG_USB_HIDINPUT_POWERBOOK is not set
# CONFIG_HID_FF is not set
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
#
# Special HID drivers
#
CONFIG_HID_COMPAT=y
CONFIG_HID_A4TECH=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_BRIGHT=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_CYPRESS=y
CONFIG_HID_DELL=y
CONFIG_HID_EZKEY=y
CONFIG_HID_GYRATION=y
CONFIG_HID_LOGITECH=y
# CONFIG_LOGITECH_FF is not set
# CONFIG_LOGIRUMBLEPAD2_FF is not set
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
CONFIG_HID_PANTHERLORD=y
# CONFIG_PANTHERLORD_FF is not set
CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
CONFIG_THRUSTMASTER_FF=m
CONFIG_ZEROPLUS_FF=m
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
@ -1016,6 +1045,9 @@ CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_OTG_BLACKLIST_HUB=y
CONFIG_USB_MON=y
# CONFIG_USB_WUSB is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
@ -1026,6 +1058,7 @@ CONFIG_USB_OTG_BLACKLIST_HUB=y
# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HWA_HCD is not set
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SOC=y
@ -1037,7 +1070,7 @@ CONFIG_USB_MUSB_HOST=y
# CONFIG_USB_MUSB_OTG is not set
CONFIG_USB_MUSB_HDRC_HCD=y
CONFIG_MUSB_PIO_ONLY=y
CONFIG_USB_MUSB_LOGLEVEL=0
# CONFIG_USB_MUSB_DEBUG is not set
#
# USB Device Class drivers
@ -1045,6 +1078,7 @@ CONFIG_USB_MUSB_LOGLEVEL=0
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@ -1059,7 +1093,6 @@ CONFIG_USB_MUSB_LOGLEVEL=0
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
CONFIG_USB_MON=y
#
# USB port drivers
@ -1072,7 +1105,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_AUERSWALD is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
@ -1089,6 +1122,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_VST is not set
# CONFIG_USB_GADGET is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
@ -1128,36 +1162,45 @@ CONFIG_RTC_INTF_DEV=y
#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_BFIN=y
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_DNOTIFY is not set
@ -1225,6 +1268,7 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
@ -1240,7 +1284,7 @@ CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
@ -1308,10 +1352,48 @@ CONFIG_FRAME_WARN=1024
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_FRAME_POINTER is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_HWERR is not set
# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@ -1329,8 +1411,9 @@ CONFIG_ACCESS_CHECK=y
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_CAPABILITIES is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_SECURITY_ROOTPLUG is not set
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
CONFIG_CRYPTO=y
@ -1338,6 +1421,7 @@ CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
@ -1376,6 +1460,10 @@ CONFIG_CRYPTO=y
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
@ -1406,15 +1494,20 @@ CONFIG_CRYPTO=y
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set

575
arch/blackfin/configs/BF527-EZKIT_defconfig
View File

File diff suppressed because it is too large Load Diff

318
arch/blackfin/configs/BF533-EZKIT_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24.7
# Linux kernel version: 2.6.28-rc2
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@ -8,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@ -31,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_GROUP_SCHED is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -51,26 +48,35 @@ CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@ -81,6 +87,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@ -94,9 +101,11 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
CONFIG_FREEZER=y
#
# Blackfin Processor Options
@ -105,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
#
# Processor and Board Settings
#
# CONFIG_BF512 is not set
# CONFIG_BF514 is not set
# CONFIG_BF516 is not set
# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@ -117,24 +130,30 @@ CONFIG_BF533=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
# CONFIG_BF538 is not set
# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
# CONFIG_BF544 is not set
# CONFIG_BF547 is not set
# CONFIG_BF548 is not set
# CONFIG_BF549 is not set
# CONFIG_BF561 is not set
CONFIG_BF_REV_MIN=3
CONFIG_BF_REV_MAX=6
# CONFIG_BF_REV_0_0 is not set
# CONFIG_BF_REV_0_1 is not set
# CONFIG_BF_REV_0_2 is not set
CONFIG_BF_REV_0_3=y
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF53x=y
CONFIG_MEM_MT48LC16M16A2TG_75=y
CONFIG_BFIN533_EZKIT=y
# CONFIG_BFIN533_STAMP is not set
# CONFIG_BLACKSTAMP is not set
# CONFIG_BFIN533_BLUETECHNIX_CM is not set
# CONFIG_H8606_HVSISTEMAS is not set
# CONFIG_BFIN532_IP0X is not set
@ -187,7 +206,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=27000000
# CONFIG_BFIN_KERNEL_CLOCK is not set
CONFIG_MAX_MEM_SIZE=512
CONFIG_MAX_VCO_HZ=750000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@ -201,6 +219,7 @@ CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
@ -238,6 +257,12 @@ CONFIG_SYS_BFIN_SPINLOCK_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_APP_STACK_L1=y
#
# Speed Optimizations
#
CONFIG_BFIN_INS_LOWOVERHEAD=y
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
@ -246,14 +271,13 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -268,7 +292,6 @@ CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set
CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
# CONFIG_MPU is not set
#
@ -297,7 +320,6 @@ CONFIG_BANK_3=0xAAC2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
@ -308,29 +330,30 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
CONFIG_PM_SLEEP=y
CONFIG_SUSPEND_UP_POSSIBLE=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_PM_BFIN_SLEEP_DEEPER=y
# CONFIG_PM_BFIN_SLEEP is not set
# CONFIG_PM_WAKEUP_BY_GPIO is not set
#
# Possible Suspend Mem / Hibernate Wake-Up Sources
#
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Networking
#
CONFIG_NET=y
#
@ -343,6 +366,7 @@ CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@ -372,8 +396,6 @@ CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
@ -382,6 +404,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
@ -398,6 +421,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
CONFIG_IRDA=m
#
@ -429,25 +453,15 @@ CONFIG_IRTTY_SIR=m
#
# CONFIG_DONGLE is not set
#
# Old SIR device drivers
#
# CONFIG_IRPORT_SIR is not set
#
# Old Serial dongle support
#
#
# FIR device drivers
#
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_PHONET is not set
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
@ -465,6 +479,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@ -473,6 +489,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@ -516,6 +533,7 @@ CONFIG_MTD_ROM=m
#
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_GPIO_ADDR is not set
# CONFIG_MTD_UCLINUX is not set
# CONFIG_MTD_PLATRAM is not set
@ -550,11 +568,14 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@ -567,7 +588,6 @@ CONFIG_MISC_DEVICES=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@ -580,11 +600,14 @@ CONFIG_MII=y
CONFIG_SMC91X=y
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NETDEV_1000=y
# CONFIG_AX88180 is not set
CONFIG_NETDEV_10000=y
@ -594,10 +617,10 @@ CONFIG_NETDEV_10000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
@ -645,8 +668,11 @@ CONFIG_INPUT_EVDEV=m
# CONFIG_BF5xx_PPI is not set
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -675,22 +701,19 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_CAN4LINUX is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
@ -699,14 +722,18 @@ CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM70 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
@ -715,6 +742,8 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -724,22 +753,29 @@ CONFIG_WATCHDOG=y
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_WM8400 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
@ -754,18 +790,22 @@ CONFIG_SSB_POSSIBLE=y
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=m
# CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
# CONFIG_HID_PID is not set
#
# Special HID drivers
#
CONFIG_HID_COMPAT=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
@ -784,47 +824,51 @@ CONFIG_RTC_INTF_DEV=y
#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_BFIN=y
#
# Userspace I/O
#
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@ -864,11 +908,11 @@ CONFIG_SYSFS=y
# CONFIG_EFS_FS is not set
CONFIG_YAFFS_FS=m
CONFIG_YAFFS_YAFFS1=y
# CONFIG_YAFFS_9BYTE_TAGS is not set
# CONFIG_YAFFS_DOES_ECC is not set
CONFIG_YAFFS_YAFFS2=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
@ -885,8 +929,11 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
@ -894,13 +941,12 @@ CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
@ -956,9 +1002,6 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
CONFIG_INSTRUMENTATION=y
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
#
# Kernel hacking
@ -966,14 +1009,53 @@ CONFIG_INSTRUMENTATION=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_FRAME_POINTER is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_HWERR is not set
# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@ -991,9 +1073,94 @@ CONFIG_ACCESS_CHECK=y
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_CAPABILITIES is not set
# CONFIG_CRYPTO is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
@ -1001,6 +1168,7 @@ CONFIG_SECURITY=y
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set

409
arch/blackfin/configs/BF533-STAMP_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24.7
# Linux kernel version: 2.6.28-rc2
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@ -8,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@ -31,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_GROUP_SCHED is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -51,26 +48,35 @@ CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@ -81,6 +87,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@ -94,9 +101,11 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
CONFIG_FREEZER=y
#
# Blackfin Processor Options
@ -105,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
#
# Processor and Board Settings
#
# CONFIG_BF512 is not set
# CONFIG_BF514 is not set
# CONFIG_BF516 is not set
# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@ -117,24 +130,30 @@ CONFIG_BF533=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
# CONFIG_BF538 is not set
# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
# CONFIG_BF544 is not set
# CONFIG_BF547 is not set
# CONFIG_BF548 is not set
# CONFIG_BF549 is not set
# CONFIG_BF561 is not set
CONFIG_BF_REV_MIN=3
CONFIG_BF_REV_MAX=6
# CONFIG_BF_REV_0_0 is not set
# CONFIG_BF_REV_0_1 is not set
# CONFIG_BF_REV_0_2 is not set
CONFIG_BF_REV_0_3=y
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF53x=y
CONFIG_MEM_MT48LC64M4A2FB_7E=y
# CONFIG_BFIN533_EZKIT is not set
CONFIG_BFIN533_STAMP=y
# CONFIG_BLACKSTAMP is not set
# CONFIG_BFIN533_BLUETECHNIX_CM is not set
# CONFIG_H8606_HVSISTEMAS is not set
# CONFIG_BFIN532_IP0X is not set
@ -187,7 +206,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=11059200
# CONFIG_BFIN_KERNEL_CLOCK is not set
CONFIG_MAX_MEM_SIZE=512
CONFIG_MAX_VCO_HZ=750000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@ -201,6 +219,7 @@ CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
@ -238,6 +257,12 @@ CONFIG_SYS_BFIN_SPINLOCK_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_APP_STACK_L1=y
#
# Speed Optimizations
#
CONFIG_BFIN_INS_LOWOVERHEAD=y
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
@ -246,14 +271,13 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -268,7 +292,6 @@ CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set
CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
# CONFIG_MPU is not set
#
@ -297,7 +320,6 @@ CONFIG_BANK_3=0xAAC2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
@ -308,29 +330,30 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
CONFIG_PM_SLEEP=y
CONFIG_SUSPEND_UP_POSSIBLE=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_PM_BFIN_SLEEP_DEEPER=y
# CONFIG_PM_BFIN_SLEEP is not set
# CONFIG_PM_WAKEUP_BY_GPIO is not set
#
# Possible Suspend Mem / Hibernate Wake-Up Sources
#
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Networking
#
CONFIG_NET=y
#
@ -343,6 +366,7 @@ CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@ -372,8 +396,6 @@ CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
@ -382,6 +404,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
@ -398,6 +421,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
CONFIG_IRDA=m
#
@ -431,25 +455,15 @@ CONFIG_SIR_BFIN_DMA=y
#
# CONFIG_DONGLE is not set
#
# Old SIR device drivers
#
# CONFIG_IRPORT_SIR is not set
#
# Old Serial dongle support
#
#
# FIR device drivers
#
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_PHONET is not set
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
@ -467,6 +481,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@ -475,6 +491,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@ -520,6 +537,7 @@ CONFIG_MTD_ROM=m
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_BFIN_ASYNC=m
# CONFIG_MTD_GPIO_ADDR is not set
# CONFIG_MTD_UCLINUX is not set
# CONFIG_MTD_PLATRAM is not set
@ -554,11 +572,14 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@ -571,7 +592,6 @@ CONFIG_MISC_DEVICES=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@ -584,11 +604,14 @@ CONFIG_MII=y
CONFIG_SMC91X=y
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NETDEV_1000=y
# CONFIG_AX88180 is not set
CONFIG_NETDEV_10000=y
@ -598,10 +621,10 @@ CONFIG_NETDEV_10000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
@ -633,7 +656,7 @@ CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_TOUCHSCREEN is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_UINPUT is not set
CONFIG_TWI_KEYPAD=m
CONFIG_CONFIG_INPUT_PCF8574=m
#
# Hardware I/O ports
@ -652,8 +675,11 @@ CONFIG_TWI_KEYPAD=m
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
CONFIG_TWI_LCD=m
CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -682,41 +708,46 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_CAN4LINUX is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_I2C=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
#
# I2C Algorithms
#
CONFIG_I2C_ALGOBIT=m
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_DS1682 is not set
# CONFIG_AT24 is not set
# CONFIG_SENSORS_AD5252 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCF8575 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_MAX6875 is not set
@ -725,17 +756,15 @@ CONFIG_I2C_ALGOBIT=m
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
#
# SPI support
#
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
@ -744,11 +773,15 @@ CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
@ -756,6 +789,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
@ -776,6 +810,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
@ -784,6 +819,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_W83781D is not set
@ -791,9 +827,12 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -803,22 +842,30 @@ CONFIG_WATCHDOG=y
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
@ -829,6 +876,7 @@ CONFIG_SSB_POSSIBLE=y
CONFIG_FB=m
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
@ -836,8 +884,8 @@ CONFIG_FB_CFB_IMAGEBLIT=m
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
@ -848,6 +896,7 @@ CONFIG_FB_DEFERRED_IO=y
# Frame buffer hardware drivers
#
# CONFIG_FB_BFIN_T350MCQB is not set
# CONFIG_FB_BFIN_LQ035Q1 is not set
CONFIG_FB_BFIN_7393=m
CONFIG_NTSC=y
# CONFIG_PAL is not set
@ -859,6 +908,7 @@ CONFIG_ADV7393_1XMEM=y
# CONFIG_ADV7393_2XMEM is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
@ -866,15 +916,8 @@ CONFIG_ADV7393_1XMEM=y
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_LOGO is not set
#
# Sound
#
CONFIG_SOUND=m
#
# Advanced Linux Sound Architecture
#
CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
@ -888,18 +931,12 @@ CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
#
# Generic devices
#
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# SPI devices
#
CONFIG_SND_SPI=y
#
# ALSA Blackfin devices
@ -911,46 +948,46 @@ CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
CONFIG_SND_BLACKFIN_SPORT=0
CONFIG_SND_BLACKFIN_SPI_PFBIT=4
CONFIG_SND_BFIN_AD73311=m
CONFIG_SND_BFIN_SPORT=0
CONFIG_SND_BFIN_AD73311_SE=4
CONFIG_SND_BFIN_AD73322=m
CONFIG_SND_BFIN_AD73322_SPORT0_SE=10
CONFIG_SND_BFIN_AD73322_SPORT1_SE=14
CONFIG_SND_BFIN_AD73322_RESET=12
#
# System on Chip audio support
#
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_SOC=m
CONFIG_SND_BF5XX_SOC=m
CONFIG_SND_MMAP_SUPPORT=y
CONFIG_SND_BF5XX_SOC_AC97=m
# CONFIG_SND_BF5XX_SOC_WM8750 is not set
# CONFIG_SND_BF5XX_SOC_WM8731 is not set
CONFIG_SND_SOC_AC97_BUS=y
CONFIG_SND_BF5XX_I2S=m
# CONFIG_SND_BF5XX_SOC_SSM2602 is not set
CONFIG_SND_BF5XX_SOC_BF5xx=m
CONFIG_SND_BF5XX_SOC_AD73311=m
CONFIG_SND_BFIN_AD73311_SE=4
CONFIG_SND_BF5XX_AC97=m
CONFIG_SND_BF5XX_MMAP_SUPPORT=y
# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
CONFIG_SND_BF5XX_SOC_SPORT=m
CONFIG_SND_BF5XX_SOC_I2S=m
CONFIG_SND_BF5XX_SOC_AC97=m
CONFIG_SND_BF5XX_SOC_AD1980=m
CONFIG_SND_BF5XX_SPORT_NUM=0
# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
#
# SoC Audio support for SuperH
#
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_AD1980=m
#
# Open Sound System
#
CONFIG_SND_SOC_AD73311=m
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=m
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
# CONFIG_HID_PID is not set
#
# Special HID drivers
#
CONFIG_HID_COMPAT=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
@ -979,51 +1016,57 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_BFIN=y
#
# Userspace I/O
#
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@ -1063,11 +1106,11 @@ CONFIG_SYSFS=y
# CONFIG_EFS_FS is not set
CONFIG_YAFFS_FS=m
CONFIG_YAFFS_YAFFS1=y
# CONFIG_YAFFS_9BYTE_TAGS is not set
# CONFIG_YAFFS_DOES_ECC is not set
CONFIG_YAFFS_YAFFS2=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
@ -1084,8 +1127,11 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
@ -1093,13 +1139,12 @@ CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
@ -1155,9 +1200,6 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
CONFIG_INSTRUMENTATION=y
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
#
# Kernel hacking
@ -1165,14 +1207,53 @@ CONFIG_INSTRUMENTATION=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_FRAME_POINTER is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_HWERR is not set
# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@ -1190,9 +1271,94 @@ CONFIG_ACCESS_CHECK=y
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_CAPABILITIES is not set
# CONFIG_CRYPTO is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
@ -1200,6 +1366,7 @@ CONFIG_SECURITY=y
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set

469
arch/blackfin/configs/BF537-STAMP_defconfig
View File

File diff suppressed because it is too large Load Diff

1368
arch/blackfin/configs/BF538-EZKIT_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

522
arch/blackfin/configs/BF548-EZKIT_defconfig
View File

File diff suppressed because it is too large Load Diff

323
arch/blackfin/configs/BF561-EZKIT_defconfig
View File

@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24.7
# Linux kernel version: 2.6.28-rc2
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@ -8,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@ -31,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_GROUP_SCHED is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -51,26 +48,35 @@ CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@ -81,6 +87,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@ -94,9 +101,11 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
# CONFIG_FREEZER is not set
#
# Blackfin Processor Options
@ -105,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
#
# Processor and Board Settings
#
# CONFIG_BF512 is not set
# CONFIG_BF514 is not set
# CONFIG_BF516 is not set
# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@ -117,24 +130,38 @@ CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
# CONFIG_BF538 is not set
# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
# CONFIG_BF544 is not set
# CONFIG_BF547 is not set
# CONFIG_BF548 is not set
# CONFIG_BF549 is not set
CONFIG_BF561=y
# CONFIG_SMP is not set
CONFIG_BF_REV_MIN=3
CONFIG_BF_REV_MAX=5
# CONFIG_BF_REV_0_0 is not set
# CONFIG_BF_REV_0_1 is not set
# CONFIG_BF_REV_0_2 is not set
CONFIG_BF_REV_0_3=y
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_MEM_MT48LC16M16A2TG_75=y
CONFIG_IRQ_PLL_WAKEUP=7
CONFIG_IRQ_SPORT0_ERROR=7
CONFIG_IRQ_SPORT1_ERROR=7
CONFIG_IRQ_TIMER0=10
CONFIG_IRQ_TIMER1=10
CONFIG_IRQ_TIMER2=10
CONFIG_IRQ_TIMER3=10
CONFIG_IRQ_TIMER4=10
CONFIG_IRQ_TIMER5=10
CONFIG_IRQ_TIMER6=10
CONFIG_IRQ_TIMER7=10
CONFIG_IRQ_SPI_ERROR=7
CONFIG_BFIN561_EZKIT=y
# CONFIG_BFIN561_TEPLA is not set
@ -145,10 +172,6 @@ CONFIG_BFIN561_EZKIT=y
# BF561 Specific Configuration
#
#
# Core B Support
#
#
# Core B Support
#
@ -193,14 +216,6 @@ CONFIG_IRQ_DMA2_8=9
CONFIG_IRQ_DMA2_9=9
CONFIG_IRQ_DMA2_10=9
CONFIG_IRQ_DMA2_11=9
CONFIG_IRQ_TIMER0=10
CONFIG_IRQ_TIMER1=10
CONFIG_IRQ_TIMER2=10
CONFIG_IRQ_TIMER3=10
CONFIG_IRQ_TIMER4=10
CONFIG_IRQ_TIMER5=10
CONFIG_IRQ_TIMER6=10
CONFIG_IRQ_TIMER7=10
CONFIG_IRQ_TIMER8=10
CONFIG_IRQ_TIMER9=10
CONFIG_IRQ_TIMER10=10
@ -230,7 +245,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=30000000
# CONFIG_BFIN_KERNEL_CLOCK is not set
CONFIG_MAX_MEM_SIZE=512
CONFIG_MAX_VCO_HZ=600000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@ -244,6 +258,7 @@ CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
@ -281,6 +296,12 @@ CONFIG_SYS_BFIN_SPINLOCK_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
CONFIG_APP_STACK_L1=y
#
# Speed Optimizations
#
CONFIG_BFIN_INS_LOWOVERHEAD=y
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
@ -289,14 +310,13 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -311,7 +331,7 @@ CONFIG_BFIN_DCACHE=y
# CONFIG_BFIN_ICACHE_LOCK is not set
# CONFIG_BFIN_WB is not set
CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
# CONFIG_BFIN_L2_CACHEABLE is not set
# CONFIG_MPU is not set
#
@ -344,7 +364,6 @@ CONFIG_BANK_3=0xAAC2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
@ -355,23 +374,20 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_BINFMT_SHARED_FLAT is not set
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_SUSPEND_UP_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM_WAKEUP_BY_GPIO is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Networking
#
CONFIG_NET=y
#
@ -384,6 +400,7 @@ CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@ -413,8 +430,6 @@ CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
@ -423,6 +438,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
@ -439,6 +455,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
CONFIG_IRDA=m
#
@ -470,25 +487,15 @@ CONFIG_IRTTY_SIR=m
#
# CONFIG_DONGLE is not set
#
# Old SIR device drivers
#
# CONFIG_IRPORT_SIR is not set
#
# Old Serial dongle support
#
#
# FIR device drivers
#
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_PHONET is not set
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
@ -506,6 +513,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@ -514,6 +523,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@ -595,11 +605,14 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@ -612,7 +625,6 @@ CONFIG_MISC_DEVICES=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@ -625,11 +637,14 @@ CONFIG_MII=y
CONFIG_SMC91X=y
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NETDEV_1000=y
# CONFIG_AX88180 is not set
CONFIG_NETDEV_10000=y
@ -639,10 +654,10 @@ CONFIG_NETDEV_10000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
@ -690,8 +705,11 @@ CONFIG_INPUT_EVDEV=m
# CONFIG_BF5xx_PPI is not set
# CONFIG_BFIN_SPORT is not set
# CONFIG_BFIN_TIMER_LATENCY is not set
CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -720,22 +738,19 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_CAN4LINUX is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
@ -744,14 +759,18 @@ CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM70 is not set
# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
@ -760,6 +779,8 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -769,22 +790,29 @@ CONFIG_WATCHDOG=y
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_WM8400 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
@ -799,43 +827,43 @@ CONFIG_SSB_POSSIBLE=y
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=m
# CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_HID_PID is not set
#
# Userspace I/O
# Special HID drivers
#
CONFIG_HID_COMPAT=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@ -875,11 +903,11 @@ CONFIG_SYSFS=y
# CONFIG_EFS_FS is not set
CONFIG_YAFFS_FS=m
CONFIG_YAFFS_YAFFS1=y
# CONFIG_YAFFS_9BYTE_TAGS is not set
# CONFIG_YAFFS_DOES_ECC is not set
CONFIG_YAFFS_YAFFS2=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
@ -896,8 +924,11 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
@ -905,13 +936,12 @@ CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
# CONFIG_SUNRPC_BIND34 is not set
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
@ -967,9 +997,6 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
CONFIG_INSTRUMENTATION=y
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
#
# Kernel hacking
@ -977,14 +1004,53 @@ CONFIG_INSTRUMENTATION=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_FRAME_POINTER is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_HWERR is not set
# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@ -994,7 +1060,6 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_DUAL_CORE_TEST_MODULE is not set
CONFIG_CPLB_INFO=y
CONFIG_ACCESS_CHECK=y
@ -1003,9 +1068,94 @@ CONFIG_ACCESS_CHECK=y
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
# CONFIG_SECURITY_CAPABILITIES is not set
# CONFIG_CRYPTO is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
# CONFIG_CRYPTO_MANAGER is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_LZO is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
@ -1013,6 +1163,7 @@ CONFIG_SECURITY=y
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set

3
arch/blackfin/configs/BlackStamp_defconfig
View File

@ -53,7 +53,7 @@ CONFIG_KALLSYMS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
@ -276,7 +276,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
CONFIG_BFIN_GPTIMERS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y

24
arch/blackfin/configs/CM-BF527_defconfig
View File

@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
@ -56,7 +56,7 @@ CONFIG_KALLSYMS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -190,14 +190,14 @@ CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_PORTH_INTA=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_PORTH_INTB=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTA=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
@ -292,7 +292,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
CONFIG_BFIN_GPTIMERS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -650,6 +649,7 @@ CONFIG_BFIN_OTP=y
# CONFIG_TWI_LCD is not set
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -699,7 +699,7 @@ CONFIG_I2C_CHARDEV=m
# I2C Hardware Bus support
#
CONFIG_I2C_BLACKFIN_TWI=m
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set

6
arch/blackfin/configs/CM-BF533_defconfig
View File

@ -42,7 +42,7 @@ CONFIG_SYSVIPC_SYSCTL=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -254,7 +254,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set
@ -598,6 +597,7 @@ CONFIG_NETDEV_10000=y
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#

22
arch/blackfin/configs/CM-BF537E_defconfig
View File

@ -42,7 +42,7 @@ CONFIG_SYSVIPC_SYSCTL=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -157,14 +157,14 @@ CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
@ -262,7 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set
@ -627,6 +626,7 @@ CONFIG_NETDEV_10000=y
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#

22
arch/blackfin/configs/CM-BF537U_defconfig
View File

@ -42,7 +42,7 @@ CONFIG_SYSVIPC_SYSCTL=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -157,14 +157,14 @@ CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
@ -262,7 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set
@ -607,6 +606,7 @@ CONFIG_NETDEV_10000=y
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#

10
arch/blackfin/configs/CM-BF548_defconfig
View File

@ -41,7 +41,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -325,7 +325,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set
@ -544,7 +543,7 @@ CONFIG_MTD_RAM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0x20000000
CONFIG_MTD_PHYSMAP_LEN=0x800000
CONFIG_MTD_PHYSMAP_LEN=0
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_UCLINUX is not set
# CONFIG_MTD_PLATRAM is not set
@ -732,6 +731,7 @@ CONFIG_BFIN_OTP=y
# CONFIG_TWI_LCD is not set
# CONFIG_SIMPLE_GPIO is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -782,7 +782,7 @@ CONFIG_I2C_CHARDEV=y
# I2C Hardware Bus support
#
CONFIG_I2C_BLACKFIN_TWI=y
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set

6
arch/blackfin/configs/CM-BF561_defconfig
View File

@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -300,7 +300,6 @@ CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
CONFIG_LARGE_ALLOCS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set
@ -612,6 +611,7 @@ CONFIG_NETDEV_10000=y
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_SIMPLE_GPIO is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#

3
arch/blackfin/configs/H8606_defconfig
View File

@ -54,7 +54,7 @@ CONFIG_KALLSYMS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -250,7 +250,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_GPTIMERS=y
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set

3
arch/blackfin/configs/IP0X_defconfig
View File

@ -55,7 +55,7 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -262,7 +262,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
# CONFIG_DMA_UNCACHED_NONE is not set

606
arch/blackfin/configs/PNAV-10_defconfig
View File

File diff suppressed because it is too large Load Diff

21
arch/blackfin/configs/SRV1_defconfig
View File

@ -59,7 +59,7 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@ -172,14 +172,14 @@ CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
@ -271,7 +271,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_LARGE_ALLOCS=y
CONFIG_BFIN_DMA_5XX=y
CONFIG_DMA_UNCACHED_2M=y
# CONFIG_DMA_UNCACHED_1M is not set
# CONFIG_DMA_UNCACHED_NONE is not set
@ -786,7 +785,7 @@ CONFIG_I2C_CHARDEV=y
#
# CONFIG_I2C_BLACKFIN_GPIO is not set
CONFIG_I2C_BLACKFIN_TWI=y
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set

165
arch/blackfin/configs/TCM-BF537_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24.7
# Thu Jul 31 00:53:15 2008
# Linux kernel version: 2.6.28-rc2
# Tue Jan 6 09:22:17 2009
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@ -9,7 +9,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@ -30,17 +29,14 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_GROUP_SCHED is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
@ -52,22 +48,30 @@ CONFIG_KALLSYMS=y
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_ELF_CORE is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@ -78,6 +82,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@ -91,9 +96,11 @@ CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_CFQ is not set
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_IOSCHED="noop"
CONFIG_CLASSIC_RCU=y
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_FREEZER is not set
#
# Blackfin Processor Options
@ -102,6 +109,10 @@ CONFIG_PREEMPT_NONE=y
#
# Processor and Board Settings
#
# CONFIG_BF512 is not set
# CONFIG_BF514 is not set
# CONFIG_BF516 is not set
# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@ -114,18 +125,23 @@ CONFIG_PREEMPT_NONE=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
CONFIG_BF537=y
# CONFIG_BF538 is not set
# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
# CONFIG_BF544 is not set
# CONFIG_BF547 is not set
# CONFIG_BF548 is not set
# CONFIG_BF549 is not set
# CONFIG_BF561 is not set
CONFIG_BF_REV_MIN=2
CONFIG_BF_REV_MAX=3
# CONFIG_BF_REV_0_0 is not set
# CONFIG_BF_REV_0_1 is not set
CONFIG_BF_REV_0_2=y
# CONFIG_BF_REV_0_3 is not set
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF53x=y
@ -137,25 +153,25 @@ CONFIG_IRQ_SPORT0_TX=9
CONFIG_IRQ_SPORT1_RX=9
CONFIG_IRQ_SPORT1_TX=9
CONFIG_IRQ_TWI=10
CONFIG_IRQ_SPI=10
CONFIG_IRQ_UART0_RX=10
CONFIG_IRQ_UART0_TX=10
CONFIG_IRQ_UART1_RX=10
CONFIG_IRQ_UART1_TX=10
CONFIG_IRQ_MAC_RX=11
CONFIG_IRQ_MAC_TX=11
CONFIG_IRQ_TMR0=12
CONFIG_IRQ_TMR1=12
CONFIG_IRQ_TMR2=12
CONFIG_IRQ_TMR3=12
CONFIG_IRQ_TMR4=12
CONFIG_IRQ_TMR5=12
CONFIG_IRQ_TMR6=12
CONFIG_IRQ_TMR7=12
CONFIG_IRQ_TIMER0=12
CONFIG_IRQ_TIMER1=12
CONFIG_IRQ_TIMER2=12
CONFIG_IRQ_TIMER3=12
CONFIG_IRQ_TIMER4=12
CONFIG_IRQ_TIMER5=12
CONFIG_IRQ_TIMER6=12
CONFIG_IRQ_TIMER7=12
CONFIG_IRQ_PORTG_INTB=12
CONFIG_IRQ_MEM_DMA0=13
CONFIG_IRQ_MEM_DMA1=13
CONFIG_IRQ_WATCH=13
CONFIG_IRQ_SPI=10
# CONFIG_BFIN537_STAMP is not set
# CONFIG_BFIN537_BLUETECHNIX_CM is not set
CONFIG_BFIN537_BLUETECHNIX_TCM=y
@ -191,7 +207,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=25000000
# CONFIG_BFIN_KERNEL_CLOCK is not set
CONFIG_MAX_MEM_SIZE=32
CONFIG_MAX_VCO_HZ=600000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@ -205,10 +220,10 @@ CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_SCHED_HRTICK is not set
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@ -242,6 +257,12 @@ CONFIG_IP_CHECKSUM_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
CONFIG_SYSCALL_TAB_L1=y
CONFIG_CPLB_SWITCH_TAB_L1=y
CONFIG_APP_STACK_L1=y
#
# Speed Optimizations
#
CONFIG_BFIN_INS_LOWOVERHEAD=y
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
@ -250,14 +271,13 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
# CONFIG_BFIN_GPTIMERS is not set
CONFIG_BFIN_DMA_5XX=y
# CONFIG_DMA_UNCACHED_4M is not set
# CONFIG_DMA_UNCACHED_2M is not set
CONFIG_DMA_UNCACHED_1M=y
@ -300,7 +320,6 @@ CONFIG_BANK_3=0xFFC2
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
#
@ -310,23 +329,20 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
CONFIG_BINFMT_SHARED_FLAT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_SUSPEND_UP_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM_WAKEUP_BY_GPIO is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Networking
#
# CONFIG_NET is not set
#
@ -345,6 +361,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@ -362,8 +379,10 @@ CONFIG_MTD_BLOCK=y
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
@ -374,6 +393,10 @@ CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
@ -381,8 +404,9 @@ CONFIG_MTD_RAM=y
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_GPIO_ADDR is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_GPIO_ADDR=y
CONFIG_MTD_UCLINUX=y
# CONFIG_MTD_PLATRAM is not set
@ -416,10 +440,13 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@ -454,8 +481,11 @@ CONFIG_MISC_DEVICES=y
# CONFIG_BF5xx_PPI is not set
CONFIG_BFIN_SPORT=y
# CONFIG_BFIN_TIMER_LATENCY is not set
CONFIG_BFIN_DMA_INTERFACE=m
# CONFIG_SIMPLE_GPIO is not set
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@ -486,15 +516,10 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_CAN4LINUX is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
@ -502,6 +527,7 @@ CONFIG_SPI_MASTER=y
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
@ -510,9 +536,13 @@ CONFIG_SPI_BFIN=y
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -522,21 +552,28 @@ CONFIG_WATCHDOG=y
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_BFIN_WDT=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_WM8400 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
@ -551,20 +588,16 @@ CONFIG_SSB_POSSIBLE=y
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_RTC_CLASS is not set
#
# Userspace I/O
#
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
@ -574,19 +607,17 @@ CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@ -628,8 +659,11 @@ CONFIG_SYSFS=y
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
@ -639,7 +673,6 @@ CONFIG_SYSFS=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_NLS is not set
# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
@ -647,14 +680,22 @@ CONFIG_MSDOS_PARTITION=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@ -671,9 +712,8 @@ CONFIG_ACCESS_CHECK=y
# Security options
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_CAPABILITIES=y
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_CRYPTO is not set
@ -682,6 +722,7 @@ CONFIG_SECURITY_CAPABILITIES=y
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
# CONFIG_CRC32 is not set
# CONFIG_CRC7 is not set

207
arch/blackfin/include/asm/atomic.h
View File

@ -15,65 +15,172 @@
*/
#define ATOMIC_INIT(i) { (i) }
#define atomic_read(v) ((v)->counter)
#define atomic_set(v, i) (((v)->counter) = i)
static __inline__ void atomic_add(int i, atomic_t * v)
#ifdef CONFIG_SMP
#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
asmlinkage int __raw_atomic_update_asm(volatile int *ptr, int value);
asmlinkage int __raw_atomic_clear_asm(volatile int *ptr, int value);
asmlinkage int __raw_atomic_set_asm(volatile int *ptr, int value);
asmlinkage int __raw_atomic_xor_asm(volatile int *ptr, int value);
asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
static inline void atomic_add(int i, atomic_t *v)
{
__raw_atomic_update_asm(&v->counter, i);
}
static inline void atomic_sub(int i, atomic_t *v)
{
__raw_atomic_update_asm(&v->counter, -i);
}
static inline int atomic_add_return(int i, atomic_t *v)
{
return __raw_atomic_update_asm(&v->counter, i);
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
return __raw_atomic_update_asm(&v->counter, -i);
}
static inline void atomic_inc(volatile atomic_t *v)
{
__raw_atomic_update_asm(&v->counter, 1);
}
static inline void atomic_dec(volatile atomic_t *v)
{
__raw_atomic_update_asm(&v->counter, -1);
}
static inline void atomic_clear_mask(int mask, atomic_t *v)
{
__raw_atomic_clear_asm(&v->counter, mask);
}
static inline void atomic_set_mask(int mask, atomic_t *v)
{
__raw_atomic_set_asm(&v->counter, mask);
}
static inline int atomic_test_mask(int mask, atomic_t *v)
{
return __raw_atomic_test_asm(&v->counter, mask);
}
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#else /* !CONFIG_SMP */
#define atomic_read(v) ((v)->counter)
static inline void atomic_add(int i, atomic_t *v)
{
long flags;
local_irq_save(flags);
local_irq_save_hw(flags);
v->counter += i;
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
static __inline__ void atomic_sub(int i, atomic_t * v)
static inline void atomic_sub(int i, atomic_t *v)
{
long flags;
local_irq_save(flags);
local_irq_save_hw(flags);
v->counter -= i;
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
static inline int atomic_add_return(int i, atomic_t * v)
static inline int atomic_add_return(int i, atomic_t *v)
{
int __temp = 0;
long flags;
local_irq_save(flags);
local_irq_save_hw(flags);
v->counter += i;
__temp = v->counter;
local_irq_restore(flags);
local_irq_restore_hw(flags);
return __temp;
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
int __temp = 0;
long flags;
local_irq_save_hw(flags);
v->counter -= i;
__temp = v->counter;
local_irq_restore_hw(flags);
return __temp;
}
static inline void atomic_inc(volatile atomic_t *v)
{
long flags;
local_irq_save_hw(flags);
v->counter++;
local_irq_restore_hw(flags);
}
static inline void atomic_dec(volatile atomic_t *v)
{
long flags;
local_irq_save_hw(flags);
v->counter--;
local_irq_restore_hw(flags);
}
static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
{
long flags;
local_irq_save_hw(flags);
v->counter &= ~mask;
local_irq_restore_hw(flags);
}
static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
{
long flags;
local_irq_save_hw(flags);
v->counter |= mask;
local_irq_restore_hw(flags);
}
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#endif /* !CONFIG_SMP */
#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
static inline int atomic_sub_return(int i, atomic_t * v)
{
int __temp = 0;
long flags;
local_irq_save(flags);
v->counter -= i;
__temp = v->counter;
local_irq_restore(flags);
return __temp;
}
static __inline__ void atomic_inc(volatile atomic_t * v)
{
long flags;
local_irq_save(flags);
v->counter++;
local_irq_restore(flags);
}
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
@ -88,42 +195,6 @@ static __inline__ void atomic_inc(volatile atomic_t * v)
})
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
static __inline__ void atomic_dec(volatile atomic_t * v)
{
long flags;
local_irq_save(flags);
v->counter--;
local_irq_restore(flags);
}
static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t * v)
{
long flags;
local_irq_save(flags);
v->counter &= ~mask;
local_irq_restore(flags);
}
static __inline__ void atomic_set_mask(unsigned int mask, atomic_t * v)
{
long flags;
local_irq_save(flags);
v->counter |= mask;
local_irq_restore(flags);
}
/* Atomic operations are already serializing */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
/*
* atomic_inc_and_test - increment and test
* @v: pointer of type atomic_t

7
arch/blackfin/include/asm/bfin-global.h
View File

@ -47,6 +47,9 @@
# define DMA_UNCACHED_REGION (0)
#endif
extern void bfin_setup_caches(unsigned int cpu);
extern void bfin_setup_cpudata(unsigned int cpu);
extern unsigned long get_cclk(void);
extern unsigned long get_sclk(void);
extern unsigned long sclk_to_usecs(unsigned long sclk);
@ -58,8 +61,6 @@ extern void dump_bfin_trace_buffer(void);
/* init functions only */
extern int init_arch_irq(void);
extern void bfin_icache_init(void);
extern void bfin_dcache_init(void);
extern void init_exception_vectors(void);
extern void program_IAR(void);
@ -110,7 +111,7 @@ extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
#ifdef CONFIG_BFIN_ICACHE_LOCK
extern void cache_grab_lock(int way);
extern void cache_lock(int way);
extern void bfin_cache_lock(int way);
#endif
#endif

28
arch/blackfin/include/asm/bfin5xx_spi.h
View File

@ -1,22 +1,12 @@
/************************************************************
* Copyright (C) 2006-2008, Analog Devices. All Rights Reserved
*
* FILE bfin5xx_spi.h
* PROGRAMMER(S): Luke Yang (Analog Devices Inc.)
*
*
* DATE OF CREATION: March. 10th 2006
*
* SYNOPSIS:
*
* DESCRIPTION: header file for SPI controller driver for Blackfin5xx.
**************************************************************
* MODIFICATION HISTORY:
* March 10, 2006 bfin5xx_spi.h Created. (Luke Yang)
************************************************************/
/*
* Blackfin On-Chip SPI Driver
*
* Copyright 2004-2008 Analog Devices Inc.
*
* Enter bugs at http://blackfin.uclinux.org/
*
* Licensed under the GPL-2 or later.
*/
#ifndef _SPI_CHANNEL_H_
#define _SPI_CHANNEL_H_

19
arch/blackfin/include/asm/bfin_sdh.h Normal file
View File

@ -0,0 +1,19 @@
/*
* bfin_sdh.h - Blackfin SDH definitions
*
* Copyright 2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef __BFIN_SDH_H__
#define __BFIN_SDH_H__
struct bfin_sd_host {
int dma_chan;
int irq_int0;
int irq_int1;
u16 pin_req[7];
};
#endif

3
arch/blackfin/include/asm/bfin_sport.h
View File

@ -120,9 +120,6 @@ struct sport_register {
#define SPORT_IOC_MAGIC 'P'
#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
/* Test purpose */
#define ENABLE_AD73311 _IOWR('P', 0x02, int)
struct sport_dev {
struct cdev cdev; /* Char device structure */

5
arch/blackfin/include/asm/bfrom.h
View File

@ -43,6 +43,11 @@ __attribute__((__noreturn__))
static inline void bfrom_SoftReset(void *new_stack)
{
while (1)
/*
* We don't declare the SP as clobbered on purpose, since
* it confuses the heck out of the compiler, and this function
* never returns
*/
__asm__ __volatile__(
"sp = %[stack];"
"jump (%[bfrom_syscontrol]);"

271
arch/blackfin/include/asm/bitops.h
View File

@ -7,7 +7,6 @@
#include <linux/compiler.h>
#include <asm/byteorder.h> /* swab32 */
#include <asm/system.h> /* save_flags */
#ifdef __KERNEL__
@ -20,96 +19,192 @@
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/ffz.h>
static __inline__ void set_bit(int nr, volatile unsigned long *addr)
#ifdef CONFIG_SMP
#include <linux/linkage.h>
asmlinkage int __raw_bit_set_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_clear_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_toggle_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_test_set_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_test_clear_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_test_toggle_asm(volatile unsigned long *addr, int nr);
asmlinkage int __raw_bit_test_asm(const volatile unsigned long *addr, int nr);
static inline void set_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
__raw_bit_set_asm(a, nr & 0x1f);
}
static inline void clear_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
__raw_bit_clear_asm(a, nr & 0x1f);
}
static inline void change_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
__raw_bit_toggle_asm(a, nr & 0x1f);
}
static inline int test_bit(int nr, const volatile unsigned long *addr)
{
volatile const unsigned long *a = addr + (nr >> 5);
return __raw_bit_test_asm(a, nr & 0x1f) != 0;
}
static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
return __raw_bit_test_set_asm(a, nr & 0x1f);
}
static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
return __raw_bit_test_clear_asm(a, nr & 0x1f);
}
static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
{
volatile unsigned long *a = addr + (nr >> 5);
return __raw_bit_test_toggle_asm(a, nr & 0x1f);
}
#else /* !CONFIG_SMP */
#include <asm/system.h> /* save_flags */
static inline void set_bit(int nr, volatile unsigned long *addr)
{
int *a = (int *)addr;
int mask;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
local_irq_save_hw(flags);
*a |= mask;
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
static inline void clear_bit(int nr, volatile unsigned long *addr)
{
int *a = (int *)addr;
int mask;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save_hw(flags);
*a &= ~mask;
local_irq_restore_hw(flags);
}
static inline void change_bit(int nr, volatile unsigned long *addr)
{
int mask, flags;
unsigned long *ADDR = (unsigned long *)addr;
ADDR += nr >> 5;
mask = 1 << (nr & 31);
local_irq_save_hw(flags);
*ADDR ^= mask;
local_irq_restore_hw(flags);
}
static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save_hw(flags);
retval = (mask & *a) != 0;
*a |= mask;
local_irq_restore_hw(flags);
return retval;
}
static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save_hw(flags);
retval = (mask & *a) != 0;
*a &= ~mask;
local_irq_restore_hw(flags);
return retval;
}
static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save_hw(flags);
retval = (mask & *a) != 0;
*a ^= mask;
local_irq_restore_hw(flags);
return retval;
}
#endif /* CONFIG_SMP */
/*
* clear_bit() doesn't provide any barrier for the compiler.
*/
#define smp_mb__before_clear_bit() barrier()
#define smp_mb__after_clear_bit() barrier()
static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
{
int *a = (int *)addr;
int mask;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
*a &= ~mask;
local_irq_restore(flags);
}
static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
static inline void __set_bit(int nr, volatile unsigned long *addr)
{
int *a = (int *)addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
*a &= ~mask;
}
static __inline__ void change_bit(int nr, volatile unsigned long *addr)
{
int mask, flags;
unsigned long *ADDR = (unsigned long *)addr;
ADDR += nr >> 5;
mask = 1 << (nr & 31);
local_irq_save(flags);
*ADDR ^= mask;
local_irq_restore(flags);
}
static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
{
int mask;
unsigned long *ADDR = (unsigned long *)addr;
ADDR += nr >> 5;
mask = 1 << (nr & 31);
*ADDR ^= mask;
}
static __inline__ int test_and_set_bit(int nr, void *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
retval = (mask & *a) != 0;
*a |= mask;
local_irq_restore(flags);
return retval;
}
static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
static inline void __clear_bit(int nr, volatile unsigned long *addr)
{
int *a = (int *)addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
*a &= ~mask;
}
static inline void __change_bit(int nr, volatile unsigned long *addr)
{
int mask;
unsigned long *ADDR = (unsigned long *)addr;
ADDR += nr >> 5;
mask = 1 << (nr & 31);
*ADDR ^= mask;
}
static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
@ -121,23 +216,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
return retval;
}
static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
retval = (mask & *a) != 0;
*a &= ~mask;
local_irq_restore(flags);
return retval;
}
static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
@ -149,22 +228,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
return retval;
}
static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
{
int mask, retval;
volatile unsigned int *a = (volatile unsigned int *)addr;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
retval = (mask & *a) != 0;
*a ^= mask;
local_irq_restore(flags);
return retval;
}
static __inline__ int __test_and_change_bit(int nr,
static inline int __test_and_change_bit(int nr,
volatile unsigned long *addr)
{
int mask, retval;
@ -177,16 +241,7 @@ static __inline__ int __test_and_change_bit(int nr,
return retval;
}
/*
* This routine doesn't need to be atomic.
*/
static __inline__ int __constant_test_bit(int nr, const void *addr)
{
return ((1UL << (nr & 31)) &
(((const volatile unsigned int *)addr)[nr >> 5])) != 0;
}
static __inline__ int __test_bit(int nr, const void *addr)
static inline int __test_bit(int nr, const void *addr)
{
int *a = (int *)addr;
int mask;
@ -196,10 +251,16 @@ static __inline__ int __test_bit(int nr, const void *addr)
return ((mask & *a) != 0);
}
#define test_bit(nr,addr) \
(__builtin_constant_p(nr) ? \
__constant_test_bit((nr),(addr)) : \
__test_bit((nr),(addr)))
#ifndef CONFIG_SMP
/*
* This routine doesn't need irq save and restore ops in UP
* context.
*/
static inline int test_bit(int nr, const void *addr)
{
return __test_bit(nr, addr);
}
#endif
#include <asm-generic/bitops/find.h>
#include <asm-generic/bitops/hweight.h>

10
arch/blackfin/include/asm/blackfin.h
View File

@ -6,11 +6,6 @@
#ifndef _BLACKFIN_H_
#define _BLACKFIN_H_
#define LO(con32) ((con32) & 0xFFFF)
#define lo(con32) ((con32) & 0xFFFF)
#define HI(con32) (((con32) >> 16) & 0xFFFF)
#define hi(con32) (((con32) >> 16) & 0xFFFF)
#include <mach/anomaly.h>
#ifndef __ASSEMBLY__
@ -65,6 +60,11 @@ static inline void CSYNC(void)
#else /* __ASSEMBLY__ */
#define LO(con32) ((con32) & 0xFFFF)
#define lo(con32) ((con32) & 0xFFFF)
#define HI(con32) (((con32) >> 16) & 0xFFFF)
#define hi(con32) (((con32) >> 16) & 0xFFFF)
/* SSYNC & CSYNC implementations for assembly files */
#define ssync(x) SSYNC(x)

29
arch/blackfin/include/asm/cache.h
View File

@ -12,6 +12,11 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define SMP_CACHE_BYTES L1_CACHE_BYTES
#ifdef CONFIG_SMP
#define __cacheline_aligned
#else
#define ____cacheline_aligned
/*
* Put cacheline_aliged data to L1 data memory
*/
@ -21,9 +26,33 @@
__section__(".data_l1.cacheline_aligned")))
#endif
#endif
/*
* largest L1 which this arch supports
*/
#define L1_CACHE_SHIFT_MAX 5
#if defined(CONFIG_SMP) && \
!defined(CONFIG_BFIN_CACHE_COHERENT) && \
defined(CONFIG_BFIN_DCACHE)
#define __ARCH_SYNC_CORE_DCACHE
#ifndef __ASSEMBLY__
asmlinkage void __raw_smp_mark_barrier_asm(void);
asmlinkage void __raw_smp_check_barrier_asm(void);
static inline void smp_mark_barrier(void)
{
__raw_smp_mark_barrier_asm();
}
static inline void smp_check_barrier(void)
{
__raw_smp_check_barrier_asm();
}
void resync_core_dcache(void);
#endif
#endif
#endif

20
arch/blackfin/include/asm/cacheflush.h
View File

@ -35,6 +35,7 @@ extern void blackfin_icache_flush_range(unsigned long start_address, unsigned lo
extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
extern void blackfin_dflush_page(void *page);
extern void blackfin_invalidate_entire_dcache(void);
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
@ -44,12 +45,20 @@ extern void blackfin_dflush_page(void *page);
#define flush_cache_vmap(start, end) do { } while (0)
#define flush_cache_vunmap(start, end) do { } while (0)
#ifdef CONFIG_SMP
#define flush_icache_range_others(start, end) \
smp_icache_flush_range_others((start), (end))
#else
#define flush_icache_range_others(start, end) do { } while (0)
#endif
static inline void flush_icache_range(unsigned start, unsigned end)
{
#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE)
# if defined(CONFIG_BFIN_WT)
blackfin_icache_flush_range((start), (end));
flush_icache_range_others(start, end);
# else
blackfin_icache_dcache_flush_range((start), (end));
# endif
@ -58,6 +67,7 @@ static inline void flush_icache_range(unsigned start, unsigned end)
# if defined(CONFIG_BFIN_ICACHE)
blackfin_icache_flush_range((start), (end));
flush_icache_range_others(start, end);
# endif
# if defined(CONFIG_BFIN_DCACHE)
blackfin_dcache_flush_range((start), (end));
@ -66,10 +76,12 @@ static inline void flush_icache_range(unsigned start, unsigned end)
#endif
}
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { memcpy(dst, src, len); \
flush_icache_range ((unsigned) (dst), (unsigned) (dst) + (len)); \
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { memcpy(dst, src, len); \
flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
#if defined(CONFIG_BFIN_DCACHE)
@ -82,7 +94,7 @@ do { memcpy(dst, src, len); \
# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
#else
# define flush_dcache_range(start,end) do { } while (0)
# define flush_dcache_page(page) do { } while (0)
# define flush_dcache_page(page) do { } while (0)
#endif
extern unsigned long reserved_mem_dcache_on;

3
arch/blackfin/include/asm/checksum.h
View File

@ -78,7 +78,8 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
"%0 = %0 + %4;\n\t"
"NOP;\n\t"
: "=d" (sum)
: "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum));
: "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum)
: "CC");
return (sum);
}

47
arch/blackfin/include/asm/context.S
View File

@ -303,9 +303,14 @@
RETI = [sp++];
RETS = [sp++];
p0.h = _irq_flags;
p0.l = _irq_flags;
#ifdef CONFIG_SMP
GET_PDA(p0, r0);
r0 = [p0 + PDA_IRQFLAGS];
#else
p0.h = _bfin_irq_flags;
p0.l = _bfin_irq_flags;
r0 = [p0];
#endif
sti r0;
sp += 4; /* Skip Reserved */
@ -353,3 +358,41 @@
csync;
.endm
.macro save_context_cplb
[--sp] = (R7:0, P5:0);
[--sp] = fp;
[--sp] = a0.x;
[--sp] = a0.w;
[--sp] = a1.x;
[--sp] = a1.w;
[--sp] = LC0;
[--sp] = LC1;
[--sp] = LT0;
[--sp] = LT1;
[--sp] = LB0;
[--sp] = LB1;
[--sp] = RETS;
.endm
.macro restore_context_cplb
RETS = [sp++];
LB1 = [sp++];
LB0 = [sp++];
LT1 = [sp++];
LT0 = [sp++];
LC1 = [sp++];
LC0 = [sp++];
a1.w = [sp++];
a1.x = [sp++];
a0.w = [sp++];
a0.x = [sp++];
fp = [sp++];
(R7:0, P5:0) = [SP++];
.endm

61
arch/blackfin/include/asm/cplb-mpu.h
View File

@ -1,61 +0,0 @@
/*
* File: include/asm-blackfin/cplbinit.h
* Based on:
* Author:
*
* Created:
* Description:
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __ASM_BFIN_CPLB_MPU_H
#define __ASM_BFIN_CPLB_MPU_H
struct cplb_entry {
unsigned long data, addr;
};
struct mem_region {
unsigned long start, end;
unsigned long dcplb_data;
unsigned long icplb_data;
};
extern struct cplb_entry dcplb_tbl[MAX_CPLBS];
extern struct cplb_entry icplb_tbl[MAX_CPLBS];
extern int first_switched_icplb;
extern int first_mask_dcplb;
extern int first_switched_dcplb;
extern int nr_dcplb_miss, nr_icplb_miss, nr_icplb_supv_miss, nr_dcplb_prot;
extern int nr_cplb_flush;
extern int page_mask_order;
extern int page_mask_nelts;
extern unsigned long *current_rwx_mask;
extern void flush_switched_cplbs(void);
extern void set_mask_dcplbs(unsigned long *);
extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);
#endif /* __ASM_BFIN_CPLB_MPU_H */

25
arch/blackfin/include/asm/cplb.h
View File

@ -30,7 +30,6 @@
#ifndef _CPLB_H
#define _CPLB_H
#include <asm/blackfin.h>
#include <mach/anomaly.h>
#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
@ -55,13 +54,24 @@
#endif
#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
#ifdef CONFIG_SMP
#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB)
#define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK)
#define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK)
#else
#ifdef CONFIG_BFIN_L2_CACHEABLE
#define L2_IMEMORY (SDRAM_IGENERIC)
#define L2_DMEMORY (SDRAM_DGENERIC)
#else
#define L2_IMEMORY (CPLB_COMMON)
#define L2_DMEMORY (CPLB_COMMON)
#endif
#endif /* CONFIG_BFIN_L2_CACHEABLE */
#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
#endif /* CONFIG_SMP */
#define SDRAM_DNON_CHBL (CPLB_COMMON)
#define SDRAM_EBIU (CPLB_COMMON)
#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
@ -71,14 +81,7 @@
#define SIZE_1M 0x00100000 /* 1M */
#define SIZE_4M 0x00400000 /* 4M */
#ifdef CONFIG_MPU
#define MAX_CPLBS 16
#else
#define MAX_CPLBS (16 * 2)
#endif
#define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M)
#define CPLB_ENABLE_ICACHE_P 0
#define CPLB_ENABLE_DCACHE_P 1
@ -113,4 +116,8 @@
#define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID
#define CPLB_IDOCACHE CPLB_INOCACHE | CPLB_L1_CHBL
#define FAULT_RW (1 << 16)
#define FAULT_USERSUPV (1 << 17)
#define FAULT_CPLBBITS 0x0000ffff
#endif /* _CPLB_H */

87
arch/blackfin/include/asm/cplbinit.h
View File

@ -32,61 +32,56 @@
#include <asm/blackfin.h>
#include <asm/cplb.h>
#include <linux/threads.h>
#ifdef CONFIG_CPLB_SWITCH_TAB_L1
# define PDT_ATTR __attribute__((l1_data))
#else
# define PDT_ATTR
#endif
struct cplb_entry {
unsigned long data, addr;
};
struct cplb_boundary {
unsigned long eaddr; /* End of this region. */
unsigned long data; /* CPLB data value. */
};
extern struct cplb_boundary dcplb_bounds[];
extern struct cplb_boundary icplb_bounds[];
extern int dcplb_nr_bounds, icplb_nr_bounds;
extern struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];
extern struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];
extern int first_switched_icplb;
extern int first_switched_dcplb;
extern int nr_dcplb_miss[], nr_icplb_miss[], nr_icplb_supv_miss[];
extern int nr_dcplb_prot[], nr_cplb_flush[];
#ifdef CONFIG_MPU
#include <asm/cplb-mpu.h>
extern int first_mask_dcplb;
#else
extern int page_mask_order;
extern int page_mask_nelts;
#define INITIAL_T 0x1
#define SWITCH_T 0x2
#define I_CPLB 0x4
#define D_CPLB 0x8
extern unsigned long *current_rwx_mask[NR_CPUS];
#define IN_KERNEL 1
extern void flush_switched_cplbs(unsigned int);
extern void set_mask_dcplbs(unsigned long *, unsigned int);
enum
{ZERO_P, L1I_MEM, L1D_MEM, SDRAM_KERN , SDRAM_RAM_MTD, SDRAM_DMAZ, RES_MEM, ASYNC_MEM, L2_MEM};
struct cplb_desc {
u32 start; /* start address */
u32 end; /* end address */
u32 psize; /* prefered size if any otherwise 1MB or 4MB*/
u16 attr;/* attributes */
u16 i_conf;/* I-CPLB DATA */
u16 d_conf;/* D-CPLB DATA */
u16 valid;/* valid */
const s8 name[30];/* name */
};
struct cplb_tab {
u_long *tab;
u16 pos;
u16 size;
};
extern u_long icplb_table[];
extern u_long dcplb_table[];
/* Till here we are discussing about the static memory management model.
* However, the operating envoronments commonly define more CPLB
* descriptors to cover the entire addressable memory than will fit into
* the available on-chip 16 CPLB MMRs. When this happens, the below table
* will be used which will hold all the potentially required CPLB descriptors
*
* This is how Page descriptor Table is implemented in uClinux/Blackfin.
*/
extern u_long ipdt_table[];
extern u_long dpdt_table[];
#ifdef CONFIG_CPLB_INFO
extern u_long ipdt_swapcount_table[];
extern u_long dpdt_swapcount_table[];
#endif
extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);
#endif /* CONFIG_MPU */
extern void generate_cplb_tables(void);
extern void bfin_icache_init(struct cplb_entry *icplb_tbl);
extern void bfin_dcache_init(struct cplb_entry *icplb_tbl);
#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
extern void generate_cplb_tables_all(void);
extern void generate_cplb_tables_cpu(unsigned int cpu);
#endif
#endif

41
arch/blackfin/include/asm/cpu.h Normal file
View File

@ -0,0 +1,41 @@
/*
* File: arch/blackfin/include/asm/cpu.h.
* Author: Philippe Gerum <rpm@xenomai.org>
*
* Copyright 2007 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __ASM_BLACKFIN_CPU_H
#define __ASM_BLACKFIN_CPU_H
#include <linux/percpu.h>
struct task_struct;
struct blackfin_cpudata {
struct cpu cpu;
struct task_struct *idle;
unsigned int imemctl;
unsigned int dmemctl;
unsigned long loops_per_jiffy;
unsigned long dcache_invld_count;
};
DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
#endif

212
arch/blackfin/include/asm/dma.h
View File

@ -1,44 +1,17 @@
/*
* File: include/asm-blackfin/simple_bf533_dma.h
* Based on: none - original work
* Author: LG Soft India
* Copyright (C) 2004-2005 Analog Devices Inc.
* Created: Tue Sep 21 2004
* Description: This file contains the major Data structures and constants
* used for DMA Implementation in BF533
* Modified:
* dma.h - Blackfin DMA defines/structures/etc...
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING.
* If not, write to the Free Software Foundation,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
* Copyright 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
#ifndef _BLACKFIN_DMA_H_
#define _BLACKFIN_DMA_H_
#include <asm/io.h>
#include <linux/slab.h>
#include <asm/irq.h>
#include <asm/signal.h>
#include <linux/kernel.h>
#include <mach/dma.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <mach/dma.h>
#include <asm/blackfin.h>
#include <asm/page.h>
#define MAX_DMA_ADDRESS PAGE_OFFSET
@ -79,7 +52,7 @@ enum dma_chan_status {
#define DMA_SYNC_RESTART 1
struct dmasg {
unsigned long next_desc_addr;
void *next_desc_addr;
unsigned long start_addr;
unsigned short cfg;
unsigned short x_count;
@ -89,7 +62,7 @@ struct dmasg {
} __attribute__((packed));
struct dma_register {
unsigned long next_desc_ptr; /* DMA Next Descriptor Pointer register */
void *next_desc_ptr; /* DMA Next Descriptor Pointer register */
unsigned long start_addr; /* DMA Start address register */
unsigned short cfg; /* DMA Configuration register */
@ -109,7 +82,7 @@ struct dma_register {
short y_modify; /* DMA y_modify register */
unsigned short dummy5;
unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
void *curr_desc_ptr; /* DMA Current Descriptor Pointer
register */
unsigned long curr_addr_ptr; /* DMA Current Address Pointer
register */
@ -131,19 +104,15 @@ struct dma_register {
};
typedef irqreturn_t(*dma_interrupt_t) (int irq, void *dev_id);
struct mutex;
struct dma_channel {
struct mutex dmalock;
char *device_id;
const char *device_id;
enum dma_chan_status chan_status;
struct dma_register *regs;
volatile struct dma_register *regs;
struct dmasg *sg; /* large mode descriptor */
unsigned int ctrl_num; /* controller number */
dma_interrupt_t irq_callback;
unsigned int irq;
void *data;
unsigned int dma_enable_flag;
unsigned int loopback_flag;
#ifdef CONFIG_PM
unsigned short saved_peripheral_map;
#endif
@ -157,49 +126,132 @@ void blackfin_dma_resume(void);
/*******************************************************************************
* DMA API's
*******************************************************************************/
/* functions to set register mode */
void set_dma_start_addr(unsigned int channel, unsigned long addr);
void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
void set_dma_x_count(unsigned int channel, unsigned short x_count);
void set_dma_x_modify(unsigned int channel, short x_modify);
void set_dma_y_count(unsigned int channel, unsigned short y_count);
void set_dma_y_modify(unsigned int channel, short y_modify);
void set_dma_config(unsigned int channel, unsigned short config);
unsigned short set_bfin_dma_config(char direction, char flow_mode,
char intr_mode, char dma_mode, char width,
char syncmode);
void set_dma_curr_addr(unsigned int channel, unsigned long addr);
extern struct dma_channel dma_ch[MAX_DMA_CHANNELS];
extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
extern int channel2irq(unsigned int channel);
/* get curr status for polling */
unsigned short get_dma_curr_irqstat(unsigned int channel);
unsigned short get_dma_curr_xcount(unsigned int channel);
unsigned short get_dma_curr_ycount(unsigned int channel);
unsigned long get_dma_next_desc_ptr(unsigned int channel);
unsigned long get_dma_curr_desc_ptr(unsigned int channel);
unsigned long get_dma_curr_addr(unsigned int channel);
static inline void set_dma_start_addr(unsigned int channel, unsigned long addr)
{
dma_ch[channel].regs->start_addr = addr;
}
static inline void set_dma_next_desc_addr(unsigned int channel, void *addr)
{
dma_ch[channel].regs->next_desc_ptr = addr;
}
static inline void set_dma_curr_desc_addr(unsigned int channel, void *addr)
{
dma_ch[channel].regs->curr_desc_ptr = addr;
}
static inline void set_dma_x_count(unsigned int channel, unsigned short x_count)
{
dma_ch[channel].regs->x_count = x_count;
}
static inline void set_dma_y_count(unsigned int channel, unsigned short y_count)
{
dma_ch[channel].regs->y_count = y_count;
}
static inline void set_dma_x_modify(unsigned int channel, short x_modify)
{
dma_ch[channel].regs->x_modify = x_modify;
}
static inline void set_dma_y_modify(unsigned int channel, short y_modify)
{
dma_ch[channel].regs->y_modify = y_modify;
}
static inline void set_dma_config(unsigned int channel, unsigned short config)
{
dma_ch[channel].regs->cfg = config;
}
static inline void set_dma_curr_addr(unsigned int channel, unsigned long addr)
{
dma_ch[channel].regs->curr_addr_ptr = addr;
}
/* set large DMA mode descriptor */
void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);
static inline unsigned short
set_bfin_dma_config(char direction, char flow_mode,
char intr_mode, char dma_mode, char width, char syncmode)
{
return (direction << 1) | (width << 2) | (dma_mode << 4) |
(intr_mode << 6) | (flow_mode << 12) | (syncmode << 5);
}
/* check if current channel is in use */
int dma_channel_active(unsigned int channel);
static inline unsigned short get_dma_curr_irqstat(unsigned int channel)
{
return dma_ch[channel].regs->irq_status;
}
static inline unsigned short get_dma_curr_xcount(unsigned int channel)
{
return dma_ch[channel].regs->curr_x_count;
}
static inline unsigned short get_dma_curr_ycount(unsigned int channel)
{
return dma_ch[channel].regs->curr_y_count;
}
static inline void *get_dma_next_desc_ptr(unsigned int channel)
{
return dma_ch[channel].regs->next_desc_ptr;
}
static inline void *get_dma_curr_desc_ptr(unsigned int channel)
{
return dma_ch[channel].regs->curr_desc_ptr;
}
static inline unsigned short get_dma_config(unsigned int channel)
{
return dma_ch[channel].regs->cfg;
}
static inline unsigned long get_dma_curr_addr(unsigned int channel)
{
return dma_ch[channel].regs->curr_addr_ptr;
}
/* common functions must be called in any mode */
static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize)
{
dma_ch[channel].regs->cfg =
(dma_ch[channel].regs->cfg & ~(0xf << 8)) |
((ndsize & 0xf) << 8);
dma_ch[channel].regs->next_desc_ptr = sg;
}
static inline int dma_channel_active(unsigned int channel)
{
if (dma_ch[channel].chan_status == DMA_CHANNEL_FREE)
return 0;
else
return 1;
}
static inline void disable_dma(unsigned int channel)
{
dma_ch[channel].regs->cfg &= ~DMAEN;
SSYNC();
dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED;
}
static inline void enable_dma(unsigned int channel)
{
dma_ch[channel].regs->curr_x_count = 0;
dma_ch[channel].regs->curr_y_count = 0;
dma_ch[channel].regs->cfg |= DMAEN;
dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED;
}
void free_dma(unsigned int channel);
int dma_channel_active(unsigned int channel); /* check if a channel is in use */
void disable_dma(unsigned int channel);
void enable_dma(unsigned int channel);
int request_dma(unsigned int channel, char *device_id);
int set_dma_callback(unsigned int channel, dma_interrupt_t callback,
void *data);
void dma_disable_irq(unsigned int channel);
void dma_enable_irq(unsigned int channel);
void clear_dma_irqstat(unsigned int channel);
int request_dma(unsigned int channel, const char *device_id);
int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data);
static inline void dma_disable_irq(unsigned int channel)
{
disable_irq(dma_ch[channel].irq);
}
static inline void dma_enable_irq(unsigned int channel)
{
enable_irq(dma_ch[channel].irq);
}
static inline void clear_dma_irqstat(unsigned int channel)
{
dma_ch[channel].regs->irq_status = DMA_DONE | DMA_ERR;
}
void *dma_memcpy(void *dest, const void *src, size_t count);
void *safe_dma_memcpy(void *dest, const void *src, size_t count);
extern int channel2irq(unsigned int channel);
extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
void blackfin_dma_early_init(void);
#endif

11
arch/blackfin/include/asm/entry.h
View File

@ -27,6 +27,14 @@
#define SAVE_ALL_SYS save_context_no_interrupts
/* This is used for all normal interrupts. It saves a minimum of registers
to the stack, loads the IRQ number, and jumps to common code. */
#ifdef CONFIG_IPIPE
# define LOAD_IPIPE_IPEND \
P0.l = lo(IPEND); \
P0.h = hi(IPEND); \
R1 = [P0];
#else
# define LOAD_IPIPE_IPEND
#endif
#define INTERRUPT_ENTRY(N) \
[--sp] = SYSCFG; \
\
@ -34,6 +42,7 @@
[--sp] = R0; /*orig_r0*/ \
[--sp] = (R7:0,P5:0); \
R0 = (N); \
LOAD_IPIPE_IPEND \
jump __common_int_entry;
/* For timer interrupts, we need to save IPEND, since the user_mode
@ -53,9 +62,11 @@
/* This one pushes RETI without using CLI. Interrupts are enabled. */
#define SAVE_CONTEXT_SYSCALL save_context_syscall
#define SAVE_CONTEXT save_context_with_interrupts
#define SAVE_CONTEXT_CPLB save_context_cplb
#define RESTORE_ALL_SYS restore_context_no_interrupts
#define RESTORE_CONTEXT restore_context_with_interrupts
#define RESTORE_CONTEXT_CPLB restore_context_cplb
#endif /* __ASSEMBLY__ */
#endif /* __BFIN_ENTRY_H */

226
arch/blackfin/include/asm/gpio.h
View File

@ -84,11 +84,14 @@
#ifndef __ARCH_BLACKFIN_GPIO_H__
#define __ARCH_BLACKFIN_GPIO_H__
#define gpio_bank(x) ((x) >> 4)
#define gpio_bit(x) (1<<((x) & 0xF))
#define gpio_sub_n(x) ((x) & 0xF)
#define gpio_bank(x) ((x) >> 4)
#define gpio_bit(x) (1<<((x) & 0xF))
#define gpio_sub_n(x) ((x) & 0xF)
#define GPIO_BANKSIZE 16
#define GPIO_BANKSIZE 16
#define GPIO_BANK_NUM DIV_ROUND_UP(MAX_BLACKFIN_GPIOS, GPIO_BANKSIZE)
#include <mach/gpio.h>
#define GPIO_0 0
#define GPIO_1 1
@ -139,151 +142,9 @@
#define GPIO_46 46
#define GPIO_47 47
#define PERIPHERAL_USAGE 1
#define GPIO_USAGE 0
#ifdef BF533_FAMILY
#define MAX_BLACKFIN_GPIOS 16
#define GPIO_PF0 0
#define GPIO_PF1 1
#define GPIO_PF2 2
#define GPIO_PF3 3
#define GPIO_PF4 4
#define GPIO_PF5 5
#define GPIO_PF6 6
#define GPIO_PF7 7
#define GPIO_PF8 8
#define GPIO_PF9 9
#define GPIO_PF10 10
#define GPIO_PF11 11
#define GPIO_PF12 12
#define GPIO_PF13 13
#define GPIO_PF14 14
#define GPIO_PF15 15
#endif
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#define MAX_BLACKFIN_GPIOS 48
#define GPIO_PF0 0
#define GPIO_PF1 1
#define GPIO_PF2 2
#define GPIO_PF3 3
#define GPIO_PF4 4
#define GPIO_PF5 5
#define GPIO_PF6 6
#define GPIO_PF7 7
#define GPIO_PF8 8
#define GPIO_PF9 9
#define GPIO_PF10 10
#define GPIO_PF11 11
#define GPIO_PF12 12
#define GPIO_PF13 13
#define GPIO_PF14 14
#define GPIO_PF15 15
#define GPIO_PG0 16
#define GPIO_PG1 17
#define GPIO_PG2 18
#define GPIO_PG3 19
#define GPIO_PG4 20
#define GPIO_PG5 21
#define GPIO_PG6 22
#define GPIO_PG7 23
#define GPIO_PG8 24
#define GPIO_PG9 25
#define GPIO_PG10 26
#define GPIO_PG11 27
#define GPIO_PG12 28
#define GPIO_PG13 29
#define GPIO_PG14 30
#define GPIO_PG15 31
#define GPIO_PH0 32
#define GPIO_PH1 33
#define GPIO_PH2 34
#define GPIO_PH3 35
#define GPIO_PH4 36
#define GPIO_PH5 37
#define GPIO_PH6 38
#define GPIO_PH7 39
#define GPIO_PH8 40
#define GPIO_PH9 41
#define GPIO_PH10 42
#define GPIO_PH11 43
#define GPIO_PH12 44
#define GPIO_PH13 45
#define GPIO_PH14 46
#define GPIO_PH15 47
#define PORT_F GPIO_PF0
#define PORT_G GPIO_PG0
#define PORT_H GPIO_PH0
#endif
#ifdef BF548_FAMILY
#include <mach/gpio.h>
#endif
#ifdef BF561_FAMILY
#define MAX_BLACKFIN_GPIOS 48
#define GPIO_PF0 0
#define GPIO_PF1 1
#define GPIO_PF2 2
#define GPIO_PF3 3
#define GPIO_PF4 4
#define GPIO_PF5 5
#define GPIO_PF6 6
#define GPIO_PF7 7
#define GPIO_PF8 8
#define GPIO_PF9 9
#define GPIO_PF10 10
#define GPIO_PF11 11
#define GPIO_PF12 12
#define GPIO_PF13 13
#define GPIO_PF14 14
#define GPIO_PF15 15
#define GPIO_PF16 16
#define GPIO_PF17 17
#define GPIO_PF18 18
#define GPIO_PF19 19
#define GPIO_PF20 20
#define GPIO_PF21 21
#define GPIO_PF22 22
#define GPIO_PF23 23
#define GPIO_PF24 24
#define GPIO_PF25 25
#define GPIO_PF26 26
#define GPIO_PF27 27
#define GPIO_PF28 28
#define GPIO_PF29 29
#define GPIO_PF30 30
#define GPIO_PF31 31
#define GPIO_PF32 32
#define GPIO_PF33 33
#define GPIO_PF34 34
#define GPIO_PF35 35
#define GPIO_PF36 36
#define GPIO_PF37 37
#define GPIO_PF38 38
#define GPIO_PF39 39
#define GPIO_PF40 40
#define GPIO_PF41 41
#define GPIO_PF42 42
#define GPIO_PF43 43
#define GPIO_PF44 44
#define GPIO_PF45 45
#define GPIO_PF46 46
#define GPIO_PF47 47
#define PORT_FIO0 GPIO_0
#define PORT_FIO1 GPIO_16
#define PORT_FIO2 GPIO_32
#endif
#ifndef __ASSEMBLY__
/***********************************************************
@ -425,20 +286,77 @@ struct gpio_port_s {
* MODIFICATION HISTORY :
**************************************************************/
int gpio_request(unsigned, const char *);
void gpio_free(unsigned);
void gpio_set_value(unsigned gpio, int arg);
int gpio_get_value(unsigned gpio);
int bfin_gpio_request(unsigned gpio, const char *label);
void bfin_gpio_free(unsigned gpio);
int bfin_gpio_irq_request(unsigned gpio, const char *label);
void bfin_gpio_irq_free(unsigned gpio);
int bfin_gpio_direction_input(unsigned gpio);
int bfin_gpio_direction_output(unsigned gpio, int value);
int bfin_gpio_get_value(unsigned gpio);
void bfin_gpio_set_value(unsigned gpio, int value);
#ifndef BF548_FAMILY
#define gpio_set_value(gpio, value) set_gpio_data(gpio, value)
#define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value)
#endif
int gpio_direction_input(unsigned gpio);
int gpio_direction_output(unsigned gpio, int value);
#ifdef CONFIG_GPIOLIB
#include <asm-generic/gpio.h> /* cansleep wrappers */
static inline int gpio_get_value(unsigned int gpio)
{
if (gpio < MAX_BLACKFIN_GPIOS)
return bfin_gpio_get_value(gpio);
else
return __gpio_get_value(gpio);
}
static inline void gpio_set_value(unsigned int gpio, int value)
{
if (gpio < MAX_BLACKFIN_GPIOS)
bfin_gpio_set_value(gpio, value);
else
__gpio_set_value(gpio, value);
}
static inline int gpio_cansleep(unsigned int gpio)
{
return __gpio_cansleep(gpio);
}
#else /* !CONFIG_GPIOLIB */
static inline int gpio_request(unsigned gpio, const char *label)
{
return bfin_gpio_request(gpio, label);
}
static inline void gpio_free(unsigned gpio)
{
return bfin_gpio_free(gpio);
}
static inline int gpio_direction_input(unsigned gpio)
{
return bfin_gpio_direction_input(gpio);
}
static inline int gpio_direction_output(unsigned gpio, int value)
{
return bfin_gpio_direction_output(gpio, value);
}
static inline int gpio_get_value(unsigned gpio)
{
return bfin_gpio_get_value(gpio);
}
static inline void gpio_set_value(unsigned gpio, int value)
{
return bfin_gpio_set_value(gpio, value);
}
#include <asm-generic/gpio.h> /* cansleep wrappers */
#endif /* !CONFIG_GPIOLIB */
#include <asm/irq.h>
static inline int gpio_to_irq(unsigned gpio)

2
arch/blackfin/include/asm/hardirq.h
View File

@ -42,4 +42,6 @@ typedef struct {
#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
extern void ack_bad_irq(unsigned int irq);
#endif

14
arch/blackfin/include/asm/io.h
View File

@ -94,12 +94,12 @@ static inline unsigned int readl(const volatile void __iomem *addr)
#define outw_p(x,addr) outw(x,addr)
#define outl_p(x,addr) outl(x,addr)
#define ioread8_rep(a,d,c) insb(a,d,c)
#define ioread16_rep(a,d,c) insw(a,d,c)
#define ioread32_rep(a,d,c) insl(a,d,c)
#define iowrite8_rep(a,s,c) outsb(a,s,c)
#define iowrite16_rep(a,s,c) outsw(a,s,c)
#define iowrite32_rep(a,s,c) outsl(a,s,c)
#define ioread8_rep(a,d,c) readsb(a,d,c)
#define ioread16_rep(a,d,c) readsw(a,d,c)
#define ioread32_rep(a,d,c) readsl(a,d,c)
#define iowrite8_rep(a,s,c) writesb(a,s,c)
#define iowrite16_rep(a,s,c) writesw(a,s,c)
#define iowrite32_rep(a,s,c) writesl(a,s,c)
#define ioread8(X) readb(X)
#define ioread16(X) readw(X)
@ -108,6 +108,8 @@ static inline unsigned int readl(const volatile void __iomem *addr)
#define iowrite16(val,X) writew(val,X)
#define iowrite32(val,X) writel(val,X)
#define mmiowb() wmb()
#define IO_SPACE_LIMIT 0xffffffff
/* Values for nocacheflag and cmode */

278
arch/blackfin/include/asm/ipipe.h Normal file
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@ -0,0 +1,278 @@
/* -*- linux-c -*-
* include/asm-blackfin/ipipe.h
*
* Copyright (C) 2002-2007 Philippe Gerum.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
* USA; either version 2 of the License, or (at your option) any later
* version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef __ASM_BLACKFIN_IPIPE_H
#define __ASM_BLACKFIN_IPIPE_H
#ifdef CONFIG_IPIPE
#include <linux/cpumask.h>
#include <linux/list.h>
#include <linux/threads.h>
#include <linux/irq.h>
#include <linux/ipipe_percpu.h>
#include <asm/ptrace.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/atomic.h>
#include <asm/traps.h>
#define IPIPE_ARCH_STRING "1.8-00"
#define IPIPE_MAJOR_NUMBER 1
#define IPIPE_MINOR_NUMBER 8
#define IPIPE_PATCH_NUMBER 0
#ifdef CONFIG_SMP
#error "I-pipe/blackfin: SMP not implemented"
#else /* !CONFIG_SMP */
#define ipipe_processor_id() 0
#endif /* CONFIG_SMP */
#define prepare_arch_switch(next) \
do { \
ipipe_schedule_notify(current, next); \
local_irq_disable_hw(); \
} while (0)
#define task_hijacked(p) \
({ \
int __x__ = ipipe_current_domain != ipipe_root_domain; \
/* We would need to clear the SYNC flag for the root domain */ \
/* over the current processor in SMP mode. */ \
local_irq_enable_hw(); __x__; \
})
struct ipipe_domain;
struct ipipe_sysinfo {
int ncpus; /* Number of CPUs on board */
u64 cpufreq; /* CPU frequency (in Hz) */
/* Arch-dependent block */
struct {
unsigned tmirq; /* Timer tick IRQ */
u64 tmfreq; /* Timer frequency */
} archdep;
};
#define ipipe_read_tsc(t) \
({ \
unsigned long __cy2; \
__asm__ __volatile__ ("1: %0 = CYCLES2\n" \
"%1 = CYCLES\n" \
"%2 = CYCLES2\n" \
"CC = %2 == %0\n" \
"if ! CC jump 1b\n" \
: "=r" (((unsigned long *)&t)[1]), \
"=r" (((unsigned long *)&t)[0]), \
"=r" (__cy2) \
: /*no input*/ : "CC"); \
t; \
})
#define ipipe_cpu_freq() __ipipe_core_clock
#define ipipe_tsc2ns(_t) (((unsigned long)(_t)) * __ipipe_freq_scale)
#define ipipe_tsc2us(_t) (ipipe_tsc2ns(_t) / 1000 + 1)
/* Private interface -- Internal use only */
#define __ipipe_check_platform() do { } while (0)
#define __ipipe_init_platform() do { } while (0)
extern atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
extern unsigned long __ipipe_irq_lvmask;
extern struct ipipe_domain ipipe_root;
/* enable/disable_irqdesc _must_ be used in pairs. */
void __ipipe_enable_irqdesc(struct ipipe_domain *ipd,
unsigned irq);
void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
unsigned irq);
#define __ipipe_enable_irq(irq) (irq_desc[irq].chip->unmask(irq))
#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
#define __ipipe_lock_root() \
set_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)
#define __ipipe_unlock_root() \
clear_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags)
void __ipipe_enable_pipeline(void);
#define __ipipe_hook_critical_ipi(ipd) do { } while (0)
#define __ipipe_sync_pipeline(syncmask) \
do { \
struct ipipe_domain *ipd = ipipe_current_domain; \
if (likely(ipd != ipipe_root_domain || !test_bit(IPIPE_ROOTLOCK_FLAG, &ipd->flags))) \
__ipipe_sync_stage(syncmask); \
} while (0)
void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
int __ipipe_get_irq_priority(unsigned irq);
int __ipipe_get_irqthread_priority(unsigned irq);
void __ipipe_stall_root_raw(void);
void __ipipe_unstall_root_raw(void);
void __ipipe_serial_debug(const char *fmt, ...);
DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
extern unsigned long __ipipe_core_clock;
extern unsigned long __ipipe_freq_scale;
extern unsigned long __ipipe_irq_tail_hook;
static inline unsigned long __ipipe_ffnz(unsigned long ul)
{
return ffs(ul) - 1;
}
#define __ipipe_run_irqtail() /* Must be a macro */ \
do { \
asmlinkage void __ipipe_call_irqtail(void); \
unsigned long __pending; \
CSYNC(); \
__pending = bfin_read_IPEND(); \
if (__pending & 0x8000) { \
__pending &= ~0x8010; \
if (__pending && (__pending & (__pending - 1)) == 0) \
__ipipe_call_irqtail(); \
} \
} while (0)
#define __ipipe_run_isr(ipd, irq) \
do { \
if (ipd == ipipe_root_domain) { \
/* \
* Note: the I-pipe implements a threaded interrupt model on \
* this arch for Linux external IRQs. The interrupt handler we \
* call here only wakes up the associated IRQ thread. \
*/ \
if (ipipe_virtual_irq_p(irq)) { \
/* No irqtail here; virtual interrupts have no effect \
on IPEND so there is no need for processing \
deferral. */ \
local_irq_enable_nohead(ipd); \
ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
local_irq_disable_nohead(ipd); \
} else \
/* \
* No need to run the irqtail here either; \
* we can't be preempted by hw IRQs, so \
* non-Linux IRQs cannot stack over the short \
* thread wakeup code. Which in turn means \
* that no irqtail condition could be pending \
* for domains above Linux in the pipeline. \
*/ \
ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
} else { \
__clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
local_irq_enable_nohead(ipd); \
ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
/* Attempt to exit the outer interrupt level before \
* starting the deferred IRQ processing. */ \
local_irq_disable_nohead(ipd); \
__ipipe_run_irqtail(); \
__set_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
} \
} while (0)
#define __ipipe_syscall_watched_p(p, sc) \
(((p)->flags & PF_EVNOTIFY) || (unsigned long)sc >= NR_syscalls)
void ipipe_init_irq_threads(void);
int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
#define IS_SYSIRQ(irq) ((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS)
#define IS_GPIOIRQ(irq) ((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS)
#define IRQ_SYSTMR IRQ_TIMER0
#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
#if defined(CONFIG_BF531) || defined(CONFIG_BF532) || defined(CONFIG_BF533)
#define PRIO_GPIODEMUX(irq) CONFIG_PFA
#elif defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
#define PRIO_GPIODEMUX(irq) CONFIG_IRQ_PROG_INTA
#elif defined(CONFIG_BF52x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
(irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
(irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
-1)
#elif defined(CONFIG_BF561)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
(irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
(irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
-1)
#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TMRS8_ENABLE(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TMRS8_STATUS(val)
#define bfin_read_TIMER_STATUS() bfin_read_TMRS8_STATUS()
#elif defined(CONFIG_BF54x)
#define PRIO_GPIODEMUX(irq) ((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
(irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
(irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
(irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
-1)
#define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val)
#define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val)
#define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val)
#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val)
#else
# error "no PRIO_GPIODEMUX() for this part"
#endif
#define __ipipe_root_tick_p(regs) ((regs->ipend & 0x10) != 0)
#else /* !CONFIG_IPIPE */
#define task_hijacked(p) 0
#define ipipe_trap_notify(t, r) 0
#define __ipipe_stall_root_raw() do { } while (0)
#define __ipipe_unstall_root_raw() do { } while (0)
#define ipipe_init_irq_threads() do { } while (0)
#define ipipe_start_irq_thread(irq, desc) 0
#define IRQ_SYSTMR IRQ_CORETMR
#define IRQ_PRIOTMR IRQ_CORETMR
#define __ipipe_root_tick_p(regs) 1
#endif /* !CONFIG_IPIPE */
#endif /* !__ASM_BLACKFIN_IPIPE_H */

80
arch/blackfin/include/asm/ipipe_base.h Normal file
View File

@ -0,0 +1,80 @@
/* -*- linux-c -*-
* include/asm-blackfin/_baseipipe.h
*
* Copyright (C) 2007 Philippe Gerum.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
* USA; either version 2 of the License, or (at your option) any later
* version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef __ASM_BLACKFIN_IPIPE_BASE_H
#define __ASM_BLACKFIN_IPIPE_BASE_H
#ifdef CONFIG_IPIPE
#define IPIPE_NR_XIRQS NR_IRQS
#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
/* Blackfin-specific, global domain flags */
#define IPIPE_ROOTLOCK_FLAG 1 /* Lock pipeline for root */
/* Blackfin traps -- i.e. exception vector numbers */
#define IPIPE_NR_FAULTS 52 /* We leave a gap after VEC_ILL_RES. */
/* Pseudo-vectors used for kernel events */
#define IPIPE_FIRST_EVENT IPIPE_NR_FAULTS
#define IPIPE_EVENT_SYSCALL (IPIPE_FIRST_EVENT)
#define IPIPE_EVENT_SCHEDULE (IPIPE_FIRST_EVENT + 1)
#define IPIPE_EVENT_SIGWAKE (IPIPE_FIRST_EVENT + 2)
#define IPIPE_EVENT_SETSCHED (IPIPE_FIRST_EVENT + 3)
#define IPIPE_EVENT_INIT (IPIPE_FIRST_EVENT + 4)
#define IPIPE_EVENT_EXIT (IPIPE_FIRST_EVENT + 5)
#define IPIPE_EVENT_CLEANUP (IPIPE_FIRST_EVENT + 6)
#define IPIPE_LAST_EVENT IPIPE_EVENT_CLEANUP
#define IPIPE_NR_EVENTS (IPIPE_LAST_EVENT + 1)
#define IPIPE_TIMER_IRQ IRQ_CORETMR
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
extern int test_bit(int nr, const void *addr);
extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
static inline void __ipipe_stall_root(void)
{
volatile unsigned long *p = &__ipipe_root_status;
set_bit(0, p);
}
static inline unsigned long __ipipe_test_and_stall_root(void)
{
volatile unsigned long *p = &__ipipe_root_status;
return test_and_set_bit(0, p);
}
static inline unsigned long __ipipe_test_root(void)
{
const unsigned long *p = &__ipipe_root_status;
return test_bit(0, p);
}
#endif /* !__ASSEMBLY__ */
#endif /* CONFIG_IPIPE */
#endif /* !__ASM_BLACKFIN_IPIPE_BASE_H */

300
arch/blackfin/include/asm/irq.h
View File

@ -17,56 +17,272 @@
#ifndef _BFIN_IRQ_H_
#define _BFIN_IRQ_H_
#include <mach/irq.h>
#include <asm/ptrace.h>
/*******************************************************************************
***** INTRODUCTION ***********
* On the Blackfin, the interrupt structure allows remmapping of the hardware
* levels.
* - I'm going to assume that the H/W level is going to stay at the default
* settings. If someone wants to go through and abstart this out, feel free
* to mod the interrupt numbering scheme.
* - I'm abstracting the interrupts so that uClinux does not know anything
* about the H/W levels. If you want to change the H/W AND keep the abstracted
* levels that uClinux sees, you should be able to do most of it here.
* - I've left the "abstract" numbering sparce in case someone wants to pull the
* interrupts apart (just the TX/RX for the various devices)
*******************************************************************************/
/* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h>*/
#include <mach/irq.h>
#include <asm/pda.h>
#include <asm/processor.h>
#ifdef CONFIG_SMP
/* Forward decl needed due to cdef inter dependencies */
static inline uint32_t __pure bfin_dspid(void);
# define blackfin_core_id() (bfin_dspid() & 0xff)
# define bfin_irq_flags cpu_pda[blackfin_core_id()].imask
#else
extern unsigned long bfin_irq_flags;
#endif
#ifdef CONFIG_IPIPE
#include <linux/ipipe_trace.h>
void __ipipe_unstall_root(void);
void __ipipe_restore_root(unsigned long flags);
#ifdef CONFIG_DEBUG_HWERR
# define __all_masked_irq_flags 0x3f
# define __save_and_cli_hw(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %1;" \
: "=&d"(x) \
: "d" (0x3F) \
)
#else
# define __all_masked_irq_flags 0x1f
# define __save_and_cli_hw(x) \
__asm__ __volatile__( \
"cli %0;" \
: "=&d"(x) \
)
#endif
#define irqs_enabled_from_flags_hw(x) ((x) != __all_masked_irq_flags)
#define raw_irqs_disabled_flags(flags) (!irqs_enabled_from_flags_hw(flags))
#define local_test_iflag_hw(x) irqs_enabled_from_flags_hw(x)
#define local_save_flags(x) \
do { \
(x) = __ipipe_test_root() ? \
__all_masked_irq_flags : bfin_irq_flags; \
} while (0)
#define local_irq_save(x) \
do { \
(x) = __ipipe_test_and_stall_root(); \
} while (0)
#define local_irq_restore(x) __ipipe_restore_root(x)
#define local_irq_disable() __ipipe_stall_root()
#define local_irq_enable() __ipipe_unstall_root()
#define irqs_disabled() __ipipe_test_root()
#define local_save_flags_hw(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %0;" \
: "=d"(x) \
)
#define irqs_disabled_hw() \
({ \
unsigned long flags; \
local_save_flags_hw(flags); \
!irqs_enabled_from_flags_hw(flags); \
})
static inline unsigned long raw_mangle_irq_bits(int virt, unsigned long real)
{
/* Merge virtual and real interrupt mask bits into a single
32bit word. */
return (real & ~(1 << 31)) | ((virt != 0) << 31);
}
static inline int raw_demangle_irq_bits(unsigned long *x)
{
int virt = (*x & (1 << 31)) != 0;
*x &= ~(1L << 31);
return virt;
}
#ifdef CONFIG_IPIPE_TRACE_IRQSOFF
#define local_irq_disable_hw() \
do { \
int _tmp_dummy; \
if (!irqs_disabled_hw()) \
ipipe_trace_begin(0x80000000); \
__asm__ __volatile__ ("cli %0;" : "=d" (_tmp_dummy) : ); \
} while (0)
#define local_irq_enable_hw() \
do { \
if (irqs_disabled_hw()) \
ipipe_trace_end(0x80000000); \
__asm__ __volatile__ ("sti %0;" : : "d"(bfin_irq_flags)); \
} while (0)
#define local_irq_save_hw(x) \
do { \
__save_and_cli_hw(x); \
if (local_test_iflag_hw(x)) \
ipipe_trace_begin(0x80000001); \
} while (0)
#define local_irq_restore_hw(x) \
do { \
if (local_test_iflag_hw(x)) { \
ipipe_trace_end(0x80000001); \
local_irq_enable_hw_notrace(); \
} \
} while (0)
#define local_irq_disable_hw_notrace() \
do { \
int _tmp_dummy; \
__asm__ __volatile__ ("cli %0;" : "=d" (_tmp_dummy) : ); \
} while (0)
#define local_irq_enable_hw_notrace() \
__asm__ __volatile__( \
"sti %0;" \
: \
: "d"(bfin_irq_flags) \
)
#define local_irq_save_hw_notrace(x) __save_and_cli_hw(x)
#define local_irq_restore_hw_notrace(x) \
do { \
if (local_test_iflag_hw(x)) \
local_irq_enable_hw_notrace(); \
} while (0)
#else /* CONFIG_IPIPE_TRACE_IRQSOFF */
#define local_irq_enable_hw() \
__asm__ __volatile__( \
"sti %0;" \
: \
: "d"(bfin_irq_flags) \
)
#define local_irq_disable_hw() \
do { \
int _tmp_dummy; \
__asm__ __volatile__ ( \
"cli %0;" \
: "=d" (_tmp_dummy)); \
} while (0)
#define local_irq_restore_hw(x) \
do { \
if (irqs_enabled_from_flags_hw(x)) \
local_irq_enable_hw(); \
} while (0)
#define local_irq_save_hw(x) __save_and_cli_hw(x)
#define local_irq_disable_hw_notrace() local_irq_disable_hw()
#define local_irq_enable_hw_notrace() local_irq_enable_hw()
#define local_irq_save_hw_notrace(x) local_irq_save_hw(x)
#define local_irq_restore_hw_notrace(x) local_irq_restore_hw(x)
#endif /* CONFIG_IPIPE_TRACE_IRQSOFF */
#else /* !CONFIG_IPIPE */
/*
* Machine specific interrupt sources.
*
* Adding an interrupt service routine for a source with this bit
* set indicates a special machine specific interrupt source.
* The machine specific files define these sources.
*
* The IRQ_MACHSPEC bit is now gone - the only thing it did was to
* introduce unnecessary overhead.
*
* All interrupt handling is actually machine specific so it is better
* to use function pointers, as used by the Sparc port, and select the
* interrupt handling functions when initializing the kernel. This way
* we save some unnecessary overhead at run-time.
* 01/11/97 - Jes
* Interrupt configuring macros.
*/
#define local_irq_disable() \
do { \
int __tmp_dummy; \
__asm__ __volatile__( \
"cli %0;" \
: "=d" (__tmp_dummy) \
); \
} while (0)
extern void ack_bad_irq(unsigned int irq);
#define local_irq_enable() \
__asm__ __volatile__( \
"sti %0;" \
: \
: "d" (bfin_irq_flags) \
)
static __inline__ int irq_canonicalize(int irq)
#ifdef CONFIG_DEBUG_HWERR
# define __save_and_cli(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %1;" \
: "=&d" (x) \
: "d" (0x3F) \
)
#else
# define __save_and_cli(x) \
__asm__ __volatile__( \
"cli %0;" \
: "=&d" (x) \
)
#endif
#define local_save_flags(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %0;" \
: "=d" (x) \
)
#ifdef CONFIG_DEBUG_HWERR
#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
#else
#define irqs_enabled_from_flags(x) ((x) != 0x1f)
#endif
#define local_irq_restore(x) \
do { \
if (irqs_enabled_from_flags(x)) \
local_irq_enable(); \
} while (0)
/* For spinlocks etc */
#define local_irq_save(x) __save_and_cli(x)
#define irqs_disabled() \
({ \
unsigned long flags; \
local_save_flags(flags); \
!irqs_enabled_from_flags(flags); \
})
#define local_irq_save_hw(x) local_irq_save(x)
#define local_irq_restore_hw(x) local_irq_restore(x)
#define local_irq_enable_hw() local_irq_enable()
#define local_irq_disable_hw() local_irq_disable()
#define irqs_disabled_hw() irqs_disabled()
#endif /* !CONFIG_IPIPE */
#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
# define NOP_PAD_ANOMALY_05000244 "nop; nop;"
#else
# define NOP_PAD_ANOMALY_05000244
#endif
#define idle_with_irq_disabled() \
__asm__ __volatile__( \
NOP_PAD_ANOMALY_05000244 \
".align 8;" \
"sti %0;" \
"idle;" \
: \
: "d" (bfin_irq_flags) \
)
static inline int irq_canonicalize(int irq)
{
return irq;
}
/* count of spurious interrupts */
/* extern volatile unsigned int num_spurious; */
#ifndef NO_IRQ
#define NO_IRQ ((unsigned int)(-1))
#endif
#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
#endif /* _BFIN_IRQ_H_ */

5
arch/blackfin/include/asm/l1layout.h
View File

@ -8,6 +8,7 @@
#include <asm/blackfin.h>
#ifndef CONFIG_SMP
#ifndef __ASSEMBLY__
/* Data that is "mapped" into the process VM at the start of the L1 scratch
@ -24,8 +25,10 @@ struct l1_scratch_task_info
};
/* A pointer to the structure in memory. */
#define L1_SCRATCH_TASK_INFO ((struct l1_scratch_task_info *)L1_SCRATCH_START)
#define L1_SCRATCH_TASK_INFO ((struct l1_scratch_task_info *)\
get_l1_scratch_start())
#endif
#endif
#endif

168
arch/blackfin/mach-bf527/include/mach/mem_init.h → arch/blackfin/include/asm/mem_init.h
View File

@ -1,35 +1,20 @@
/*
* File: include/asm-blackfin/mach-bf527/mem_init.h
* Based on:
* Author:
* arch/blackfin/include/asm/mem_init.h - reprogram clocks / memory
*
* Created:
* Description:
* Copyright 2004-2008 Analog Devices Inc.
*
* Rev:
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING.
* If not, write to the Free Software Foundation,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
* Licensed under the GPL-2 or later.
*/
#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || CONFIG_MEM_MT48LC16M8A2TG_75 || CONFIG_MEM_GENERIC_BOARD || CONFIG_MEM_MT48LC32M8A2_75 || CONFIG_MEM_MT48LC32M16A2TG_75)
#if defined(EBIU_SDGCTL)
#if defined(CONFIG_MEM_MT48LC16M16A2TG_75) || \
defined(CONFIG_MEM_MT48LC64M4A2FB_7E) || \
defined(CONFIG_MEM_MT48LC16M8A2TG_75) || \
defined(CONFIG_MEM_GENERIC_BOARD) || \
defined(CONFIG_MEM_MT48LC32M8A2_75) || \
defined(CONFIG_MEM_MT48LC8M32B2B5_7) || \
defined(CONFIG_MEM_MT48LC32M16A2TG_75) || \
defined(CONFIG_MEM_MT48LC32M8A2_75)
#if (CONFIG_SCLK_HZ > 119402985)
#define SDRAM_tRP TRP_2
#define SDRAM_tRP_num 2
@ -104,53 +89,114 @@
#endif
#endif
#if (CONFIG_MEM_MT48LC16M16A2TG_75)
/*SDRAM INFORMATION: */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_MT48LC16M8A2TG_75)
#if defined(CONFIG_MEM_MT48LC16M8A2TG_75) || \
defined(CONFIG_MEM_MT48LC8M32B2B5_7)
/*SDRAM INFORMATION: */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 4096 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_MT48LC32M8A2_75)
#if defined(CONFIG_MEM_MT48LC32M8A2_75) || \
defined(CONFIG_MEM_MT48LC64M4A2FB_7E) || \
defined(CONFIG_MEM_GENERIC_BOARD) || \
defined(CONFIG_MEM_MT48LC32M16A2TG_75) || \
defined(CONFIG_MEM_MT48LC16M16A2TG_75) || \
defined(CONFIG_MEM_MT48LC32M8A2_75)
/*SDRAM INFORMATION: */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_MT48LC64M4A2FB_7E)
/*SDRAM INFORMATION: */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_GENERIC_BOARD)
/*SDRAM INFORMATION: Modify this for your board */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_MT48LC32M16A2TG_75)
/*SDRAM INFORMATION: */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */
#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
#define SDRAM_CL CL_3
#endif
#ifdef CONFIG_BFIN_KERNEL_CLOCK_MEMINIT_CALC
/* Equation from section 17 (p17-46) of BF533 HRM */
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
/* Enable SCLK Out */
#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#else
#define mem_SDRRC CONFIG_MEM_SDRRC
#define mem_SDGCTL CONFIG_MEM_SDGCTL
#endif
#endif
#if defined(EBIU_DDRCTL0)
#define MIN_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000 + 1)
#define MAX_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000)
#define DDR_CLK_HZ(x) (1000*1000*1000/x)
#if defined(CONFIG_MEM_MT46V32M16_6T)
#define DDR_SIZE DEVSZ_512
#define DDR_WIDTH DEVWD_16
#define DDR_MAX_tCK 13
#define DDR_tRC DDR_TRC(MIN_DDR_SCLK(60))
#define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(42))
#define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15))
#define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(72))
#define DDR_tREFI DDR_TREFI(MAX_DDR_SCLK(7800))
#define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15))
#define DDR_tWTR DDR_TWTR(1)
#define DDR_tMRD DDR_TMRD(MIN_DDR_SCLK(12))
#define DDR_tWR DDR_TWR(MIN_DDR_SCLK(15))
#endif
#if defined(CONFIG_MEM_MT46V32M16_5B)
#define DDR_SIZE DEVSZ_512
#define DDR_WIDTH DEVWD_16
#define DDR_MAX_tCK 13
#define DDR_tRC DDR_TRC(MIN_DDR_SCLK(55))
#define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(40))
#define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15))
#define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(70))
#define DDR_tREFI DDR_TREFI(MAX_DDR_SCLK(7800))
#define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15))
#define DDR_tWTR DDR_TWTR(2)
#define DDR_tMRD DDR_TMRD(MIN_DDR_SCLK(10))
#define DDR_tWR DDR_TWR(MIN_DDR_SCLK(15))
#endif
#if defined(CONFIG_MEM_GENERIC_BOARD)
#define DDR_SIZE DEVSZ_512
#define DDR_WIDTH DEVWD_16
#define DDR_MAX_tCK 13
#define DDR_tRCD DDR_TRCD(3)
#define DDR_tWTR DDR_TWTR(2)
#define DDR_tWR DDR_TWR(2)
#define DDR_tMRD DDR_TMRD(2)
#define DDR_tRP DDR_TRP(3)
#define DDR_tRAS DDR_TRAS(7)
#define DDR_tRC DDR_TRC(10)
#define DDR_tRFC DDR_TRFC(12)
#define DDR_tREFI DDR_TREFI(1288)
#endif
#if (CONFIG_SCLK_HZ < DDR_CLK_HZ(DDR_MAX_tCK))
# error "CONFIG_SCLK_HZ is too small (<DDR_CLK_HZ(DDR_MAX_tCK) Hz)."
#elif(CONFIG_SCLK_HZ <= 133333333)
# define DDR_CL CL_2
#else
# error "CONFIG_SCLK_HZ is too large (>133333333 Hz)."
#endif
#ifdef CONFIG_BFIN_KERNEL_CLOCK_MEMINIT_CALC
#define mem_DDRCTL0 (DDR_tRP | DDR_tRAS | DDR_tRC | DDR_tRFC | DDR_tREFI)
#define mem_DDRCTL1 (DDR_DATWIDTH | EXTBANK_1 | DDR_SIZE | DDR_WIDTH | DDR_tWTR \
| DDR_tMRD | DDR_tWR | DDR_tRCD)
#define mem_DDRCTL2 DDR_CL
#else
#define mem_DDRCTL0 CONFIG_MEM_DDRCTL0
#define mem_DDRCTL1 CONFIG_MEM_DDRCTL1
#define mem_DDRCTL2 CONFIG_MEM_DDRCTL2
#endif
#endif
#if defined CONFIG_CLKIN_HALF
#define CLKIN_HALF 1
@ -165,6 +211,13 @@
#endif
/***************************************Currently Not Being Used *********************************/
#if defined(CONFIG_FLASH_SPEED_BWAT) && \
defined(CONFIG_FLASH_SPEED_BRAT) && \
defined(CONFIG_FLASH_SPEED_BHT) && \
defined(CONFIG_FLASH_SPEED_BST) && \
defined(CONFIG_FLASH_SPEED_BTT)
#define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
#define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
#define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ))
@ -308,3 +361,4 @@
#define flash_EBIU_AMBCTL0 \
(flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \
flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN)
#endif

75
arch/blackfin/include/asm/mem_map.h
View File

@ -9,4 +9,79 @@
#include <mach/mem_map.h>
#ifndef __ASSEMBLY__
#ifdef CONFIG_SMP
static inline ulong get_l1_scratch_start_cpu(int cpu)
{
return (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;
}
static inline ulong get_l1_code_start_cpu(int cpu)
{
return (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START;
}
static inline ulong get_l1_data_a_start_cpu(int cpu)
{
return (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;
}
static inline ulong get_l1_data_b_start_cpu(int cpu)
{
return (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;
}
static inline ulong get_l1_scratch_start(void)
{
return get_l1_scratch_start_cpu(blackfin_core_id());
}
static inline ulong get_l1_code_start(void)
{
return get_l1_code_start_cpu(blackfin_core_id());
}
static inline ulong get_l1_data_a_start(void)
{
return get_l1_data_a_start_cpu(blackfin_core_id());
}
static inline ulong get_l1_data_b_start(void)
{
return get_l1_data_b_start_cpu(blackfin_core_id());
}
#else /* !CONFIG_SMP */
static inline ulong get_l1_scratch_start_cpu(int cpu)
{
return L1_SCRATCH_START;
}
static inline ulong get_l1_code_start_cpu(int cpu)
{
return L1_CODE_START;
}
static inline ulong get_l1_data_a_start_cpu(int cpu)
{
return L1_DATA_A_START;
}
static inline ulong get_l1_data_b_start_cpu(int cpu)
{
return L1_DATA_B_START;
}
static inline ulong get_l1_scratch_start(void)
{
return get_l1_scratch_start_cpu(0);
}
static inline ulong get_l1_code_start(void)
{
return get_l1_code_start_cpu(0);
}
static inline ulong get_l1_data_a_start(void)
{
return get_l1_data_a_start_cpu(0);
}
static inline ulong get_l1_data_b_start(void)
{
return get_l1_data_b_start_cpu(0);
}
#endif /* CONFIG_SMP */
#endif /* __ASSEMBLY__ */
#endif /* _MEM_MAP_H_ */

27
arch/blackfin/include/asm/mmu_context.h
View File

@ -37,6 +37,10 @@
#include <asm/pgalloc.h>
#include <asm/cplbinit.h>
/* Note: L1 stacks are CPU-private things, so we bluntly disable this
feature in SMP mode, and use the per-CPU scratch SRAM bank only to
store the PDA instead. */
extern void *current_l1_stack_save;
extern int nr_l1stack_tasks;
extern void *l1_stack_base;
@ -88,12 +92,15 @@ activate_l1stack(struct mm_struct *mm, unsigned long sp_base)
static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
struct task_struct *tsk)
{
#ifdef CONFIG_MPU
unsigned int cpu = smp_processor_id();
#endif
if (prev_mm == next_mm)
return;
#ifdef CONFIG_MPU
if (prev_mm->context.page_rwx_mask == current_rwx_mask) {
flush_switched_cplbs();
set_mask_dcplbs(next_mm->context.page_rwx_mask);
if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
flush_switched_cplbs(cpu);
set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu);
}
#endif
@ -138,9 +145,10 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr,
static inline void update_protections(struct mm_struct *mm)
{
if (mm->context.page_rwx_mask == current_rwx_mask) {
flush_switched_cplbs();
set_mask_dcplbs(mm->context.page_rwx_mask);
unsigned int cpu = smp_processor_id();
if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
flush_switched_cplbs(cpu);
set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
}
}
#endif
@ -165,6 +173,9 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
static inline void destroy_context(struct mm_struct *mm)
{
struct sram_list_struct *tmp;
#ifdef CONFIG_MPU
unsigned int cpu = smp_processor_id();
#endif
#ifdef CONFIG_APP_STACK_L1
if (current_l1_stack_save == mm->context.l1_stack_save)
@ -179,8 +190,8 @@ static inline void destroy_context(struct mm_struct *mm)
kfree(tmp);
}
#ifdef CONFIG_MPU
if (current_rwx_mask == mm->context.page_rwx_mask)
current_rwx_mask = NULL;
if (current_rwx_mask[cpu] == mm->context.page_rwx_mask)
current_rwx_mask[cpu] = NULL;
free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
#endif
}

112
arch/blackfin/include/asm/mutex-dec.h Normal file
View File

@ -0,0 +1,112 @@
/*
* include/asm-generic/mutex-dec.h
*
* Generic implementation of the mutex fastpath, based on atomic
* decrement/increment.
*/
#ifndef _ASM_GENERIC_MUTEX_DEC_H
#define _ASM_GENERIC_MUTEX_DEC_H
/**
* __mutex_fastpath_lock - try to take the lock by moving the count
* from 1 to a 0 value
* @count: pointer of type atomic_t
* @fail_fn: function to call if the original value was not 1
*
* Change the count from 1 to a value lower than 1, and call <fail_fn> if
* it wasn't 1 originally. This function MUST leave the value lower than
* 1 even when the "1" assertion wasn't true.
*/
static inline void
__mutex_fastpath_lock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
{
if (unlikely(atomic_dec_return(count) < 0))
fail_fn(count);
else
smp_mb();
}
/**
* __mutex_fastpath_lock_retval - try to take the lock by moving the count
* from 1 to a 0 value
* @count: pointer of type atomic_t
* @fail_fn: function to call if the original value was not 1
*
* Change the count from 1 to a value lower than 1, and call <fail_fn> if
* it wasn't 1 originally. This function returns 0 if the fastpath succeeds,
* or anything the slow path function returns.
*/
static inline int
__mutex_fastpath_lock_retval(atomic_t *count, fastcall int (*fail_fn)(atomic_t *))
{
if (unlikely(atomic_dec_return(count) < 0))
return fail_fn(count);
else {
smp_mb();
return 0;
}
}
/**
* __mutex_fastpath_unlock - try to promote the count from 0 to 1
* @count: pointer of type atomic_t
* @fail_fn: function to call if the original value was not 0
*
* Try to promote the count from 0 to 1. If it wasn't 0, call <fail_fn>.
* In the failure case, this function is allowed to either set the value to
* 1, or to set it to a value lower than 1.
*
* If the implementation sets it to a value of lower than 1, then the
* __mutex_slowpath_needs_to_unlock() macro needs to return 1, it needs
* to return 0 otherwise.
*/
static inline void
__mutex_fastpath_unlock(atomic_t *count, fastcall void (*fail_fn)(atomic_t *))
{
smp_mb();
if (unlikely(atomic_inc_return(count) <= 0))
fail_fn(count);
}
#define __mutex_slowpath_needs_to_unlock() 1
/**
* __mutex_fastpath_trylock - try to acquire the mutex, without waiting
*
* @count: pointer of type atomic_t
* @fail_fn: fallback function
*
* Change the count from 1 to a value lower than 1, and return 0 (failure)
* if it wasn't 1 originally, or return 1 (success) otherwise. This function
* MUST leave the value lower than 1 even when the "1" assertion wasn't true.
* Additionally, if the value was < 0 originally, this function must not leave
* it to 0 on failure.
*
* If the architecture has no effective trylock variant, it should call the
* <fail_fn> spinlock-based trylock variant unconditionally.
*/
static inline int
__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
{
/*
* We have two variants here. The cmpxchg based one is the best one
* because it never induce a false contention state. It is included
* here because architectures using the inc/dec algorithms over the
* xchg ones are much more likely to support cmpxchg natively.
*
* If not we fall back to the spinlock based variant - that is
* just as efficient (and simpler) as a 'destructive' probing of
* the mutex state would be.
*/
#ifdef __HAVE_ARCH_CMPXCHG
if (likely(atomic_cmpxchg(count, 1, 0) == 1)) {
smp_mb();
return 1;
}
return 0;
#else
return fail_fn(count);
#endif
}
#endif

63
arch/blackfin/include/asm/mutex.h
View File

@ -6,4 +6,67 @@
* implementation. (see asm-generic/mutex-xchg.h for details)
*/
#ifndef _ASM_MUTEX_H
#define _ASM_MUTEX_H
#ifndef CONFIG_SMP
#include <asm-generic/mutex-dec.h>
#else
static inline void
__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
{
if (unlikely(atomic_dec_return(count) < 0))
fail_fn(count);
else
smp_mb();
}
static inline int
__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
{
if (unlikely(atomic_dec_return(count) < 0))
return fail_fn(count);
else {
smp_mb();
return 0;
}
}
static inline void
__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
{
smp_mb();
if (unlikely(atomic_inc_return(count) <= 0))
fail_fn(count);
}
#define __mutex_slowpath_needs_to_unlock() 1
static inline int
__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
{
/*
* We have two variants here. The cmpxchg based one is the best one
* because it never induce a false contention state. It is included
* here because architectures using the inc/dec algorithms over the
* xchg ones are much more likely to support cmpxchg natively.
*
* If not we fall back to the spinlock based variant - that is
* just as efficient (and simpler) as a 'destructive' probing of
* the mutex state would be.
*/
#ifdef __HAVE_ARCH_CMPXCHG
if (likely(atomic_cmpxchg(count, 1, 0) == 1)) {
smp_mb();
return 1;
}
return 0;
#else
return fail_fn(count);
#endif
}
#endif
#endif

70
arch/blackfin/include/asm/pda.h Normal file
View File

@ -0,0 +1,70 @@
/*
* File: arch/blackfin/include/asm/pda.h
* Author: Philippe Gerum <rpm@xenomai.org>
*
* Copyright 2007 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _ASM_BLACKFIN_PDA_H
#define _ASM_BLACKFIN_PDA_H
#include <mach/anomaly.h>
#ifndef __ASSEMBLY__
struct blackfin_pda { /* Per-processor Data Area */
struct blackfin_pda *next;
unsigned long syscfg;
#ifdef CONFIG_SMP
unsigned long imask; /* Current IMASK value */
#endif
unsigned long *ipdt; /* Start of switchable I-CPLB table */
unsigned long *ipdt_swapcount; /* Number of swaps in ipdt */
unsigned long *dpdt; /* Start of switchable D-CPLB table */
unsigned long *dpdt_swapcount; /* Number of swaps in dpdt */
/*
* Single instructions can have multiple faults, which
* need to be handled by traps.c, in irq5. We store
* the exception cause to ensure we don't miss a
* double fault condition
*/
unsigned long ex_iptr;
unsigned long ex_optr;
unsigned long ex_buf[4];
unsigned long ex_imask; /* Saved imask from exception */
unsigned long *ex_stack; /* Exception stack space */
#ifdef ANOMALY_05000261
unsigned long last_cplb_fault_retx;
#endif
unsigned long dcplb_fault_addr;
unsigned long icplb_fault_addr;
unsigned long retx;
unsigned long seqstat;
};
extern struct blackfin_pda cpu_pda[];
void reserve_pda(void);
#endif /* __ASSEMBLY__ */
#endif /* _ASM_BLACKFIN_PDA_H */

12
arch/blackfin/include/asm/percpu.h
View File

@ -3,4 +3,14 @@
#include <asm-generic/percpu.h>
#endif /* __ARCH_BLACKFIN_PERCPU__ */
#ifdef CONFIG_MODULES
#define PERCPU_MODULE_RESERVE 8192
#else
#define PERCPU_MODULE_RESERVE 0
#endif
#define PERCPU_ENOUGH_ROOM \
(ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
PERCPU_MODULE_RESERVE)
#endif /* __ARCH_BLACKFIN_PERCPU__ */

1
arch/blackfin/include/asm/pgtable.h
View File

@ -29,6 +29,7 @@ typedef pte_t *pte_addr_t;
#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
#define pgprot_noncached(prot) (prot)
extern void paging_init(void);

28
arch/blackfin/include/asm/processor.h
View File

@ -24,6 +24,14 @@ static inline void wrusp(unsigned long usp)
__asm__ __volatile__("usp = %0;\n\t"::"da"(usp));
}
static inline unsigned long __get_SP(void)
{
unsigned long sp;
__asm__ __volatile__("%0 = sp;\n\t" : "=da"(sp));
return sp;
}
/*
* User space process size: 1st byte beyond user address space.
* Fairly meaningless on nommu. Parts of user programs can be scattered
@ -57,6 +65,7 @@ struct thread_struct {
* pass the data segment into user programs if it exists,
* it can't hurt anything as far as I can tell
*/
#ifndef CONFIG_SMP
#define start_thread(_regs, _pc, _usp) \
do { \
set_fs(USER_DS); \
@ -70,6 +79,16 @@ do { \
sizeof(*L1_SCRATCH_TASK_INFO)); \
wrusp(_usp); \
} while(0)
#else
#define start_thread(_regs, _pc, _usp) \
do { \
set_fs(USER_DS); \
(_regs)->pc = (_pc); \
if (current->mm) \
(_regs)->p5 = current->mm->start_data; \
wrusp(_usp); \
} while (0)
#endif
/* Forward declaration, a strange C thing */
struct task_struct;
@ -106,7 +125,8 @@ unsigned long get_wchan(struct task_struct *p);
eip; })
#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp)
#define cpu_relax() barrier()
#define cpu_relax() smp_mb()
/* Get the Silicon Revision of the chip */
static inline uint32_t __pure bfin_revid(void)
@ -137,7 +157,11 @@ static inline uint32_t __pure bfin_revid(void)
static inline uint16_t __pure bfin_cpuid(void)
{
return (bfin_read_CHIPID() & CHIPID_FAMILY) >> 12;
}
static inline uint32_t __pure bfin_dspid(void)
{
return bfin_read_DSPID();
}
static inline uint32_t __pure bfin_compiled_revid(void)
@ -154,6 +178,8 @@ static inline uint32_t __pure bfin_compiled_revid(void)
return 4;
#elif defined(CONFIG_BF_REV_0_5)
return 5;
#elif defined(CONFIG_BF_REV_0_6)
return 6;
#elif defined(CONFIG_BF_REV_ANY)
return 0xffff;
#else

4
arch/blackfin/include/asm/reboot.h
View File

@ -1,7 +1,7 @@
/*
* include/asm-blackfin/reboot.h - shutdown/reboot header
* reboot.h - shutdown/reboot header
*
* Copyright 2004-2007 Analog Devices Inc.
* Copyright 2004-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/

6
arch/blackfin/include/asm/rwlock.h Normal file
View File

@ -0,0 +1,6 @@
#ifndef _ASM_BLACKFIN_RWLOCK_H
#define _ASM_BLACKFIN_RWLOCK_H
#define RW_LOCK_BIAS 0x01000000
#endif

1
arch/blackfin/include/asm/serial.h
View File

@ -3,3 +3,4 @@
*/
#define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH
#define BASE_BAUD (1843200 / 16)

44
arch/blackfin/include/asm/smp.h Normal file
View File

@ -0,0 +1,44 @@
/*
* File: arch/blackfin/include/asm/smp.h
* Author: Philippe Gerum <rpm@xenomai.org>
*
* Copyright 2007 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __ASM_BLACKFIN_SMP_H
#define __ASM_BLACKFIN_SMP_H
#include <linux/kernel.h>
#include <linux/threads.h>
#include <linux/cpumask.h>
#include <linux/cache.h>
#include <asm/blackfin.h>
#include <mach/smp.h>
#define raw_smp_processor_id() blackfin_core_id()
extern char coreb_trampoline_start, coreb_trampoline_end;
struct corelock_slot {
int lock;
};
void smp_icache_flush_range_others(unsigned long start,
unsigned long end);
#endif /* !__ASM_BLACKFIN_SMP_H */

87
arch/blackfin/include/asm/spinlock.h
View File

@ -1,6 +1,89 @@
#ifndef __BFIN_SPINLOCK_H
#define __BFIN_SPINLOCK_H
#error blackfin architecture does not support SMP spin lock yet
#include <asm/atomic.h>
#endif
asmlinkage int __raw_spin_is_locked_asm(volatile int *ptr);
asmlinkage void __raw_spin_lock_asm(volatile int *ptr);
asmlinkage int __raw_spin_trylock_asm(volatile int *ptr);
asmlinkage void __raw_spin_unlock_asm(volatile int *ptr);
asmlinkage void __raw_read_lock_asm(volatile int *ptr);
asmlinkage int __raw_read_trylock_asm(volatile int *ptr);
asmlinkage void __raw_read_unlock_asm(volatile int *ptr);
asmlinkage void __raw_write_lock_asm(volatile int *ptr);
asmlinkage int __raw_write_trylock_asm(volatile int *ptr);
asmlinkage void __raw_write_unlock_asm(volatile int *ptr);
static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
{
return __raw_spin_is_locked_asm(&lock->lock);
}
static inline void __raw_spin_lock(raw_spinlock_t *lock)
{
__raw_spin_lock_asm(&lock->lock);
}
#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
static inline int __raw_spin_trylock(raw_spinlock_t *lock)
{
return __raw_spin_trylock_asm(&lock->lock);
}
static inline void __raw_spin_unlock(raw_spinlock_t *lock)
{
__raw_spin_unlock_asm(&lock->lock);
}
static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
{
while (__raw_spin_is_locked(lock))
cpu_relax();
}
static inline int __raw_read_can_lock(raw_rwlock_t *rw)
{
return __raw_uncached_fetch_asm(&rw->lock) > 0;
}
static inline int __raw_write_can_lock(raw_rwlock_t *rw)
{
return __raw_uncached_fetch_asm(&rw->lock) == RW_LOCK_BIAS;
}
static inline void __raw_read_lock(raw_rwlock_t *rw)
{
__raw_read_lock_asm(&rw->lock);
}
static inline int __raw_read_trylock(raw_rwlock_t *rw)
{
return __raw_read_trylock_asm(&rw->lock);
}
static inline void __raw_read_unlock(raw_rwlock_t *rw)
{
__raw_read_unlock_asm(&rw->lock);
}
static inline void __raw_write_lock(raw_rwlock_t *rw)
{
__raw_write_lock_asm(&rw->lock);
}
static inline int __raw_write_trylock(raw_rwlock_t *rw)
{
return __raw_write_trylock_asm(&rw->lock);
}
static inline void __raw_write_unlock(raw_rwlock_t *rw)
{
__raw_write_unlock_asm(&rw->lock);
}
#define _raw_spin_relax(lock) cpu_relax()
#define _raw_read_relax(lock) cpu_relax()
#define _raw_write_relax(lock) cpu_relax()
#endif /* !__BFIN_SPINLOCK_H */

22
arch/blackfin/include/asm/spinlock_types.h Normal file
View File

@ -0,0 +1,22 @@
#ifndef __ASM_SPINLOCK_TYPES_H
#define __ASM_SPINLOCK_TYPES_H
#ifndef __LINUX_SPINLOCK_TYPES_H
# error "please don't include this file directly"
#endif
#include <asm/rwlock.h>
typedef struct {
volatile unsigned int lock;
} raw_spinlock_t;
#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
typedef struct {
volatile unsigned int lock;
} raw_rwlock_t;
#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
#endif

197
arch/blackfin/include/asm/system.h
View File

@ -37,114 +37,98 @@
#include <linux/linkage.h>
#include <linux/compiler.h>
#include <mach/anomaly.h>
/*
* Interrupt configuring macros.
*/
extern unsigned long irq_flags;
#define local_irq_enable() \
__asm__ __volatile__( \
"sti %0;" \
: \
: "d" (irq_flags) \
)
#define local_irq_disable() \
do { \
int __tmp_dummy; \
__asm__ __volatile__( \
"cli %0;" \
: "=d" (__tmp_dummy) \
); \
} while (0)
#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
# define NOP_PAD_ANOMALY_05000244 "nop; nop;"
#else
# define NOP_PAD_ANOMALY_05000244
#endif
#define idle_with_irq_disabled() \
__asm__ __volatile__( \
NOP_PAD_ANOMALY_05000244 \
".align 8;" \
"sti %0;" \
"idle;" \
: \
: "d" (irq_flags) \
)
#ifdef CONFIG_DEBUG_HWERR
# define __save_and_cli(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %1;" \
: "=&d" (x) \
: "d" (0x3F) \
)
#else
# define __save_and_cli(x) \
__asm__ __volatile__( \
"cli %0;" \
: "=&d" (x) \
)
#endif
#define local_save_flags(x) \
__asm__ __volatile__( \
"cli %0;" \
"sti %0;" \
: "=d" (x) \
)
#ifdef CONFIG_DEBUG_HWERR
#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
#else
#define irqs_enabled_from_flags(x) ((x) != 0x1f)
#endif
#define local_irq_restore(x) \
do { \
if (irqs_enabled_from_flags(x)) \
local_irq_enable(); \
} while (0)
/* For spinlocks etc */
#define local_irq_save(x) __save_and_cli(x)
#define irqs_disabled() \
({ \
unsigned long flags; \
local_save_flags(flags); \
!irqs_enabled_from_flags(flags); \
})
#include <asm/pda.h>
#include <asm/processor.h>
#include <asm/irq.h>
/*
* Force strict CPU ordering.
*/
#define nop() asm volatile ("nop;\n\t"::)
#define mb() asm volatile ("" : : :"memory")
#define rmb() asm volatile ("" : : :"memory")
#define wmb() asm volatile ("" : : :"memory")
#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
#define mb() __asm__ __volatile__ ("" : : : "memory")
#define rmb() __asm__ __volatile__ ("" : : : "memory")
#define wmb() __asm__ __volatile__ ("" : : : "memory")
#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
#define read_barrier_depends() do { } while(0)
#ifdef CONFIG_SMP
#define smp_mb() mb()
#define smp_rmb() rmb()
#define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
unsigned long new, unsigned long old);
asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
unsigned long new, unsigned long old);
asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
unsigned long new, unsigned long old);
#ifdef __ARCH_SYNC_CORE_DCACHE
# define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
# define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
# define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
#define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
#else
# define smp_mb() barrier()
# define smp_rmb() barrier()
# define smp_wmb() barrier()
#define smp_read_barrier_depends() barrier()
#endif
static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
int size)
{
unsigned long tmp;
switch (size) {
case 1:
tmp = __raw_xchg_1_asm(ptr, x);
break;
case 2:
tmp = __raw_xchg_2_asm(ptr, x);
break;
case 4:
tmp = __raw_xchg_4_asm(ptr, x);
break;
}
return tmp;
}
/*
* Atomic compare and exchange. Compare OLD with MEM, if identical,
* store NEW in MEM. Return the initial value in MEM. Success is
* indicated by comparing RETURN with OLD.
*/
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
unsigned long new, int size)
{
unsigned long tmp;
switch (size) {
case 1:
tmp = __raw_cmpxchg_1_asm(ptr, new, old);
break;
case 2:
tmp = __raw_cmpxchg_2_asm(ptr, new, old);
break;
case 4:
tmp = __raw_cmpxchg_4_asm(ptr, new, old);
break;
}
return tmp;
}
#define cmpxchg(ptr, o, n) \
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
(unsigned long)(n), sizeof(*(ptr))))
#else /* !CONFIG_SMP */
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while(0)
#endif
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
struct __xchg_dummy {
unsigned long a[100];
@ -157,7 +141,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
unsigned long tmp = 0;
unsigned long flags = 0;
local_irq_save(flags);
local_irq_save_hw(flags);
switch (size) {
case 1:
@ -179,7 +163,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
break;
}
local_irq_restore(flags);
local_irq_restore_hw(flags);
return tmp;
}
@ -194,9 +178,12 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
(unsigned long)(n), sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
#ifndef CONFIG_SMP
#include <asm-generic/cmpxchg.h>
#endif
#endif /* !CONFIG_SMP */
#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
#define tas(ptr) ((void)xchg((ptr), 1))
#define prepare_to_switch() do { } while(0)
@ -205,10 +192,12 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
* ptr isn't the current task, in which case it does nothing.
*/
#include <asm/blackfin.h>
#include <asm/l1layout.h>
#include <asm/mem_map.h>
asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
#ifndef CONFIG_SMP
#define switch_to(prev,next,last) \
do { \
memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
@ -217,5 +206,11 @@ do { \
sizeof *L1_SCRATCH_TASK_INFO); \
(last) = resume (prev, next); \
} while (0)
#else
#define switch_to(prev, next, last) \
do { \
(last) = resume(prev, next); \
} while (0)
#endif
#endif /* _BLACKFIN_SYSTEM_H */
#endif /* _BLACKFIN_SYSTEM_H */

5
arch/blackfin/include/asm/thread_info.h
View File

@ -44,6 +44,7 @@
*/
#define THREAD_SIZE_ORDER 1
#define THREAD_SIZE 8192 /* 2 pages */
#define STACK_WARN (THREAD_SIZE/8)
#ifndef __ASSEMBLY__
@ -62,7 +63,9 @@ struct thread_info {
int preempt_count; /* 0 => preemptable, <0 => BUG */
mm_segment_t addr_limit; /* address limit */
struct restart_block restart_block;
#ifndef CONFIG_SMP
struct l1_scratch_task_info l1_task_info;
#endif
};
/*
@ -90,7 +93,7 @@ __attribute_const__
static inline struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
__asm__("%0 = sp;": "=&d"(ti):
__asm__("%0 = sp;" : "=da"(ti) :
);
return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
}

89
arch/blackfin/include/asm/uaccess.h
View File

@ -149,54 +149,42 @@ static inline int bad_user_access_length(void)
: /* no outputs */ \
:"d" (x),"a" (__ptr(p)) : "memory")
#define get_user(x,p) \
({ \
int _err = 0; \
typeof(*(p)) *_p = (p); \
if (!access_ok(VERIFY_READ, _p, sizeof(*(_p)))) { \
_err = -EFAULT; \
} \
else { \
switch (sizeof(*(_p))) { \
case 1: \
__get_user_asm(x, _p, B,(Z)); \
break; \
case 2: \
__get_user_asm(x, _p, W,(Z)); \
break; \
case 4: \
__get_user_asm(x, _p, , ); \
break; \
case 8: { \
unsigned long _xl, _xh; \
__get_user_asm(_xl, ((unsigned long *)_p)+0, , ); \
__get_user_asm(_xh, ((unsigned long *)_p)+1, , ); \
((unsigned long *)&x)[0] = _xl; \
((unsigned long *)&x)[1] = _xh; \
} break; \
default: \
x = 0; \
printk(KERN_INFO "get_user_bad: %s:%d %s\n", \
__FILE__, __LINE__, __func__); \
_err = __get_user_bad(); \
break; \
} \
} \
_err; \
})
#define get_user(x, ptr) \
({ \
int _err = 0; \
unsigned long _val = 0; \
const typeof(*(ptr)) __user *_p = (ptr); \
const size_t ptr_size = sizeof(*(_p)); \
if (likely(access_ok(VERIFY_READ, _p, ptr_size))) { \
BUILD_BUG_ON(ptr_size >= 8); \
switch (ptr_size) { \
case 1: \
__get_user_asm(_val, _p, B,(Z)); \
break; \
case 2: \
__get_user_asm(_val, _p, W,(Z)); \
break; \
case 4: \
__get_user_asm(_val, _p, , ); \
break; \
} \
} else \
_err = -EFAULT; \
x = (typeof(*(ptr)))_val; \
_err; \
})
#define __get_user(x,p) get_user(x,p)
#define __get_user_bad() (bad_user_access_length(), (-EFAULT))
#define __get_user_asm(x,p,bhw,option) \
{ \
unsigned long _tmp; \
__asm__ ("%0 =" #bhw "[%1]"#option";\n\t" \
: "=d" (_tmp) \
: "a" (__ptr(p))); \
(x) = (__typeof__(*(p))) _tmp; \
}
#define __get_user_asm(x, ptr, bhw, option) \
({ \
__asm__ __volatile__ ( \
"%0 =" #bhw "[%1]" #option ";" \
: "=d" (x) \
: "a" (__ptr(ptr))); \
})
#define __copy_from_user(to, from, n) copy_from_user(to, from, n)
#define __copy_to_user(to, from, n) copy_to_user(to, from, n)
@ -209,8 +197,8 @@ static inline int bad_user_access_length(void)
#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n))\
return retval; })
static inline long copy_from_user(void *to,
const void __user * from, unsigned long n)
static inline unsigned long __must_check
copy_from_user(void *to, const void __user *from, unsigned long n)
{
if (access_ok(VERIFY_READ, from, n))
memcpy(to, from, n);
@ -219,8 +207,8 @@ static inline long copy_from_user(void *to,
return 0;
}
static inline long copy_to_user(void *to,
const void __user * from, unsigned long n)
static inline unsigned long __must_check
copy_to_user(void *to, const void __user *from, unsigned long n)
{
if (access_ok(VERIFY_WRITE, to, n))
memcpy(to, from, n);
@ -233,8 +221,8 @@ static inline long copy_to_user(void *to,
* Copy a null terminated string from userspace.
*/
static inline long strncpy_from_user(char *dst,
const char *src, long count)
static inline long __must_check
strncpy_from_user(char *dst, const char *src, long count)
{
char *tmp;
if (!access_ok(VERIFY_READ, src, 1))
@ -260,7 +248,8 @@ static inline long strnlen_user(const char *src, long n)
* Zero Userspace
*/
static inline unsigned long __clear_user(void *to, unsigned long n)
static inline unsigned long __must_check
__clear_user(void *to, unsigned long n)
{
memset(to, 0, n);
return 0;

1
arch/blackfin/include/asm/xor.h Normal file
View File

@ -0,0 +1 @@
#include <asm-generic/xor.h>

7
arch/blackfin/kernel/Makefile
View File

@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds
obj-y := \
entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
fixed_code.o reboot.o bfin_gpio.o
fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o
ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
obj-y += time-ts.o
@ -15,8 +15,11 @@ else
obj-y += time.o
endif
obj-$(CONFIG_IPIPE) += ipipe.o
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_KGDB_TESTCASE) += kgdb_test.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o

29
arch/blackfin/kernel/asm-offsets.c
View File

@ -56,6 +56,9 @@ int main(void)
/* offsets into the thread struct */
DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
@ -128,5 +131,31 @@ int main(void)
DEFINE(SIGSEGV, SIGSEGV);
DEFINE(SIGTRAP, SIGTRAP);
/* PDA management (in L1 scratchpad) */
DEFINE(PDA_SYSCFG, offsetof(struct blackfin_pda, syscfg));
#ifdef CONFIG_SMP
DEFINE(PDA_IRQFLAGS, offsetof(struct blackfin_pda, imask));
#endif
DEFINE(PDA_IPDT, offsetof(struct blackfin_pda, ipdt));
DEFINE(PDA_IPDT_SWAPCOUNT, offsetof(struct blackfin_pda, ipdt_swapcount));
DEFINE(PDA_DPDT, offsetof(struct blackfin_pda, dpdt));
DEFINE(PDA_DPDT_SWAPCOUNT, offsetof(struct blackfin_pda, dpdt_swapcount));
DEFINE(PDA_EXIPTR, offsetof(struct blackfin_pda, ex_iptr));
DEFINE(PDA_EXOPTR, offsetof(struct blackfin_pda, ex_optr));
DEFINE(PDA_EXBUF, offsetof(struct blackfin_pda, ex_buf));
DEFINE(PDA_EXIMASK, offsetof(struct blackfin_pda, ex_imask));
DEFINE(PDA_EXSTACK, offsetof(struct blackfin_pda, ex_stack));
#ifdef ANOMALY_05000261
DEFINE(PDA_LFRETX, offsetof(struct blackfin_pda, last_cplb_fault_retx));
#endif
DEFINE(PDA_DCPLB, offsetof(struct blackfin_pda, dcplb_fault_addr));
DEFINE(PDA_ICPLB, offsetof(struct blackfin_pda, icplb_fault_addr));
DEFINE(PDA_RETX, offsetof(struct blackfin_pda, retx));
DEFINE(PDA_SEQSTAT, offsetof(struct blackfin_pda, seqstat));
#ifdef CONFIG_SMP
/* Inter-core lock (in L2 SRAM) */
DEFINE(SIZEOF_CORELOCK, sizeof(struct corelock_slot));
#endif
return 0;
}

954
arch/blackfin/kernel/bfin_dma_5xx.c
View File

File diff suppressed because it is too large Load Diff

448
arch/blackfin/kernel/bfin_gpio.c
View File

@ -119,28 +119,28 @@ enum {
#define AWA_DUMMY_READ(...) do { } while (0)
#endif
#ifdef BF533_FAMILY
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
static struct gpio_port_t *gpio_bankb[] = {
(struct gpio_port_t *) FIO_FLAG_D,
};
#endif
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
static struct gpio_port_t *gpio_bankb[] = {
(struct gpio_port_t *) PORTFIO,
(struct gpio_port_t *) PORTGIO,
(struct gpio_port_t *) PORTHIO,
};
static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
static unsigned short *port_fer[] = {
(unsigned short *) PORTF_FER,
(unsigned short *) PORTG_FER,
(unsigned short *) PORTH_FER,
};
#endif
#ifdef BF527_FAMILY
static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
static unsigned short *port_mux[] = {
(unsigned short *) PORTF_MUX,
(unsigned short *) PORTG_MUX,
(unsigned short *) PORTH_MUX,
@ -155,7 +155,7 @@ u8 pmux_offset[][16] =
#endif
#ifdef BF561_FAMILY
static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
static struct gpio_port_t *gpio_bankb[] = {
(struct gpio_port_t *) FIO0_FLAG_D,
(struct gpio_port_t *) FIO1_FLAG_D,
(struct gpio_port_t *) FIO2_FLAG_D,
@ -163,7 +163,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
#endif
#ifdef BF548_FAMILY
static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
static struct gpio_port_t *gpio_array[] = {
(struct gpio_port_t *)PORTA_FER,
(struct gpio_port_t *)PORTB_FER,
(struct gpio_port_t *)PORTC_FER,
@ -177,8 +177,9 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
};
#endif
static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
#define RESOURCE_LABEL_SIZE 16
@ -188,48 +189,46 @@ static struct str_ident {
#if defined(CONFIG_PM)
#if defined(CONFIG_BF54x)
static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
#else
static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
static unsigned short wakeup_map[GPIO_BANK_NUM];
static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
#ifdef BF533_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB};
#endif
#ifdef BF537_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
#endif
#ifdef BF527_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
#ifdef BF538_FAMILY
static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB};
#endif
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
#endif
#ifdef BF561_FAMILY
static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
#endif
#endif
#endif /* CONFIG_PM */
#if defined(BF548_FAMILY)
inline int check_gpio(unsigned gpio)
{
#if defined(BF548_FAMILY)
if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
|| gpio == GPIO_PH14 || gpio == GPIO_PH15
|| gpio == GPIO_PJ14 || gpio == GPIO_PJ15
|| gpio >= MAX_BLACKFIN_GPIOS)
|| gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
return -EINVAL;
return 0;
}
#else
inline int check_gpio(unsigned gpio)
{
#endif
if (gpio >= MAX_BLACKFIN_GPIOS)
return -EINVAL;
return 0;
}
#endif
static void gpio_error(unsigned gpio)
{
@ -258,35 +257,30 @@ static int cmp_label(unsigned short ident, const char *label)
}
if (label)
return strncmp(str_ident[ident].name,
label, strlen(label));
return strcmp(str_ident[ident].name, label);
else
return -EINVAL;
}
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
static void port_setup(unsigned gpio, unsigned short usage)
{
if (!check_gpio(gpio)) {
if (usage == GPIO_USAGE)
*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
else
*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
SSYNC();
}
}
if (check_gpio(gpio))
return;
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
if (usage == GPIO_USAGE)
*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
else
*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
SSYNC();
#elif defined(BF548_FAMILY)
static void port_setup(unsigned gpio, unsigned short usage)
{
if (usage == GPIO_USAGE)
gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
else
gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
SSYNC();
}
#else
# define port_setup(...) do { } while (0)
#endif
}
#ifdef BF537_FAMILY
static struct {
@ -379,7 +373,7 @@ inline u16 get_portmux(unsigned short portno)
return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
}
#elif defined(BF527_FAMILY)
#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
inline void portmux_setup(unsigned short portno, unsigned short function)
{
u16 pmux, ident = P_IDENT(portno);
@ -428,13 +422,13 @@ arch_initcall(bfin_gpio_init);
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
{ \
unsigned long flags; \
local_irq_save(flags); \
local_irq_save_hw(flags); \
if (arg) \
gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
else \
gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
AWA_DUMMY_READ(name); \
local_irq_restore(flags); \
local_irq_restore_hw(flags); \
} \
EXPORT_SYMBOL(set_gpio_ ## name);
@ -450,13 +444,13 @@ SET_GPIO(both)
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
{ \
unsigned long flags; \
local_irq_save(flags); \
local_irq_save_hw(flags); \
if (arg) \
gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
else \
gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
AWA_DUMMY_READ(name); \
local_irq_restore(flags); \
local_irq_restore_hw(flags); \
} \
EXPORT_SYMBOL(set_gpio_ ## name);
#else
@ -479,10 +473,10 @@ SET_GPIO_SC(data)
void set_gpio_toggle(unsigned gpio)
{
unsigned long flags;
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
AWA_DUMMY_READ(toggle);
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
#else
void set_gpio_toggle(unsigned gpio)
@ -500,10 +494,10 @@ EXPORT_SYMBOL(set_gpio_toggle);
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
{ \
unsigned long flags; \
local_irq_save(flags); \
local_irq_save_hw(flags); \
gpio_bankb[gpio_bank(gpio)]->name = arg; \
AWA_DUMMY_READ(name); \
local_irq_restore(flags); \
local_irq_restore_hw(flags); \
} \
EXPORT_SYMBOL(set_gpiop_ ## name);
#else
@ -531,10 +525,10 @@ unsigned short get_gpio_ ## name(unsigned gpio) \
{ \
unsigned long flags; \
unsigned short ret; \
local_irq_save(flags); \
local_irq_save_hw(flags); \
ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
AWA_DUMMY_READ(name); \
local_irq_restore(flags); \
local_irq_restore_hw(flags); \
return ret; \
} \
EXPORT_SYMBOL(get_gpio_ ## name);
@ -564,10 +558,10 @@ unsigned short get_gpiop_ ## name(unsigned gpio) \
{ \
unsigned long flags; \
unsigned short ret; \
local_irq_save(flags); \
local_irq_save_hw(flags); \
ret = (gpio_bankb[gpio_bank(gpio)]->name); \
AWA_DUMMY_READ(name); \
local_irq_restore(flags); \
local_irq_restore_hw(flags); \
return ret; \
} \
EXPORT_SYMBOL(get_gpiop_ ## name);
@ -617,10 +611,10 @@ int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
if ((check_gpio(gpio) < 0) || !type)
return -EINVAL;
local_irq_save(flags);
local_irq_save_hw(flags);
wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
wakeup_flags_map[gpio] = type;
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
@ -633,11 +627,11 @@ void gpio_pm_wakeup_free(unsigned gpio)
if (check_gpio(gpio) < 0)
return;
local_irq_save(flags);
local_irq_save_hw(flags);
wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
EXPORT_SYMBOL(gpio_pm_wakeup_free);
@ -679,7 +673,7 @@ u32 bfin_pm_standby_setup(void)
gpio_bankb[bank]->maskb = 0;
if (mask) {
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
gpio_bank_saved[bank].fer = *port_fer[bank];
#endif
gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
@ -724,7 +718,7 @@ void bfin_pm_standby_restore(void)
bank = gpio_bank(i);
if (mask) {
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
*port_fer[bank] = gpio_bank_saved[bank].fer;
#endif
gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
@ -750,9 +744,9 @@ void bfin_gpio_pm_hibernate_suspend(void)
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
bank = gpio_bank(i);
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
gpio_bank_saved[bank].fer = *port_fer[bank];
#ifdef BF527_FAMILY
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
gpio_bank_saved[bank].mux = *port_mux[bank];
#else
if (bank == 0)
@ -778,8 +772,8 @@ void bfin_gpio_pm_hibernate_restore(void)
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
bank = gpio_bank(i);
#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
#ifdef BF527_FAMILY
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
*port_mux[bank] = gpio_bank_saved[bank].mux;
#else
if (bank == 0)
@ -873,7 +867,6 @@ EXPORT_SYMBOL(get_gpio_dir);
* MODIFICATION HISTORY :
**************************************************************/
#ifdef BF548_FAMILY
int peripheral_request(unsigned short per, const char *label)
{
unsigned long flags;
@ -889,31 +882,35 @@ int peripheral_request(unsigned short per, const char *label)
if (!(per & P_DEFINED))
return -ENODEV;
if (check_gpio(ident) < 0)
return -EINVAL;
local_irq_save_hw(flags);
local_irq_save(flags);
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
/* If a pin can be muxed as either GPIO or peripheral, make
* sure it is not already a GPIO pin when we request it.
*/
if (unlikely(!check_gpio(ident) &&
reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
dump_stack();
printk(KERN_ERR
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
__func__, ident, get_label(ident));
local_irq_restore(flags);
local_irq_restore_hw(flags);
return -EBUSY;
}
if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
u16 funct = get_portmux(ident);
/*
* Pin functions like AMC address strobes my
* be requested and used by several drivers
*/
if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
#ifdef BF548_FAMILY
u16 funct = get_portmux(ident);
if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
#else
if (!(per & P_MAYSHARE)) {
#endif
/*
* Allow that the identical pin function can
* be requested from the same driver twice
@ -926,7 +923,7 @@ int peripheral_request(unsigned short per, const char *label)
printk(KERN_ERR
"%s: Peripheral %d function %d is already reserved by %s !\n",
__func__, ident, P_FUNCT2MUX(per), get_label(ident));
local_irq_restore(flags);
local_irq_restore_hw(flags);
return -EBUSY;
}
}
@ -934,89 +931,19 @@ int peripheral_request(unsigned short per, const char *label)
anyway:
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
#ifdef BF548_FAMILY
portmux_setup(ident, P_FUNCT2MUX(per));
port_setup(ident, PERIPHERAL_USAGE);
local_irq_restore(flags);
set_label(ident, label);
return 0;
}
EXPORT_SYMBOL(peripheral_request);
#else
int peripheral_request(unsigned short per, const char *label)
{
unsigned long flags;
unsigned short ident = P_IDENT(per);
/*
* Don't cares are pins with only one dedicated function
*/
if (per & P_DONTCARE)
return 0;
if (!(per & P_DEFINED))
return -ENODEV;
local_irq_save(flags);
if (!check_gpio(ident)) {
if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
dump_stack();
printk(KERN_ERR
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
__func__, ident, get_label(ident));
local_irq_restore(flags);
return -EBUSY;
}
}
if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
/*
* Pin functions like AMC address strobes my
* be requested and used by several drivers
*/
if (!(per & P_MAYSHARE)) {
/*
* Allow that the identical pin function can
* be requested from the same driver twice
*/
if (cmp_label(ident, label) == 0)
goto anyway;
dump_stack();
printk(KERN_ERR
"%s: Peripheral %d function %d is already"
" reserved by %s !\n",
__func__, ident, P_FUNCT2MUX(per),
get_label(ident));
local_irq_restore(flags);
return -EBUSY;
}
}
anyway:
portmux_setup(per, P_FUNCT2MUX(per));
#endif
port_setup(ident, PERIPHERAL_USAGE);
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
local_irq_restore(flags);
local_irq_restore_hw(flags);
set_label(ident, label);
return 0;
}
EXPORT_SYMBOL(peripheral_request);
#endif
int peripheral_request_list(const unsigned short per[], const char *label)
{
@ -1053,10 +980,10 @@ void peripheral_free(unsigned short per)
if (check_gpio(ident) < 0)
return;
local_irq_save(flags);
local_irq_save_hw(flags);
if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
local_irq_restore(flags);
local_irq_restore_hw(flags);
return;
}
@ -1067,7 +994,7 @@ void peripheral_free(unsigned short per)
set_label(ident, "free");
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
EXPORT_SYMBOL(peripheral_free);
@ -1094,14 +1021,14 @@ EXPORT_SYMBOL(peripheral_free_list);
* MODIFICATION HISTORY :
**************************************************************/
int gpio_request(unsigned gpio, const char *label)
int bfin_gpio_request(unsigned gpio, const char *label)
{
unsigned long flags;
if (check_gpio(gpio) < 0)
return -EINVAL;
local_irq_save(flags);
local_irq_save_hw(flags);
/*
* Allow that the identical GPIO can
@ -1110,15 +1037,15 @@ int gpio_request(unsigned gpio, const char *label)
*/
if (cmp_label(gpio, label) == 0) {
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
dump_stack();
printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
gpio, get_label(gpio));
local_irq_restore(flags);
gpio, get_label(gpio));
local_irq_restore_hw(flags);
return -EBUSY;
}
if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
@ -1126,34 +1053,37 @@ int gpio_request(unsigned gpio, const char *label)
printk(KERN_ERR
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
gpio, get_label(gpio));
local_irq_restore(flags);
local_irq_restore_hw(flags);
return -EBUSY;
}
if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
" (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
set_label(gpio, label);
local_irq_restore(flags);
local_irq_restore_hw(flags);
port_setup(gpio, GPIO_USAGE);
set_label(gpio, label);
return 0;
}
EXPORT_SYMBOL(gpio_request);
EXPORT_SYMBOL(bfin_gpio_request);
void gpio_free(unsigned gpio)
void bfin_gpio_free(unsigned gpio)
{
unsigned long flags;
if (check_gpio(gpio) < 0)
return;
local_irq_save(flags);
local_irq_save_hw(flags);
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
dump_stack();
gpio_error(gpio);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return;
}
@ -1161,13 +1091,76 @@ void gpio_free(unsigned gpio)
set_label(gpio, "free");
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
EXPORT_SYMBOL(bfin_gpio_free);
int bfin_gpio_irq_request(unsigned gpio, const char *label)
{
unsigned long flags;
if (check_gpio(gpio) < 0)
return -EINVAL;
local_irq_save_hw(flags);
if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
dump_stack();
printk(KERN_ERR
"bfin-gpio: GPIO %d is already reserved as gpio-irq !\n",
gpio);
local_irq_restore_hw(flags);
return -EBUSY;
}
if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
dump_stack();
printk(KERN_ERR
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
gpio, get_label(gpio));
local_irq_restore_hw(flags);
return -EBUSY;
}
if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
"(Documentation/blackfin/bfin-gpio-notes.txt)\n",
gpio, get_label(gpio));
reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
set_label(gpio, label);
local_irq_restore_hw(flags);
port_setup(gpio, GPIO_USAGE);
return 0;
}
void bfin_gpio_irq_free(unsigned gpio)
{
unsigned long flags;
if (check_gpio(gpio) < 0)
return;
local_irq_save_hw(flags);
if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
dump_stack();
gpio_error(gpio);
local_irq_restore_hw(flags);
return;
}
reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
set_label(gpio, "free");
local_irq_restore_hw(flags);
}
EXPORT_SYMBOL(gpio_free);
#ifdef BF548_FAMILY
int gpio_direction_input(unsigned gpio)
int bfin_gpio_direction_input(unsigned gpio)
{
unsigned long flags;
@ -1176,16 +1169,16 @@ int gpio_direction_input(unsigned gpio)
return -EINVAL;
}
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
EXPORT_SYMBOL(gpio_direction_input);
EXPORT_SYMBOL(bfin_gpio_direction_input);
int gpio_direction_output(unsigned gpio, int value)
int bfin_gpio_direction_output(unsigned gpio, int value)
{
unsigned long flags;
@ -1194,30 +1187,30 @@ int gpio_direction_output(unsigned gpio, int value)
return -EINVAL;
}
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
gpio_set_value(gpio, value);
gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
EXPORT_SYMBOL(gpio_direction_output);
EXPORT_SYMBOL(bfin_gpio_direction_output);
void gpio_set_value(unsigned gpio, int arg)
void bfin_gpio_set_value(unsigned gpio, int arg)
{
if (arg)
gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
else
gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
}
EXPORT_SYMBOL(gpio_set_value);
EXPORT_SYMBOL(bfin_gpio_set_value);
int gpio_get_value(unsigned gpio)
int bfin_gpio_get_value(unsigned gpio)
{
return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
}
EXPORT_SYMBOL(gpio_get_value);
EXPORT_SYMBOL(bfin_gpio_get_value);
void bfin_gpio_irq_prepare(unsigned gpio)
{
@ -1225,34 +1218,34 @@ void bfin_gpio_irq_prepare(unsigned gpio)
port_setup(gpio, GPIO_USAGE);
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
#else
int gpio_get_value(unsigned gpio)
int bfin_gpio_get_value(unsigned gpio)
{
unsigned long flags;
int ret;
if (unlikely(get_gpio_edge(gpio))) {
local_irq_save(flags);
local_irq_save_hw(flags);
set_gpio_edge(gpio, 0);
ret = get_gpio_data(gpio);
set_gpio_edge(gpio, 1);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return ret;
} else
return get_gpio_data(gpio);
}
EXPORT_SYMBOL(gpio_get_value);
EXPORT_SYMBOL(bfin_gpio_get_value);
int gpio_direction_input(unsigned gpio)
int bfin_gpio_direction_input(unsigned gpio)
{
unsigned long flags;
@ -1261,17 +1254,17 @@ int gpio_direction_input(unsigned gpio)
return -EINVAL;
}
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
AWA_DUMMY_READ(inen);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
EXPORT_SYMBOL(gpio_direction_input);
EXPORT_SYMBOL(bfin_gpio_direction_input);
int gpio_direction_output(unsigned gpio, int value)
int bfin_gpio_direction_output(unsigned gpio, int value)
{
unsigned long flags;
@ -1280,7 +1273,7 @@ int gpio_direction_output(unsigned gpio, int value)
return -EINVAL;
}
local_irq_save(flags);
local_irq_save_hw(flags);
gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
if (value)
@ -1290,11 +1283,11 @@ int gpio_direction_output(unsigned gpio, int value)
gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
AWA_DUMMY_READ(dir);
local_irq_restore(flags);
local_irq_restore_hw(flags);
return 0;
}
EXPORT_SYMBOL(gpio_direction_output);
EXPORT_SYMBOL(bfin_gpio_direction_output);
/* If we are booting from SPI and our board lacks a strong enough pull up,
* the core can reset and execute the bootrom faster than the resistor can
@ -1327,14 +1320,17 @@ void bfin_gpio_irq_prepare(unsigned gpio)
static int gpio_proc_read(char *buf, char **start, off_t offset,
int len, int *unused_i, void *unused_v)
{
int c, outlen = 0;
int c, irq, gpio, outlen = 0;
for (c = 0; c < MAX_RESOURCES; c++) {
if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
if (!check_gpio(c) && (gpio || irq))
len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
get_label(c), (gpio && irq) ? " *" : "",
get_gpio_dir(c) ? "OUTPUT" : "INPUT");
else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
else
continue;
buf += len;
@ -1354,3 +1350,57 @@ static __init int gpio_register_proc(void)
}
__initcall(gpio_register_proc);
#endif
#ifdef CONFIG_GPIOLIB
int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
{
return bfin_gpio_direction_input(gpio);
}
int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
{
return bfin_gpio_direction_output(gpio, level);
}
int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
{
return bfin_gpio_get_value(gpio);
}
void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
{
#ifdef BF548_FAMILY
return bfin_gpio_set_value(gpio, value);
#else
return set_gpio_data(gpio, value);
#endif
}
int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
{
return bfin_gpio_request(gpio, chip->label);
}
void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
{
return bfin_gpio_free(gpio);
}
static struct gpio_chip bfin_chip = {
.label = "Blackfin-GPIOlib",
.direction_input = bfin_gpiolib_direction_input,
.get = bfin_gpiolib_get_value,
.direction_output = bfin_gpiolib_direction_output,
.set = bfin_gpiolib_set_value,
.request = bfin_gpiolib_gpio_request,
.free = bfin_gpiolib_gpio_free,
.base = 0,
.ngpio = MAX_BLACKFIN_GPIOS,
};
static int __init bfin_gpiolib_setup(void)
{
return gpiochip_add(&bfin_chip);
}
arch_initcall(bfin_gpiolib_setup);
#endif

101
arch/blackfin/kernel/bfin_ksyms.c
View File

@ -1,52 +1,25 @@
/*
* File: arch/blackfin/kernel/bfin_ksyms.c
* Based on: none - original work
* Author:
* arch/blackfin/kernel/bfin_ksyms.c - exports for random symbols
*
* Created:
* Description:
* Copyright 2004-2008 Analog Devices Inc.
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* Licensed under the GPL-2 or later.
*/
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/uaccess.h>
#include <asm/checksum.h>
#include <asm/cacheflush.h>
/* platform dependent support */
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(ip_fast_csum);
EXPORT_SYMBOL(kernel_thread);
EXPORT_SYMBOL(is_in_rom);
/* Allow people to have their own Blackfin exception handler in a module */
EXPORT_SYMBOL(bfin_return_from_exception);
/* Networking helper routines. */
EXPORT_SYMBOL(csum_partial_copy);
/* All the Blackfin cache functions: mach-common/cache.S */
EXPORT_SYMBOL(blackfin_dcache_invalidate_range);
EXPORT_SYMBOL(blackfin_icache_dcache_flush_range);
EXPORT_SYMBOL(blackfin_icache_flush_range);
EXPORT_SYMBOL(blackfin_dcache_flush_range);
EXPORT_SYMBOL(blackfin_dflush_page);
/* The following are special because they're not called
* explicitly (the C compiler generates them). Fortunately,
@ -74,8 +47,6 @@ extern void __modsi3(void);
extern void __muldi3(void);
extern void __udivsi3(void);
extern void __umodsi3(void);
/* gcc lib functions */
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__umulsi3_highpart);
@ -87,6 +58,7 @@ EXPORT_SYMBOL(__muldi3);
EXPORT_SYMBOL(__udivsi3);
EXPORT_SYMBOL(__umodsi3);
/* Input/output symbols: lib/{in,out}s.S */
EXPORT_SYMBOL(outsb);
EXPORT_SYMBOL(insb);
EXPORT_SYMBOL(outsw);
@ -96,20 +68,39 @@ EXPORT_SYMBOL(insw_8);
EXPORT_SYMBOL(outsl);
EXPORT_SYMBOL(insl);
EXPORT_SYMBOL(insl_16);
EXPORT_SYMBOL(irq_flags);
EXPORT_SYMBOL(iounmap);
EXPORT_SYMBOL(blackfin_dcache_invalidate_range);
EXPORT_SYMBOL(blackfin_icache_dcache_flush_range);
EXPORT_SYMBOL(blackfin_icache_flush_range);
EXPORT_SYMBOL(blackfin_dcache_flush_range);
EXPORT_SYMBOL(blackfin_dflush_page);
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(__init_begin);
EXPORT_SYMBOL(__init_end);
EXPORT_SYMBOL(_ebss_l1);
EXPORT_SYMBOL(_stext_l1);
EXPORT_SYMBOL(_etext_l1);
EXPORT_SYMBOL(_sdata_l1);
EXPORT_SYMBOL(_ebss_b_l1);
EXPORT_SYMBOL(_sdata_b_l1);
#ifdef CONFIG_SMP
EXPORT_SYMBOL(__raw_atomic_update_asm);
EXPORT_SYMBOL(__raw_atomic_clear_asm);
EXPORT_SYMBOL(__raw_atomic_set_asm);
EXPORT_SYMBOL(__raw_atomic_xor_asm);
EXPORT_SYMBOL(__raw_atomic_test_asm);
EXPORT_SYMBOL(__raw_xchg_1_asm);
EXPORT_SYMBOL(__raw_xchg_2_asm);
EXPORT_SYMBOL(__raw_xchg_4_asm);
EXPORT_SYMBOL(__raw_cmpxchg_1_asm);
EXPORT_SYMBOL(__raw_cmpxchg_2_asm);
EXPORT_SYMBOL(__raw_cmpxchg_4_asm);
EXPORT_SYMBOL(__raw_spin_is_locked_asm);
EXPORT_SYMBOL(__raw_spin_lock_asm);
EXPORT_SYMBOL(__raw_spin_trylock_asm);
EXPORT_SYMBOL(__raw_spin_unlock_asm);
EXPORT_SYMBOL(__raw_read_lock_asm);
EXPORT_SYMBOL(__raw_read_trylock_asm);
EXPORT_SYMBOL(__raw_read_unlock_asm);
EXPORT_SYMBOL(__raw_write_lock_asm);
EXPORT_SYMBOL(__raw_write_trylock_asm);
EXPORT_SYMBOL(__raw_write_unlock_asm);
EXPORT_SYMBOL(__raw_bit_set_asm);
EXPORT_SYMBOL(__raw_bit_clear_asm);
EXPORT_SYMBOL(__raw_bit_toggle_asm);
EXPORT_SYMBOL(__raw_bit_test_asm);
EXPORT_SYMBOL(__raw_bit_test_set_asm);
EXPORT_SYMBOL(__raw_bit_test_clear_asm);
EXPORT_SYMBOL(__raw_bit_test_toggle_asm);
EXPORT_SYMBOL(__raw_uncached_fetch_asm);
#ifdef __ARCH_SYNC_CORE_DCACHE
EXPORT_SYMBOL(__raw_smp_mark_barrier_asm);
EXPORT_SYMBOL(__raw_smp_check_barrier_asm);
#endif
#endif

6
arch/blackfin/kernel/cplb-mpu/Makefile
View File

@ -4,5 +4,7 @@
obj-y := cplbinit.o cacheinit.o cplbmgr.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
-ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
-ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
-ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3

4
arch/blackfin/kernel/cplb-mpu/cacheinit.c
View File

@ -25,7 +25,7 @@
#include <asm/cplbinit.h>
#if defined(CONFIG_BFIN_ICACHE)
void __init bfin_icache_init(void)
void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
{
unsigned long ctrl;
int i;
@ -43,7 +43,7 @@ void __init bfin_icache_init(void)
#endif
#if defined(CONFIG_BFIN_DCACHE)
void __init bfin_dcache_init(void)
void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
{
unsigned long ctrl;
int i;

136
arch/blackfin/kernel/cplb-mpu/cplbinfo.c
View File

@ -1,136 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbinfo.c
* Based on:
* Author: Sonic Zhang <sonic.zhang@analog.com>
*
* Created: Jan. 2005
* Description: Display CPLB status
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include <asm/current.h>
#include <asm/system.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched)
{
int i;
buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n");
for (i = 0; i < MAX_CPLBS; i++) {
unsigned long data = tbl[i].data;
unsigned long addr = tbl[i].addr;
if (!(data & CPLB_VALID))
continue;
buf +=
sprintf(buf,
"%d\t0x%08lx\t%06lx\t%s\t%c\t%c\t%c\t%c\n",
i, addr, data,
page_size_string_table[(data & 0x30000) >> 16],
(data & CPLB_USER_RD) ? 'Y' : 'N',
(data & CPLB_USER_WR) ? 'Y' : 'N',
(data & CPLB_SUPV_WR) ? 'Y' : 'N',
i < switched ? 'N' : 'Y');
}
buf += sprintf(buf, "\n");
return buf;
}
int cplbinfo_proc_output(char *buf)
{
char *p;
p = buf;
p += sprintf(p, "------------------ CPLB Information ------------------\n\n");
if (bfin_read_IMEM_CONTROL() & ENICPLB) {
p += sprintf(p, "Instruction CPLB entry:\n");
p = cplb_print_entry(p, icplb_tbl, first_switched_icplb);
} else
p += sprintf(p, "Instruction CPLB is disabled.\n\n");
if (1 || bfin_read_DMEM_CONTROL() & ENDCPLB) {
p += sprintf(p, "Data CPLB entry:\n");
p = cplb_print_entry(p, dcplb_tbl, first_switched_dcplb);
} else
p += sprintf(p, "Data CPLB is disabled.\n");
p += sprintf(p, "ICPLB miss: %d\nICPLB supervisor miss: %d\n",
nr_icplb_miss, nr_icplb_supv_miss);
p += sprintf(p, "DCPLB miss: %d\nDCPLB protection fault:%d\n",
nr_dcplb_miss, nr_dcplb_prot);
p += sprintf(p, "CPLB flushes: %d\n",
nr_cplb_flush);
return p - buf;
}
static int cplbinfo_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = cplbinfo_proc_output(page);
if (len <= off + count)
*eof = 1;
*start = page + off;
len -= off;
if (len > count)
len = count;
if (len < 0)
len = 0;
return len;
}
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *entry;
entry = create_proc_entry("cplbinfo", 0, NULL);
if (!entry)
return -ENOMEM;
entry->read_proc = cplbinfo_read_proc;
entry->data = NULL;
return 0;
}
static void __exit cplbinfo_exit(void)
{
remove_proc_entry("cplbinfo", NULL);
}
module_init(cplbinfo_init);
module_exit(cplbinfo_exit);

48
arch/blackfin/kernel/cplb-mpu/cplbinit.c
View File

@ -25,18 +25,19 @@
#include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h>
#include <asm/mem_map.h>
#if ANOMALY_05000263
# error the MPU will not function safely while Anomaly 05000263 applies
#endif
struct cplb_entry icplb_tbl[MAX_CPLBS];
struct cplb_entry dcplb_tbl[MAX_CPLBS];
struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];
struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];
int first_switched_icplb, first_switched_dcplb;
int first_mask_dcplb;
void __init generate_cplb_tables(void)
void __init generate_cplb_tables_cpu(unsigned int cpu)
{
int i_d, i_i;
unsigned long addr;
@ -55,15 +56,16 @@ void __init generate_cplb_tables(void)
d_cache |= CPLB_L1_AOW | CPLB_WT;
#endif
#endif
i_d = i_i = 0;
/* Set up the zero page. */
dcplb_tbl[i_d].addr = 0;
dcplb_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
dcplb_tbl[cpu][i_d].addr = 0;
dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
#if 0
icplb_tbl[i_i].addr = 0;
icplb_tbl[i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
icplb_tbl[cpu][i_i].addr = 0;
icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
#endif
/* Cover kernel memory with 4M pages. */
@ -72,28 +74,28 @@ void __init generate_cplb_tables(void)
i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB;
for (; addr < memory_start; addr += 4 * 1024 * 1024) {
dcplb_tbl[i_d].addr = addr;
dcplb_tbl[i_d++].data = d_data;
icplb_tbl[i_i].addr = addr;
icplb_tbl[i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
dcplb_tbl[cpu][i_d].addr = addr;
dcplb_tbl[cpu][i_d++].data = d_data;
icplb_tbl[cpu][i_i].addr = addr;
icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
}
/* Cover L1 memory. One 4M area for code and data each is enough. */
#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
dcplb_tbl[i_d].addr = L1_DATA_A_START;
dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu);
dcplb_tbl[cpu][i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
#endif
#if L1_CODE_LENGTH > 0
icplb_tbl[i_i].addr = L1_CODE_START;
icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
icplb_tbl[cpu][i_i].addr = get_l1_code_start_cpu(cpu);
icplb_tbl[cpu][i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
#endif
/* Cover L2 memory */
#if L2_LENGTH > 0
dcplb_tbl[i_d].addr = L2_START;
dcplb_tbl[i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB;
icplb_tbl[i_i].addr = L2_START;
icplb_tbl[i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB;
dcplb_tbl[cpu][i_d].addr = L2_START;
dcplb_tbl[cpu][i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB;
icplb_tbl[cpu][i_i].addr = L2_START;
icplb_tbl[cpu][i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB;
#endif
first_mask_dcplb = i_d;
@ -101,7 +103,11 @@ void __init generate_cplb_tables(void)
first_switched_icplb = i_i;
while (i_d < MAX_CPLBS)
dcplb_tbl[i_d++].data = 0;
dcplb_tbl[cpu][i_d++].data = 0;
while (i_i < MAX_CPLBS)
icplb_tbl[i_i++].data = 0;
icplb_tbl[cpu][i_i++].data = 0;
}
void generate_cplb_tables_all(void)
{
}

119
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
View File

@ -25,15 +25,21 @@
#include <asm/cplbinit.h>
#include <asm/mmu_context.h>
#define FAULT_RW (1 << 16)
#define FAULT_USERSUPV (1 << 17)
/*
* WARNING
*
* This file is compiled with certain -ffixed-reg options. We have to
* make sure not to call any functions here that could clobber these
* registers.
*/
int page_mask_nelts;
int page_mask_order;
unsigned long *current_rwx_mask;
unsigned long *current_rwx_mask[NR_CPUS];
int nr_dcplb_miss, nr_icplb_miss, nr_icplb_supv_miss, nr_dcplb_prot;
int nr_cplb_flush;
int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
int nr_cplb_flush[NR_CPUS];
static inline void disable_dcplb(void)
{
@ -98,42 +104,42 @@ static inline int write_permitted(int status, unsigned long data)
}
/* Counters to implement round-robin replacement. */
static int icplb_rr_index, dcplb_rr_index;
static int icplb_rr_index[NR_CPUS], dcplb_rr_index[NR_CPUS];
/*
* Find an ICPLB entry to be evicted and return its index.
*/
static int evict_one_icplb(void)
static int evict_one_icplb(unsigned int cpu)
{
int i;
for (i = first_switched_icplb; i < MAX_CPLBS; i++)
if ((icplb_tbl[i].data & CPLB_VALID) == 0)
if ((icplb_tbl[cpu][i].data & CPLB_VALID) == 0)
return i;
i = first_switched_icplb + icplb_rr_index;
i = first_switched_icplb + icplb_rr_index[cpu];
if (i >= MAX_CPLBS) {
i -= MAX_CPLBS - first_switched_icplb;
icplb_rr_index -= MAX_CPLBS - first_switched_icplb;
icplb_rr_index[cpu] -= MAX_CPLBS - first_switched_icplb;
}
icplb_rr_index++;
icplb_rr_index[cpu]++;
return i;
}
static int evict_one_dcplb(void)
static int evict_one_dcplb(unsigned int cpu)
{
int i;
for (i = first_switched_dcplb; i < MAX_CPLBS; i++)
if ((dcplb_tbl[i].data & CPLB_VALID) == 0)
if ((dcplb_tbl[cpu][i].data & CPLB_VALID) == 0)
return i;
i = first_switched_dcplb + dcplb_rr_index;
i = first_switched_dcplb + dcplb_rr_index[cpu];
if (i >= MAX_CPLBS) {
i -= MAX_CPLBS - first_switched_dcplb;
dcplb_rr_index -= MAX_CPLBS - first_switched_dcplb;
dcplb_rr_index[cpu] -= MAX_CPLBS - first_switched_dcplb;
}
dcplb_rr_index++;
dcplb_rr_index[cpu]++;
return i;
}
static noinline int dcplb_miss(void)
static noinline int dcplb_miss(unsigned int cpu)
{
unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
int status = bfin_read_DCPLB_STATUS();
@ -141,7 +147,7 @@ static noinline int dcplb_miss(void)
int idx;
unsigned long d_data;
nr_dcplb_miss++;
nr_dcplb_miss[cpu]++;
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
#ifdef CONFIG_BFIN_DCACHE
@ -168,25 +174,25 @@ static noinline int dcplb_miss(void)
} else if (addr >= _ramend) {
d_data |= CPLB_USER_RD | CPLB_USER_WR;
} else {
mask = current_rwx_mask;
mask = current_rwx_mask[cpu];
if (mask) {
int page = addr >> PAGE_SHIFT;
int offs = page >> 5;
int idx = page >> 5;
int bit = 1 << (page & 31);
if (mask[offs] & bit)
if (mask[idx] & bit)
d_data |= CPLB_USER_RD;
mask += page_mask_nelts;
if (mask[offs] & bit)
if (mask[idx] & bit)
d_data |= CPLB_USER_WR;
}
}
idx = evict_one_dcplb();
idx = evict_one_dcplb(cpu);
addr &= PAGE_MASK;
dcplb_tbl[idx].addr = addr;
dcplb_tbl[idx].data = d_data;
dcplb_tbl[cpu][idx].addr = addr;
dcplb_tbl[cpu][idx].data = d_data;
disable_dcplb();
bfin_write32(DCPLB_DATA0 + idx * 4, d_data);
@ -196,21 +202,21 @@ static noinline int dcplb_miss(void)
return 0;
}
static noinline int icplb_miss(void)
static noinline int icplb_miss(unsigned int cpu)
{
unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
int status = bfin_read_ICPLB_STATUS();
int idx;
unsigned long i_data;
nr_icplb_miss++;
nr_icplb_miss[cpu]++;
/* If inside the uncached DMA region, fault. */
if (addr >= _ramend - DMA_UNCACHED_REGION && addr < _ramend)
return CPLB_PROT_VIOL;
if (status & FAULT_USERSUPV)
nr_icplb_supv_miss++;
nr_icplb_supv_miss[cpu]++;
/*
* First, try to find a CPLB that matches this address. If we
@ -218,8 +224,8 @@ static noinline int icplb_miss(void)
* that the instruction crosses a page boundary.
*/
for (idx = first_switched_icplb; idx < MAX_CPLBS; idx++) {
if (icplb_tbl[idx].data & CPLB_VALID) {
unsigned long this_addr = icplb_tbl[idx].addr;
if (icplb_tbl[cpu][idx].data & CPLB_VALID) {
unsigned long this_addr = icplb_tbl[cpu][idx].addr;
if (this_addr <= addr && this_addr + PAGE_SIZE > addr) {
addr += PAGE_SIZE;
break;
@ -257,23 +263,23 @@ static noinline int icplb_miss(void)
* Otherwise, check the x bitmap of the current process.
*/
if (!(status & FAULT_USERSUPV)) {
unsigned long *mask = current_rwx_mask;
unsigned long *mask = current_rwx_mask[cpu];
if (mask) {
int page = addr >> PAGE_SHIFT;
int offs = page >> 5;
int idx = page >> 5;
int bit = 1 << (page & 31);
mask += 2 * page_mask_nelts;
if (mask[offs] & bit)
if (mask[idx] & bit)
i_data |= CPLB_USER_RD;
}
}
}
idx = evict_one_icplb();
idx = evict_one_icplb(cpu);
addr &= PAGE_MASK;
icplb_tbl[idx].addr = addr;
icplb_tbl[idx].data = i_data;
icplb_tbl[cpu][idx].addr = addr;
icplb_tbl[cpu][idx].data = i_data;
disable_icplb();
bfin_write32(ICPLB_DATA0 + idx * 4, i_data);
@ -283,19 +289,19 @@ static noinline int icplb_miss(void)
return 0;
}
static noinline int dcplb_protection_fault(void)
static noinline int dcplb_protection_fault(unsigned int cpu)
{
int status = bfin_read_DCPLB_STATUS();
nr_dcplb_prot++;
nr_dcplb_prot[cpu]++;
if (status & FAULT_RW) {
int idx = faulting_cplb_index(status);
unsigned long data = dcplb_tbl[idx].data;
unsigned long data = dcplb_tbl[cpu][idx].data;
if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) &&
write_permitted(status, data)) {
data |= CPLB_DIRTY;
dcplb_tbl[idx].data = data;
dcplb_tbl[cpu][idx].data = data;
bfin_write32(DCPLB_DATA0 + idx * 4, data);
return 0;
}
@ -306,44 +312,45 @@ static noinline int dcplb_protection_fault(void)
int cplb_hdr(int seqstat, struct pt_regs *regs)
{
int cause = seqstat & 0x3f;
unsigned int cpu = smp_processor_id();
switch (cause) {
case 0x23:
return dcplb_protection_fault();
return dcplb_protection_fault(cpu);
case 0x2C:
return icplb_miss();
return icplb_miss(cpu);
case 0x26:
return dcplb_miss();
return dcplb_miss(cpu);
default:
return 1;
}
}
void flush_switched_cplbs(void)
void flush_switched_cplbs(unsigned int cpu)
{
int i;
unsigned long flags;
nr_cplb_flush++;
nr_cplb_flush[cpu]++;
local_irq_save(flags);
local_irq_save_hw(flags);
disable_icplb();
for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
icplb_tbl[i].data = 0;
icplb_tbl[cpu][i].data = 0;
bfin_write32(ICPLB_DATA0 + i * 4, 0);
}
enable_icplb();
disable_dcplb();
for (i = first_switched_dcplb; i < MAX_CPLBS; i++) {
dcplb_tbl[i].data = 0;
dcplb_tbl[cpu][i].data = 0;
bfin_write32(DCPLB_DATA0 + i * 4, 0);
}
enable_dcplb();
local_irq_restore(flags);
local_irq_restore_hw(flags);
}
void set_mask_dcplbs(unsigned long *masks)
void set_mask_dcplbs(unsigned long *masks, unsigned int cpu)
{
int i;
unsigned long addr = (unsigned long)masks;
@ -351,12 +358,12 @@ void set_mask_dcplbs(unsigned long *masks)
unsigned long flags;
if (!masks) {
current_rwx_mask = masks;
current_rwx_mask[cpu] = masks;
return;
}
local_irq_save(flags);
current_rwx_mask = masks;
local_irq_save_hw(flags);
current_rwx_mask[cpu] = masks;
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
#ifdef CONFIG_BFIN_DCACHE
@ -368,12 +375,12 @@ void set_mask_dcplbs(unsigned long *masks)
disable_dcplb();
for (i = first_mask_dcplb; i < first_switched_dcplb; i++) {
dcplb_tbl[i].addr = addr;
dcplb_tbl[i].data = d_data;
dcplb_tbl[cpu][i].addr = addr;
dcplb_tbl[cpu][i].data = d_data;
bfin_write32(DCPLB_DATA0 + i * 4, d_data);
bfin_write32(DCPLB_ADDR0 + i * 4, addr);
addr += PAGE_SIZE;
}
enable_dcplb();
local_irq_restore(flags);
local_irq_restore_hw(flags);
}

8
arch/blackfin/kernel/cplb-nompu/Makefile
View File

@ -2,7 +2,9 @@
# arch/blackfin/kernel/cplb-nompu/Makefile
#
obj-y := cplbinit.o cacheinit.o cplbhdlr.o cplbmgr.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
obj-y := cplbinit.o cacheinit.o cplbmgr.o
CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
-ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
-ffixed-M0 -ffixed-M1 -ffixed-M2 -ffixed-M3 \
-ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3

25
arch/blackfin/kernel/cplb-nompu/cacheinit.c
View File

@ -25,19 +25,15 @@
#include <asm/cplbinit.h>
#if defined(CONFIG_BFIN_ICACHE)
void __init bfin_icache_init(void)
void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
{
unsigned long *table = icplb_table;
unsigned long ctrl;
int i;
SSYNC();
for (i = 0; i < MAX_CPLBS; i++) {
unsigned long addr = *table++;
unsigned long data = *table++;
if (addr == (unsigned long)-1)
break;
bfin_write32(ICPLB_ADDR0 + i * 4, addr);
bfin_write32(ICPLB_DATA0 + i * 4, data);
bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
}
ctrl = bfin_read_IMEM_CONTROL();
ctrl |= IMC | ENICPLB;
@ -47,20 +43,17 @@ void __init bfin_icache_init(void)
#endif
#if defined(CONFIG_BFIN_DCACHE)
void __init bfin_dcache_init(void)
void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
{
unsigned long *table = dcplb_table;
unsigned long ctrl;
int i;
SSYNC();
for (i = 0; i < MAX_CPLBS; i++) {
unsigned long addr = *table++;
unsigned long data = *table++;
if (addr == (unsigned long)-1)
break;
bfin_write32(DCPLB_ADDR0 + i * 4, addr);
bfin_write32(DCPLB_DATA0 + i * 4, data);
bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr);
bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data);
}
ctrl = bfin_read_DMEM_CONTROL();
ctrl |= DMEM_CNTR;
bfin_write_DMEM_CONTROL(ctrl);

130
arch/blackfin/kernel/cplb-nompu/cplbhdlr.S
View File

@ -1,130 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbhdlr.S
* Based on:
* Author: LG Soft India
*
* Created: ?
* Description: CPLB exception handler
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/linkage.h>
#include <asm/cplb.h>
#include <asm/entry.h>
#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
.section .l1.text
#else
.text
#endif
.type _cplb_mgr, STT_FUNC;
.type _panic_cplb_error, STT_FUNC;
.align 2
ENTRY(__cplb_hdr)
R2 = SEQSTAT;
/* Mask the contents of SEQSTAT and leave only EXCAUSE in R2 */
R2 <<= 26;
R2 >>= 26;
R1 = 0x23; /* Data access CPLB protection violation */
CC = R2 == R1;
IF !CC JUMP .Lnot_data_write;
R0 = 2; /* is a write to data space*/
JUMP .Lis_icplb_miss;
.Lnot_data_write:
R1 = 0x2C; /* CPLB miss on an instruction fetch */
CC = R2 == R1;
R0 = 0; /* is_data_miss == False*/
IF CC JUMP .Lis_icplb_miss;
R1 = 0x26;
CC = R2 == R1;
IF !CC JUMP .Lunknown;
R0 = 1; /* is_data_miss == True*/
.Lis_icplb_miss:
#if defined(CONFIG_BFIN_ICACHE) || defined(CONFIG_BFIN_DCACHE)
# if defined(CONFIG_BFIN_ICACHE) && !defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_ICACHE;
# endif
# if !defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_DCACHE;
# endif
# if defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE;
# endif
#else
R1 = 0;
#endif
[--SP] = RETS;
CALL _cplb_mgr;
RETS = [SP++];
CC = R0 == 0;
IF !CC JUMP .Lnot_replaced;
RTS;
/*
* Diagnostic exception handlers
*/
.Lunknown:
R0 = CPLB_UNKNOWN_ERR;
JUMP .Lcplb_error;
.Lnot_replaced:
CC = R0 == CPLB_NO_UNLOCKED;
IF !CC JUMP .Lnext_check;
R0 = CPLB_NO_UNLOCKED;
JUMP .Lcplb_error;
.Lnext_check:
CC = R0 == CPLB_NO_ADDR_MATCH;
IF !CC JUMP .Lnext_check2;
R0 = CPLB_NO_ADDR_MATCH;
JUMP .Lcplb_error;
.Lnext_check2:
CC = R0 == CPLB_PROT_VIOL;
IF !CC JUMP .Lstrange_return_from_cplb_mgr;
R0 = CPLB_PROT_VIOL;
JUMP .Lcplb_error;
.Lstrange_return_from_cplb_mgr:
IDLE;
CSYNC;
JUMP .Lstrange_return_from_cplb_mgr;
.Lcplb_error:
R1 = sp;
SP += -12;
call _panic_cplb_error;
SP += 12;
JUMP.L _handle_bad_cplb;
ENDPROC(__cplb_hdr)

195
arch/blackfin/kernel/cplb-nompu/cplbinfo.c
View File

@ -1,195 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbinfo.c
* Based on:
* Author: Sonic Zhang <sonic.zhang@analog.com>
*
* Created: Jan. 2005
* Description: Display CPLB status
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
#define CPLB_I 1
#define CPLB_D 2
#define SYNC_SYS SSYNC()
#define SYNC_CORE CSYNC()
#define CPLB_BIT_PAGESIZE 0x30000
static int page_size_table[4] = {
0x00000400, /* 1K */
0x00001000, /* 4K */
0x00100000, /* 1M */
0x00400000 /* 4M */
};
static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
static int cplb_find_entry(unsigned long *cplb_addr,
unsigned long *cplb_data, unsigned long addr,
unsigned long data)
{
int ii;
for (ii = 0; ii < 16; ii++)
if (addr >= cplb_addr[ii] && addr < cplb_addr[ii] +
page_size_table[(cplb_data[ii] & CPLB_BIT_PAGESIZE) >> 16]
&& (cplb_data[ii] == data))
return ii;
return -1;
}
static char *cplb_print_entry(char *buf, int type)
{
unsigned long *p_addr = dpdt_table;
unsigned long *p_data = dpdt_table + 1;
unsigned long *p_icount = dpdt_swapcount_table;
unsigned long *p_ocount = dpdt_swapcount_table + 1;
unsigned long *cplb_addr = (unsigned long *)DCPLB_ADDR0;
unsigned long *cplb_data = (unsigned long *)DCPLB_DATA0;
int entry = 0, used_cplb = 0;
if (type == CPLB_I) {
buf += sprintf(buf, "Instruction CPLB entry:\n");
p_addr = ipdt_table;
p_data = ipdt_table + 1;
p_icount = ipdt_swapcount_table;
p_ocount = ipdt_swapcount_table + 1;
cplb_addr = (unsigned long *)ICPLB_ADDR0;
cplb_data = (unsigned long *)ICPLB_DATA0;
} else
buf += sprintf(buf, "Data CPLB entry:\n");
buf += sprintf(buf, "Address\t\tData\tSize\tValid\tLocked\tSwapin\tiCount\toCount\n");
while (*p_addr != 0xffffffff) {
entry = cplb_find_entry(cplb_addr, cplb_data, *p_addr, *p_data);
if (entry >= 0)
used_cplb |= 1 << entry;
buf +=
sprintf(buf,
"0x%08lx\t0x%05lx\t%s\t%c\t%c\t%2d\t%ld\t%ld\n",
*p_addr, *p_data,
page_size_string_table[(*p_data & 0x30000) >> 16],
(*p_data & CPLB_VALID) ? 'Y' : 'N',
(*p_data & CPLB_LOCK) ? 'Y' : 'N', entry, *p_icount,
*p_ocount);
p_addr += 2;
p_data += 2;
p_icount += 2;
p_ocount += 2;
}
if (used_cplb != 0xffff) {
buf += sprintf(buf, "Unused/mismatched CPLBs:\n");
for (entry = 0; entry < 16; entry++)
if (0 == ((1 << entry) & used_cplb)) {
int flags = cplb_data[entry];
buf +=
sprintf(buf,
"%2d: 0x%08lx\t0x%05x\t%s\t%c\t%c\n",
entry, cplb_addr[entry], flags,
page_size_string_table[(flags &
0x30000) >>
16],
(flags & CPLB_VALID) ? 'Y' : 'N',
(flags & CPLB_LOCK) ? 'Y' : 'N');
}
}
buf += sprintf(buf, "\n");
return buf;
}
static int cplbinfo_proc_output(char *buf)
{
char *p;
p = buf;
p += sprintf(p, "------------------ CPLB Information ------------------\n\n");
if (bfin_read_IMEM_CONTROL() & ENICPLB)
p = cplb_print_entry(p, CPLB_I);
else
p += sprintf(p, "Instruction CPLB is disabled.\n\n");
if (bfin_read_DMEM_CONTROL() & ENDCPLB)
p = cplb_print_entry(p, CPLB_D);
else
p += sprintf(p, "Data CPLB is disabled.\n");
return p - buf;
}
static int cplbinfo_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = cplbinfo_proc_output(page);
if (len <= off + count)
*eof = 1;
*start = page + off;
len -= off;
if (len > count)
len = count;
if (len < 0)
len = 0;
return len;
}
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *entry;
entry = create_proc_entry("cplbinfo", 0, NULL);
if (!entry)
return -ENOMEM;
entry->read_proc = cplbinfo_read_proc;
entry->data = NULL;
return 0;
}
static void __exit cplbinfo_exit(void)
{
remove_proc_entry("cplbinfo", NULL);
}
module_init(cplbinfo_init);
module_exit(cplbinfo_exit);

535
arch/blackfin/kernel/cplb-nompu/cplbinit.c
View File

@ -20,445 +20,152 @@
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h>
#include <asm/mem_map.h>
#define CPLB_MEM CONFIG_MAX_MEM_SIZE
struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS] PDT_ATTR;
struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS] PDT_ATTR;
/*
* Number of required data CPLB switchtable entries
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
* approx 16 for smaller 1MB page size CPLBs for allignment purposes
* 1 for L1 Data Memory
* possibly 1 for L2 Data Memory
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
* 1 for ASYNC Memory
*/
#define MAX_SWITCH_D_CPLBS (((CPLB_MEM / 4) + 16 + 1 + 1 + 1 \
+ ASYNC_MEMORY_CPLB_COVERAGE) * 2)
int first_switched_icplb PDT_ATTR;
int first_switched_dcplb PDT_ATTR;
/*
* Number of required instruction CPLB switchtable entries
* MEMSIZE / 4 (we mostly install 4M page size CPLBs
* approx 12 for smaller 1MB page size CPLBs for allignment purposes
* 1 for L1 Instruction Memory
* possibly 1 for L2 Instruction Memory
* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
*/
#define MAX_SWITCH_I_CPLBS (((CPLB_MEM / 4) + 12 + 1 + 1 + 1) * 2)
struct cplb_boundary dcplb_bounds[9] PDT_ATTR;
struct cplb_boundary icplb_bounds[7] PDT_ATTR;
int icplb_nr_bounds PDT_ATTR;
int dcplb_nr_bounds PDT_ATTR;
u_long icplb_table[MAX_CPLBS + 1];
u_long dcplb_table[MAX_CPLBS + 1];
#ifdef CONFIG_CPLB_SWITCH_TAB_L1
# define PDT_ATTR __attribute__((l1_data))
#else
# define PDT_ATTR
#endif
u_long ipdt_table[MAX_SWITCH_I_CPLBS + 1] PDT_ATTR;
u_long dpdt_table[MAX_SWITCH_D_CPLBS + 1] PDT_ATTR;
#ifdef CONFIG_CPLB_INFO
u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS] PDT_ATTR;
u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS] PDT_ATTR;
#endif
struct s_cplb {
struct cplb_tab init_i;
struct cplb_tab init_d;
struct cplb_tab switch_i;
struct cplb_tab switch_d;
};
#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
static struct cplb_desc cplb_data[] = {
{
.start = 0,
.end = SIZE_1K,
.psize = SIZE_1K,
.attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB,
.i_conf = SDRAM_OOPS,
.d_conf = SDRAM_OOPS,
#if defined(CONFIG_DEBUG_HUNT_FOR_ZERO)
.valid = 1,
#else
.valid = 0,
#endif
.name = "Zero Pointer Guard Page",
},
{
.start = L1_CODE_START,
.end = L1_CODE_START + L1_CODE_LENGTH,
.psize = SIZE_4M,
.attr = INITIAL_T | SWITCH_T | I_CPLB,
.i_conf = L1_IMEMORY,
.d_conf = 0,
.valid = 1,
.name = "L1 I-Memory",
},
{
.start = L1_DATA_A_START,
.end = L1_DATA_B_START + L1_DATA_B_LENGTH,
.psize = SIZE_4M,
.attr = INITIAL_T | SWITCH_T | D_CPLB,
.i_conf = 0,
.d_conf = L1_DMEMORY,
#if ((L1_DATA_A_LENGTH > 0) || (L1_DATA_B_LENGTH > 0))
.valid = 1,
#else
.valid = 0,
#endif
.name = "L1 D-Memory",
},
{
.start = 0,
.end = 0, /* dynamic */
.psize = 0,
.attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB,
.i_conf = SDRAM_IGENERIC,
.d_conf = SDRAM_DGENERIC,
.valid = 1,
.name = "Kernel Memory",
},
{
.start = 0, /* dynamic */
.end = 0, /* dynamic */
.psize = 0,
.attr = INITIAL_T | SWITCH_T | D_CPLB,
.i_conf = SDRAM_IGENERIC,
.d_conf = SDRAM_DNON_CHBL,
.valid = 1,
.name = "uClinux MTD Memory",
},
{
.start = 0, /* dynamic */
.end = 0, /* dynamic */
.psize = SIZE_1M,
.attr = INITIAL_T | SWITCH_T | D_CPLB,
.d_conf = SDRAM_DNON_CHBL,
.valid = 1,
.name = "Uncached DMA Zone",
},
{
.start = 0, /* dynamic */
.end = 0, /* dynamic */
.psize = 0,
.attr = SWITCH_T | D_CPLB,
.i_conf = 0, /* dynamic */
.d_conf = 0, /* dynamic */
.valid = 1,
.name = "Reserved Memory",
},
{
.start = ASYNC_BANK0_BASE,
.end = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE,
.psize = 0,
.attr = SWITCH_T | D_CPLB,
.d_conf = SDRAM_EBIU,
.valid = 1,
.name = "Asynchronous Memory Banks",
},
{
.start = L2_START,
.end = L2_START + L2_LENGTH,
.psize = SIZE_1M,
.attr = SWITCH_T | I_CPLB | D_CPLB,
.i_conf = L2_IMEMORY,
.d_conf = L2_DMEMORY,
.valid = (L2_LENGTH > 0),
.name = "L2 Memory",
},
{
.start = BOOT_ROM_START,
.end = BOOT_ROM_START + BOOT_ROM_LENGTH,
.psize = SIZE_1M,
.attr = SWITCH_T | I_CPLB | D_CPLB,
.i_conf = SDRAM_IGENERIC,
.d_conf = SDRAM_DGENERIC,
.valid = 1,
.name = "On-Chip BootROM",
},
};
static u16 __init lock_kernel_check(u32 start, u32 end)
void __init generate_cplb_tables_cpu(unsigned int cpu)
{
if (start >= (u32)_end || end <= (u32)_stext)
return 0;
int i_d, i_i;
unsigned long addr;
/* This cplb block overlapped with kernel area. */
return IN_KERNEL;
}
struct cplb_entry *d_tbl = dcplb_tbl[cpu];
struct cplb_entry *i_tbl = icplb_tbl[cpu];
static unsigned short __init
fill_cplbtab(struct cplb_tab *table,
unsigned long start, unsigned long end,
unsigned long block_size, unsigned long cplb_data)
{
int i;
printk(KERN_INFO "NOMPU: setting up cplb tables\n");
switch (block_size) {
case SIZE_4M:
i = 3;
break;
case SIZE_1M:
i = 2;
break;
case SIZE_4K:
i = 1;
break;
case SIZE_1K:
default:
i = 0;
break;
i_d = i_i = 0;
/* Set up the zero page. */
d_tbl[i_d].addr = 0;
d_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
/* Cover kernel memory with 4M pages. */
addr = 0;
for (; addr < memory_start; addr += 4 * 1024 * 1024) {
d_tbl[i_d].addr = addr;
d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB;
i_tbl[i_i].addr = addr;
i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
}
cplb_data = (cplb_data & ~(3 << 16)) | (i << 16);
while ((start < end) && (table->pos < table->size)) {
table->tab[table->pos++] = start;
if (lock_kernel_check(start, start + block_size) == IN_KERNEL)
table->tab[table->pos++] =
cplb_data | CPLB_LOCK | CPLB_DIRTY;
else
table->tab[table->pos++] = cplb_data;
start += block_size;
/* Cover L1 memory. One 4M area for code and data each is enough. */
if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
d_tbl[i_d].addr = L1_DATA_A_START;
d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
}
return 0;
i_tbl[i_i].addr = L1_CODE_START;
i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
first_switched_dcplb = i_d;
first_switched_icplb = i_i;
BUG_ON(first_switched_dcplb > MAX_CPLBS);
BUG_ON(first_switched_icplb > MAX_CPLBS);
while (i_d < MAX_CPLBS)
d_tbl[i_d++].data = 0;
while (i_i < MAX_CPLBS)
i_tbl[i_i++].data = 0;
}
static unsigned short __init
close_cplbtab(struct cplb_tab *table)
void __init generate_cplb_tables_all(void)
{
int i_d, i_i;
while (table->pos < table->size) {
table->tab[table->pos++] = 0;
table->tab[table->pos++] = 0; /* !CPLB_VALID */
}
return 0;
}
/* helper function */
static void __init
__fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
{
if (cplb_data[i].psize) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].i_conf);
} else {
#if defined(CONFIG_BFIN_ICACHE)
if (ANOMALY_05000263 && i == SDRAM_KERN) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
SIZE_4M,
cplb_data[i].i_conf);
} else
#endif
{
fill_cplbtab(t,
cplb_data[i].start,
a_start,
SIZE_1M,
cplb_data[i].i_conf);
fill_cplbtab(t,
a_start,
a_end,
SIZE_4M,
cplb_data[i].i_conf);
fill_cplbtab(t, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].i_conf);
}
}
}
static void __init
__fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
{
if (cplb_data[i].psize) {
fill_cplbtab(t,
cplb_data[i].start,
cplb_data[i].end,
cplb_data[i].psize,
cplb_data[i].d_conf);
} else {
fill_cplbtab(t,
cplb_data[i].start,
a_start, SIZE_1M,
cplb_data[i].d_conf);
fill_cplbtab(t, a_start,
a_end, SIZE_4M,
cplb_data[i].d_conf);
fill_cplbtab(t, a_end,
cplb_data[i].end,
SIZE_1M,
cplb_data[i].d_conf);
}
}
void __init generate_cplb_tables(void)
{
u16 i, j, process;
u32 a_start, a_end, as, ae, as_1m;
struct cplb_tab *t_i = NULL;
struct cplb_tab *t_d = NULL;
struct s_cplb cplb;
printk(KERN_INFO "NOMPU: setting up cplb tables for global access\n");
cplb.init_i.size = MAX_CPLBS;
cplb.init_d.size = MAX_CPLBS;
cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
cplb.switch_d.size = MAX_SWITCH_D_CPLBS;
cplb.init_i.pos = 0;
cplb.init_d.pos = 0;
cplb.switch_i.pos = 0;
cplb.switch_d.pos = 0;
cplb.init_i.tab = icplb_table;
cplb.init_d.tab = dcplb_table;
cplb.switch_i.tab = ipdt_table;
cplb.switch_d.tab = dpdt_table;
cplb_data[SDRAM_KERN].end = memory_end;
i_d = 0;
/* Normal RAM, including MTD FS. */
#ifdef CONFIG_MTD_UCLINUX
cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start;
cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size;
cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0;
# if defined(CONFIG_ROMFS_FS)
cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB;
/*
* The ROMFS_FS size is often not multiple of 1MB.
* This can cause multiple CPLB sets covering the same memory area.
* This will then cause multiple CPLB hit exceptions.
* Workaround: We ensure a contiguous memory area by extending the kernel
* memory section over the mtd section.
* For ROMFS_FS memory must be covered with ICPLBs anyways.
* So there is no difference between kernel and mtd memory setup.
*/
cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;;
cplb_data[SDRAM_RAM_MTD].valid = 0;
# endif
dcplb_bounds[i_d].eaddr = memory_mtd_start + mtd_size;
#else
cplb_data[SDRAM_RAM_MTD].valid = 0;
dcplb_bounds[i_d].eaddr = memory_end;
#endif
cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION;
cplb_data[SDRAM_DMAZ].end = _ramend;
cplb_data[RES_MEM].start = _ramend;
cplb_data[RES_MEM].end = physical_mem_end;
if (reserved_mem_dcache_on)
cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC;
else
cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL;
if (reserved_mem_icache_on)
cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC;
else
cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
for (i = ZERO_P; i < ARRAY_SIZE(cplb_data); ++i) {
if (!cplb_data[i].valid)
continue;
as_1m = cplb_data[i].start % SIZE_1M;
/* We need to make sure all sections are properly 1M aligned
* However between Kernel Memory and the Kernel mtd section, depending on the
* rootfs size, there can be overlapping memory areas.
*/
if (as_1m && i != L1I_MEM && i != L1D_MEM) {
#ifdef CONFIG_MTD_UCLINUX
if (i == SDRAM_RAM_MTD) {
if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
else
cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
} else
#endif
printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
cplb_data[i].name, cplb_data[i].start);
}
as = cplb_data[i].start % SIZE_4M;
ae = cplb_data[i].end % SIZE_4M;
if (as)
a_start = cplb_data[i].start + (SIZE_4M - (as));
else
a_start = cplb_data[i].start;
a_end = cplb_data[i].end - ae;
for (j = INITIAL_T; j <= SWITCH_T; j++) {
switch (j) {
case INITIAL_T:
if (cplb_data[i].attr & INITIAL_T) {
t_i = &cplb.init_i;
t_d = &cplb.init_d;
process = 1;
} else
process = 0;
break;
case SWITCH_T:
if (cplb_data[i].attr & SWITCH_T) {
t_i = &cplb.switch_i;
t_d = &cplb.switch_d;
process = 1;
} else
process = 0;
break;
default:
process = 0;
break;
}
if (!process)
continue;
if (cplb_data[i].attr & I_CPLB)
__fill_code_cplbtab(t_i, i, a_start, a_end);
if (cplb_data[i].attr & D_CPLB)
__fill_data_cplbtab(t_d, i, a_start, a_end);
}
dcplb_bounds[i_d++].data = SDRAM_DGENERIC;
/* DMA uncached region. */
if (DMA_UNCACHED_REGION) {
dcplb_bounds[i_d].eaddr = _ramend;
dcplb_bounds[i_d++].data = SDRAM_DNON_CHBL;
}
if (_ramend != physical_mem_end) {
/* Reserved memory. */
dcplb_bounds[i_d].eaddr = physical_mem_end;
dcplb_bounds[i_d++].data = (reserved_mem_dcache_on ?
SDRAM_DGENERIC : SDRAM_DNON_CHBL);
}
/* Addressing hole up to the async bank. */
dcplb_bounds[i_d].eaddr = ASYNC_BANK0_BASE;
dcplb_bounds[i_d++].data = 0;
/* ASYNC banks. */
dcplb_bounds[i_d].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE;
dcplb_bounds[i_d++].data = SDRAM_EBIU;
/* Addressing hole up to BootROM. */
dcplb_bounds[i_d].eaddr = BOOT_ROM_START;
dcplb_bounds[i_d++].data = 0;
/* BootROM -- largest one should be less than 1 meg. */
dcplb_bounds[i_d].eaddr = BOOT_ROM_START + (1 * 1024 * 1024);
dcplb_bounds[i_d++].data = SDRAM_DGENERIC;
if (L2_LENGTH) {
/* Addressing hole up to L2 SRAM. */
dcplb_bounds[i_d].eaddr = L2_START;
dcplb_bounds[i_d++].data = 0;
/* L2 SRAM. */
dcplb_bounds[i_d].eaddr = L2_START + L2_LENGTH;
dcplb_bounds[i_d++].data = L2_DMEMORY;
}
dcplb_nr_bounds = i_d;
BUG_ON(dcplb_nr_bounds > ARRAY_SIZE(dcplb_bounds));
/* close tables */
close_cplbtab(&cplb.init_i);
close_cplbtab(&cplb.init_d);
cplb.init_i.tab[cplb.init_i.pos] = -1;
cplb.init_d.tab[cplb.init_d.pos] = -1;
cplb.switch_i.tab[cplb.switch_i.pos] = -1;
cplb.switch_d.tab[cplb.switch_d.pos] = -1;
}
i_i = 0;
/* Normal RAM, including MTD FS. */
#ifdef CONFIG_MTD_UCLINUX
icplb_bounds[i_i].eaddr = memory_mtd_start + mtd_size;
#else
icplb_bounds[i_i].eaddr = memory_end;
#endif
icplb_bounds[i_i++].data = SDRAM_IGENERIC;
/* DMA uncached region. */
if (DMA_UNCACHED_REGION) {
icplb_bounds[i_i].eaddr = _ramend;
icplb_bounds[i_i++].data = 0;
}
if (_ramend != physical_mem_end) {
/* Reserved memory. */
icplb_bounds[i_i].eaddr = physical_mem_end;
icplb_bounds[i_i++].data = (reserved_mem_icache_on ?
SDRAM_IGENERIC : SDRAM_INON_CHBL);
}
/* Addressing hole up to BootROM. */
icplb_bounds[i_i].eaddr = BOOT_ROM_START;
icplb_bounds[i_i++].data = 0;
/* BootROM -- largest one should be less than 1 meg. */
icplb_bounds[i_i].eaddr = BOOT_ROM_START + (1 * 1024 * 1024);
icplb_bounds[i_i++].data = SDRAM_IGENERIC;
if (L2_LENGTH) {
/* Addressing hole up to L2 SRAM, including the async bank. */
icplb_bounds[i_i].eaddr = L2_START;
icplb_bounds[i_i++].data = 0;
/* L2 SRAM. */
icplb_bounds[i_i].eaddr = L2_START + L2_LENGTH;
icplb_bounds[i_i++].data = L2_IMEMORY;
}
icplb_nr_bounds = i_i;
BUG_ON(icplb_nr_bounds > ARRAY_SIZE(icplb_bounds));
}

646
arch/blackfin/kernel/cplb-nompu/cplbmgr.S
View File

@ -1,646 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbmgtr.S
* Based on:
* Author: LG Soft India
*
* Created: ?
* Description: CPLB replacement routine for CPLB mismatch
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* Usage: int _cplb_mgr(is_data_miss,int enable_cache)
* is_data_miss==2 => Mark as Dirty, write to the clean data page
* is_data_miss==1 => Replace a data CPLB.
* is_data_miss==0 => Replace an instruction CPLB.
*
* Returns:
* CPLB_RELOADED => Successfully updated CPLB table.
* CPLB_NO_UNLOCKED => All CPLBs are locked, so cannot be evicted.
* This indicates that the CPLBs in the configuration
* tablei are badly configured, as this should never
* occur.
* CPLB_NO_ADDR_MATCH => The address being accessed, that triggered the
* exception, is not covered by any of the CPLBs in
* the configuration table. The application is
* presumably misbehaving.
* CPLB_PROT_VIOL => The address being accessed, that triggered the
* exception, was not a first-write to a clean Write
* Back Data page, and so presumably is a genuine
* violation of the page's protection attributes.
* The application is misbehaving.
*/
#include <linux/linkage.h>
#include <asm/blackfin.h>
#include <asm/cplb.h>
#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
.section .l1.text
#else
.text
#endif
.align 2;
ENTRY(_cplb_mgr)
[--SP]=( R7:4,P5:3 );
CC = R0 == 2;
IF CC JUMP .Ldcplb_write;
CC = R0 == 0;
IF !CC JUMP .Ldcplb_miss_compare;
/* ICPLB Miss Exception. We need to choose one of the
* currently-installed CPLBs, and replace it with one
* from the configuration table.
*/
/* A multi-word instruction can cross a page boundary. This means the
* first part of the instruction can be in a valid page, but the
* second part is not, and hence generates the instruction miss.
* However, the fault address is for the start of the instruction,
* not the part that's in the bad page. Therefore, we have to check
* whether the fault address applies to a page that is already present
* in the table.
*/
P4.L = LO(ICPLB_FAULT_ADDR);
P4.H = HI(ICPLB_FAULT_ADDR);
P1 = 16;
P5.L = _page_size_table;
P5.H = _page_size_table;
P0.L = LO(ICPLB_DATA0);
P0.H = HI(ICPLB_DATA0);
R4 = [P4]; /* Get faulting address*/
R6 = 64; /* Advance past the fault address, which*/
R6 = R6 + R4; /* we'll use if we find a match*/
R3 = ((16 << 8) | 2); /* Extract mask, two bits at posn 16 */
R5 = 0;
.Lisearch:
R1 = [P0-0x100]; /* Address for this CPLB */
R0 = [P0++]; /* Info for this CPLB*/
CC = BITTST(R0,0); /* Is the CPLB valid?*/
IF !CC JUMP .Lnomatch; /* Skip it, if not.*/
CC = R4 < R1(IU); /* If fault address less than page start*/
IF CC JUMP .Lnomatch; /* then skip this one.*/
R2 = EXTRACT(R0,R3.L) (Z); /* Get page size*/
P1 = R2;
P1 = P5 + (P1<<2); /* index into page-size table*/
R2 = [P1]; /* Get the page size*/
R1 = R1 + R2; /* and add to page start, to get page end*/
CC = R4 < R1(IU); /* and see whether fault addr is in page.*/
IF !CC R4 = R6; /* If so, advance the address and finish loop.*/
IF !CC JUMP .Lisearch_done;
.Lnomatch:
/* Go around again*/
R5 += 1;
CC = BITTST(R5, 4); /* i.e CC = R5 >= 16*/
IF !CC JUMP .Lisearch;
.Lisearch_done:
I0 = R4; /* Fault address we'll search for*/
/* set up pointers */
P0.L = LO(ICPLB_DATA0);
P0.H = HI(ICPLB_DATA0);
/* The replacement procedure for ICPLBs */
P4.L = LO(IMEM_CONTROL);
P4.H = HI(IMEM_CONTROL);
/* Turn off CPLBs while we work, necessary according to HRM before
* modifying CPLB descriptors
*/
R5 = [P4]; /* Control Register*/
BITCLR(R5,ENICPLB_P);
CLI R1;
SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
.align 8;
[P4] = R5;
SSYNC;
STI R1;
R1 = -1; /* end point comparison */
R3 = 16; /* counter */
/* Search through CPLBs for first non-locked entry */
/* Overwrite it by moving everyone else up by 1 */
.Licheck_lock:
R0 = [P0++];
R3 = R3 + R1;
CC = R3 == R1;
IF CC JUMP .Lall_locked;
CC = BITTST(R0, 0); /* an invalid entry is good */
IF !CC JUMP .Lifound_victim;
CC = BITTST(R0,1); /* but a locked entry isn't */
IF CC JUMP .Licheck_lock;
.Lifound_victim:
#ifdef CONFIG_CPLB_INFO
R7 = [P0 - 0x104];
P2.L = _ipdt_table;
P2.H = _ipdt_table;
P3.L = _ipdt_swapcount_table;
P3.H = _ipdt_swapcount_table;
P3 += -4;
.Licount:
R2 = [P2]; /* address from config table */
P2 += 8;
P3 += 8;
CC = R2==-1;
IF CC JUMP .Licount_done;
CC = R7==R2;
IF !CC JUMP .Licount;
R7 = [P3];
R7 += 1;
[P3] = R7;
CSYNC;
.Licount_done:
#endif
LC0=R3;
LSETUP(.Lis_move,.Lie_move) LC0;
.Lis_move:
R0 = [P0];
[P0 - 4] = R0;
R0 = [P0 - 0x100];
[P0-0x104] = R0;
.Lie_move:
P0+=4;
/* Clear ICPLB_DATA15, in case we don't find a replacement
* otherwise, we would have a duplicate entry, and will crash
*/
R0 = 0;
[P0 - 4] = R0;
/* We've made space in the ICPLB table, so that ICPLB15
* is now free to be overwritten. Next, we have to determine
* which CPLB we need to install, from the configuration
* table. This is a matter of getting the start-of-page
* addresses and page-lengths from the config table, and
* determining whether the fault address falls within that
* range.
*/
P2.L = _ipdt_table;
P2.H = _ipdt_table;
#ifdef CONFIG_CPLB_INFO
P3.L = _ipdt_swapcount_table;
P3.H = _ipdt_swapcount_table;
P3 += -8;
#endif
P0.L = _page_size_table;
P0.H = _page_size_table;
/* Retrieve our fault address (which may have been advanced
* because the faulting instruction crossed a page boundary).
*/
R0 = I0;
/* An extraction pattern, to get the page-size bits from
* the CPLB data entry. Bits 16-17, so two bits at posn 16.
*/
R1 = ((16<<8)|2);
.Linext: R4 = [P2++]; /* address from config table */
R2 = [P2++]; /* data from config table */
#ifdef CONFIG_CPLB_INFO
P3 += 8;
#endif
CC = R4 == -1; /* End of config table*/
IF CC JUMP .Lno_page_in_table;
/* See if failed address > start address */
CC = R4 <= R0(IU);
IF !CC JUMP .Linext;
/* extract page size (17:16)*/
R3 = EXTRACT(R2, R1.L) (Z);
/* add page size to addr to get range */
P5 = R3;
P5 = P0 + (P5 << 2); /* scaled, for int access*/
R3 = [P5];
R3 = R3 + R4;
/* See if failed address < (start address + page size) */
CC = R0 < R3(IU);
IF !CC JUMP .Linext;
/* We've found a CPLB in the config table that covers
* the faulting address, so install this CPLB into the
* last entry of the table.
*/
P1.L = LO(ICPLB_DATA15); /* ICPLB_DATA15 */
P1.H = HI(ICPLB_DATA15);
[P1] = R2;
[P1-0x100] = R4;
#ifdef CONFIG_CPLB_INFO
R3 = [P3];
R3 += 1;
[P3] = R3;
#endif
/* P4 points to IMEM_CONTROL, and R5 contains its old
* value, after we disabled ICPLBS. Re-enable them.
*/
BITSET(R5,ENICPLB_P);
CLI R2;
SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
.align 8;
[P4] = R5;
SSYNC;
STI R2;
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
/* FAILED CASES*/
.Lno_page_in_table:
R0 = CPLB_NO_ADDR_MATCH;
JUMP .Lfail_ret;
.Lall_locked:
R0 = CPLB_NO_UNLOCKED;
JUMP .Lfail_ret;
.Lprot_violation:
R0 = CPLB_PROT_VIOL;
.Lfail_ret:
/* Make sure we turn protection/cache back on, even in the failing case */
BITSET(R5,ENICPLB_P);
CLI R2;
SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
.align 8;
[P4] = R5;
SSYNC;
STI R2;
( R7:4,P5:3 ) = [SP++];
RTS;
.Ldcplb_write:
/* if a DCPLB is marked as write-back (CPLB_WT==0), and
* it is clean (CPLB_DIRTY==0), then a write to the
* CPLB's page triggers a protection violation. We have to
* mark the CPLB as dirty, to indicate that there are
* pending writes associated with the CPLB.
*/
P4.L = LO(DCPLB_STATUS);
P4.H = HI(DCPLB_STATUS);
P3.L = LO(DCPLB_DATA0);
P3.H = HI(DCPLB_DATA0);
R5 = [P4];
/* A protection violation can be caused by more than just writes
* to a clean WB page, so we have to ensure that:
* - It's a write
* - to a clean WB page
* - and is allowed in the mode the access occurred.
*/
CC = BITTST(R5, 16); /* ensure it was a write*/
IF !CC JUMP .Lprot_violation;
/* to check the rest, we have to retrieve the DCPLB.*/
/* The low half of DCPLB_STATUS is a bit mask*/
R2 = R5.L (Z); /* indicating which CPLB triggered the event.*/
R3 = 30; /* so we can use this to determine the offset*/
R2.L = SIGNBITS R2;
R2 = R2.L (Z); /* into the DCPLB table.*/
R3 = R3 - R2;
P4 = R3;
P3 = P3 + (P4<<2);
R3 = [P3]; /* Retrieve the CPLB*/
/* Now we can check whether it's a clean WB page*/
CC = BITTST(R3, 14); /* 0==WB, 1==WT*/
IF CC JUMP .Lprot_violation;
CC = BITTST(R3, 7); /* 0 == clean, 1 == dirty*/
IF CC JUMP .Lprot_violation;
/* Check whether the write is allowed in the mode that was active.*/
R2 = 1<<3; /* checking write in user mode*/
CC = BITTST(R5, 17); /* 0==was user, 1==was super*/
R5 = CC;
R2 <<= R5; /* if was super, check write in super mode*/
R2 = R3 & R2;
CC = R2 == 0;
IF CC JUMP .Lprot_violation;
/* It's a genuine write-to-clean-page.*/
BITSET(R3, 7); /* mark as dirty*/
[P3] = R3; /* and write back.*/
NOP;
CSYNC;
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
.Ldcplb_miss_compare:
/* Data CPLB Miss event. We need to choose a CPLB to
* evict, and then locate a new CPLB to install from the
* config table, that covers the faulting address.
*/
P1.L = LO(DCPLB_DATA15);
P1.H = HI(DCPLB_DATA15);
P4.L = LO(DCPLB_FAULT_ADDR);
P4.H = HI(DCPLB_FAULT_ADDR);
R4 = [P4];
I0 = R4;
/* The replacement procedure for DCPLBs*/
R6 = R1; /* Save for later*/
/* Turn off CPLBs while we work.*/
P4.L = LO(DMEM_CONTROL);
P4.H = HI(DMEM_CONTROL);
R5 = [P4];
BITCLR(R5,ENDCPLB_P);
CLI R0;
SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
.align 8;
[P4] = R5;
SSYNC;
STI R0;
/* Start looking for a CPLB to evict. Our order of preference
* is: invalid CPLBs, clean CPLBs, dirty CPLBs. Locked CPLBs
* are no good.
*/
I1.L = LO(DCPLB_DATA0);
I1.H = HI(DCPLB_DATA0);
P1 = 2;
P2 = 16;
I2.L = _dcplb_preference;
I2.H = _dcplb_preference;
LSETUP(.Lsdsearch1, .Ledsearch1) LC0 = P1;
.Lsdsearch1:
R0 = [I2++]; /* Get the bits we're interested in*/
P0 = I1; /* Go back to start of table*/
LSETUP (.Lsdsearch2, .Ledsearch2) LC1 = P2;
.Lsdsearch2:
R1 = [P0++]; /* Fetch each installed CPLB in turn*/
R2 = R1 & R0; /* and test for interesting bits.*/
CC = R2 == 0; /* If none are set, it'll do.*/
IF !CC JUMP .Lskip_stack_check;
R2 = [P0 - 0x104]; /* R2 - PageStart */
P3.L = _page_size_table; /* retrieve end address */
P3.H = _page_size_table; /* retrieve end address */
R3 = 0x1002; /* 16th - position, 2 bits -length */
#if ANOMALY_05000209
nop; /* Anomaly 05000209 */
#endif
R7 = EXTRACT(R1,R3.l);
R7 = R7 << 2; /* Page size index offset */
P5 = R7;
P3 = P3 + P5;
R7 = [P3]; /* page size in bytes */
R7 = R2 + R7; /* R7 - PageEnd */
R4 = SP; /* Test SP is in range */
CC = R7 < R4; /* if PageEnd < SP */
IF CC JUMP .Ldfound_victim;
R3 = 0x284; /* stack length from start of trap till
* the point.
* 20 stack locations for future modifications
*/
R4 = R4 + R3;
CC = R4 < R2; /* if SP + stacklen < PageStart */
IF CC JUMP .Ldfound_victim;
.Lskip_stack_check:
.Ledsearch2: NOP;
.Ledsearch1: NOP;
/* If we got here, we didn't find a DCPLB we considered
* replacable, which means all of them were locked.
*/
JUMP .Lall_locked;
.Ldfound_victim:
#ifdef CONFIG_CPLB_INFO
R7 = [P0 - 0x104];
P2.L = _dpdt_table;
P2.H = _dpdt_table;
P3.L = _dpdt_swapcount_table;
P3.H = _dpdt_swapcount_table;
P3 += -4;
.Ldicount:
R2 = [P2];
P2 += 8;
P3 += 8;
CC = R2==-1;
IF CC JUMP .Ldicount_done;
CC = R7==R2;
IF !CC JUMP .Ldicount;
R7 = [P3];
R7 += 1;
[P3] = R7;
.Ldicount_done:
#endif
/* Clean down the hardware loops*/
R2 = 0;
LC1 = R2;
LC0 = R2;
/* There's a suitable victim in [P0-4] (because we've
* advanced already).
*/
.LDdoverwrite:
/* [P0-4] is a suitable victim CPLB, so we want to
* overwrite it by moving all the following CPLBs
* one space closer to the start.
*/
R1.L = LO(DCPLB_DATA16); /* DCPLB_DATA15 + 4 */
R1.H = HI(DCPLB_DATA16);
R0 = P0;
/* If the victim happens to be in DCPLB15,
* we don't need to move anything.
*/
CC = R1 == R0;
IF CC JUMP .Lde_moved;
R1 = R1 - R0;
R1 >>= 2;
P1 = R1;
LSETUP(.Lds_move, .Lde_move) LC0=P1;
.Lds_move:
R0 = [P0++]; /* move data */
[P0 - 8] = R0;
R0 = [P0-0x104] /* move address */
.Lde_move:
[P0-0x108] = R0;
.Lde_moved:
NOP;
/* Clear DCPLB_DATA15, in case we don't find a replacement
* otherwise, we would have a duplicate entry, and will crash
*/
R0 = 0;
[P0 - 0x4] = R0;
/* We've now made space in DCPLB15 for the new CPLB to be
* installed. The next stage is to locate a CPLB in the
* config table that covers the faulting address.
*/
R0 = I0; /* Our faulting address */
P2.L = _dpdt_table;
P2.H = _dpdt_table;
#ifdef CONFIG_CPLB_INFO
P3.L = _dpdt_swapcount_table;
P3.H = _dpdt_swapcount_table;
P3 += -8;
#endif
P1.L = _page_size_table;
P1.H = _page_size_table;
/* An extraction pattern, to retrieve bits 17:16.*/
R1 = (16<<8)|2;
.Ldnext: R4 = [P2++]; /* address */
R2 = [P2++]; /* data */
#ifdef CONFIG_CPLB_INFO
P3 += 8;
#endif
CC = R4 == -1;
IF CC JUMP .Lno_page_in_table;
/* See if failed address > start address */
CC = R4 <= R0(IU);
IF !CC JUMP .Ldnext;
/* extract page size (17:16)*/
R3 = EXTRACT(R2, R1.L) (Z);
/* add page size to addr to get range */
P5 = R3;
P5 = P1 + (P5 << 2);
R3 = [P5];
R3 = R3 + R4;
/* See if failed address < (start address + page size) */
CC = R0 < R3(IU);
IF !CC JUMP .Ldnext;
/* We've found the CPLB that should be installed, so
* write it into CPLB15, masking off any caching bits
* if necessary.
*/
P1.L = LO(DCPLB_DATA15);
P1.H = HI(DCPLB_DATA15);
/* If the DCPLB has cache bits set, but caching hasn't
* been enabled, then we want to mask off the cache-in-L1
* bit before installing. Moreover, if caching is off, we
* also want to ensure that the DCPLB has WT mode set, rather
* than WB, since WB pages still trigger first-write exceptions
* even when not caching is off, and the page isn't marked as
* cachable. Finally, we could mark the page as clean, not dirty,
* but we choose to leave that decision to the user; if the user
* chooses to have a CPLB pre-defined as dirty, then they always
* pay the cost of flushing during eviction, but don't pay the
* cost of first-write exceptions to mark the page as dirty.
*/
#ifdef CONFIG_BFIN_WT
BITSET(R6, 14); /* Set WT*/
#endif
[P1] = R2;
[P1-0x100] = R4;
#ifdef CONFIG_CPLB_INFO
R3 = [P3];
R3 += 1;
[P3] = R3;
#endif
/* We've installed the CPLB, so re-enable CPLBs. P4
* points to DMEM_CONTROL, and R5 is the value we
* last wrote to it, when we were disabling CPLBs.
*/
BITSET(R5,ENDCPLB_P);
CLI R2;
.align 8;
[P4] = R5;
SSYNC;
STI R2;
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
ENDPROC(_cplb_mgr)
.data
.align 4;
_page_size_table:
.byte4 0x00000400; /* 1K */
.byte4 0x00001000; /* 4K */
.byte4 0x00100000; /* 1M */
.byte4 0x00400000; /* 4M */
.align 4;
_dcplb_preference:
.byte4 0x00000001; /* valid bit */
.byte4 0x00000002; /* lock bit */

283
arch/blackfin/kernel/cplb-nompu/cplbmgr.c Normal file
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/*
* File: arch/blackfin/kernel/cplb-nompu-c/cplbmgr.c
* Based on: arch/blackfin/kernel/cplb-mpu/cplbmgr.c
* Author: Michael McTernan <mmcternan@airvana.com>
*
* Created: 01Nov2008
* Description: CPLB miss handler.
*
* Modified:
* Copyright 2008 Airvana Inc.
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <asm/blackfin.h>
#include <asm/cplbinit.h>
#include <asm/cplb.h>
#include <asm/mmu_context.h>
/*
* WARNING
*
* This file is compiled with certain -ffixed-reg options. We have to
* make sure not to call any functions here that could clobber these
* registers.
*/
int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
int nr_dcplb_supv_miss[NR_CPUS], nr_icplb_supv_miss[NR_CPUS];
int nr_cplb_flush[NR_CPUS], nr_dcplb_prot[NR_CPUS];
#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
#define MGR_ATTR __attribute__((l1_text))
#else
#define MGR_ATTR
#endif
/*
* We're in an exception handler. The normal cli nop nop workaround
* isn't going to do very much, as the only thing that can interrupt
* us is an NMI, and the cli isn't going to stop that.
*/
#define NOWA_SSYNC __asm__ __volatile__ ("ssync;")
/* Anomaly handlers provide SSYNCs, so avoid extra if anomaly is present */
#if ANOMALY_05000125
#define bfin_write_DMEM_CONTROL_SSYNC(v) bfin_write_DMEM_CONTROL(v)
#define bfin_write_IMEM_CONTROL_SSYNC(v) bfin_write_IMEM_CONTROL(v)
#else
#define bfin_write_DMEM_CONTROL_SSYNC(v) \
do { NOWA_SSYNC; bfin_write_DMEM_CONTROL(v); NOWA_SSYNC; } while (0)
#define bfin_write_IMEM_CONTROL_SSYNC(v) \
do { NOWA_SSYNC; bfin_write_IMEM_CONTROL(v); NOWA_SSYNC; } while (0)
#endif
static inline void write_dcplb_data(int cpu, int idx, unsigned long data,
unsigned long addr)
{
unsigned long ctrl = bfin_read_DMEM_CONTROL();
bfin_write_DMEM_CONTROL_SSYNC(ctrl & ~ENDCPLB);
bfin_write32(DCPLB_DATA0 + idx * 4, data);
bfin_write32(DCPLB_ADDR0 + idx * 4, addr);
bfin_write_DMEM_CONTROL_SSYNC(ctrl);
#ifdef CONFIG_CPLB_INFO
dcplb_tbl[cpu][idx].addr = addr;
dcplb_tbl[cpu][idx].data = data;
#endif
}
static inline void write_icplb_data(int cpu, int idx, unsigned long data,
unsigned long addr)
{
unsigned long ctrl = bfin_read_IMEM_CONTROL();
bfin_write_IMEM_CONTROL_SSYNC(ctrl & ~ENICPLB);
bfin_write32(ICPLB_DATA0 + idx * 4, data);
bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
bfin_write_IMEM_CONTROL_SSYNC(ctrl);
#ifdef CONFIG_CPLB_INFO
icplb_tbl[cpu][idx].addr = addr;
icplb_tbl[cpu][idx].data = data;
#endif
}
/*
* Given the contents of the status register, return the index of the
* CPLB that caused the fault.
*/
static inline int faulting_cplb_index(int status)
{
int signbits = __builtin_bfin_norm_fr1x32(status & 0xFFFF);
return 30 - signbits;
}
/*
* Given the contents of the status register and the DCPLB_DATA contents,
* return true if a write access should be permitted.
*/
static inline int write_permitted(int status, unsigned long data)
{
if (status & FAULT_USERSUPV)
return !!(data & CPLB_SUPV_WR);
else
return !!(data & CPLB_USER_WR);
}
/* Counters to implement round-robin replacement. */
static int icplb_rr_index[NR_CPUS] PDT_ATTR;
static int dcplb_rr_index[NR_CPUS] PDT_ATTR;
/*
* Find an ICPLB entry to be evicted and return its index.
*/
static int evict_one_icplb(int cpu)
{
int i = first_switched_icplb + icplb_rr_index[cpu];
if (i >= MAX_CPLBS) {
i -= MAX_CPLBS - first_switched_icplb;
icplb_rr_index[cpu] -= MAX_CPLBS - first_switched_icplb;
}
icplb_rr_index[cpu]++;
return i;
}
static int evict_one_dcplb(int cpu)
{
int i = first_switched_dcplb + dcplb_rr_index[cpu];
if (i >= MAX_CPLBS) {
i -= MAX_CPLBS - first_switched_dcplb;
dcplb_rr_index[cpu] -= MAX_CPLBS - first_switched_dcplb;
}
dcplb_rr_index[cpu]++;
return i;
}
MGR_ATTR static int icplb_miss(int cpu)
{
unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
int status = bfin_read_ICPLB_STATUS();
int idx;
unsigned long i_data, base, addr1, eaddr;
nr_icplb_miss[cpu]++;
if (unlikely(status & FAULT_USERSUPV))
nr_icplb_supv_miss[cpu]++;
base = 0;
for (idx = 0; idx < icplb_nr_bounds; idx++) {
eaddr = icplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
}
if (unlikely(idx == icplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
i_data = icplb_bounds[idx].data;
if (unlikely(i_data == 0))
return CPLB_NO_ADDR_MATCH;
addr1 = addr & ~(SIZE_4M - 1);
addr &= ~(SIZE_1M - 1);
i_data |= PAGE_SIZE_1MB;
if (addr1 >= base && (addr1 + SIZE_4M) <= eaddr) {
/*
* This works because
* (PAGE_SIZE_4MB & PAGE_SIZE_1MB) == PAGE_SIZE_1MB.
*/
i_data |= PAGE_SIZE_4MB;
addr = addr1;
}
/* Pick entry to evict */
idx = evict_one_icplb(cpu);
write_icplb_data(cpu, idx, i_data, addr);
return CPLB_RELOADED;
}
MGR_ATTR static int dcplb_miss(int cpu)
{
unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
int status = bfin_read_DCPLB_STATUS();
int idx;
unsigned long d_data, base, addr1, eaddr;
nr_dcplb_miss[cpu]++;
if (unlikely(status & FAULT_USERSUPV))
nr_dcplb_supv_miss[cpu]++;
base = 0;
for (idx = 0; idx < dcplb_nr_bounds; idx++) {
eaddr = dcplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
}
if (unlikely(idx == dcplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
d_data = dcplb_bounds[idx].data;
if (unlikely(d_data == 0))
return CPLB_NO_ADDR_MATCH;
addr1 = addr & ~(SIZE_4M - 1);
addr &= ~(SIZE_1M - 1);
d_data |= PAGE_SIZE_1MB;
if (addr1 >= base && (addr1 + SIZE_4M) <= eaddr) {
/*
* This works because
* (PAGE_SIZE_4MB & PAGE_SIZE_1MB) == PAGE_SIZE_1MB.
*/
d_data |= PAGE_SIZE_4MB;
addr = addr1;
}
/* Pick entry to evict */
idx = evict_one_dcplb(cpu);
write_dcplb_data(cpu, idx, d_data, addr);
return CPLB_RELOADED;
}
MGR_ATTR static noinline int dcplb_protection_fault(int cpu)
{
int status = bfin_read_DCPLB_STATUS();
nr_dcplb_prot[cpu]++;
if (likely(status & FAULT_RW)) {
int idx = faulting_cplb_index(status);
unsigned long regaddr = DCPLB_DATA0 + idx * 4;
unsigned long data = bfin_read32(regaddr);
/* Check if fault is to dirty a clean page */
if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) &&
write_permitted(status, data)) {
dcplb_tbl[cpu][idx].data = data;
bfin_write32(regaddr, data);
return CPLB_RELOADED;
}
}
return CPLB_PROT_VIOL;
}
MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs)
{
int cause = seqstat & 0x3f;
unsigned int cpu = smp_processor_id();
switch (cause) {
case 0x2C:
return icplb_miss(cpu);
case 0x26:
return dcplb_miss(cpu);
default:
if (unlikely(cause == 0x23))
return dcplb_protection_fault(cpu);
return CPLB_UNKNOWN_ERR;
}
}

177
arch/blackfin/kernel/cplbinfo.c Normal file
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/*
* arch/blackfin/kernel/cplbinfo.c - display CPLB status
*
* Copyright 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
#include <linux/ctype.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/uaccess.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
static char const page_strtbl[][3] = { "1K", "4K", "1M", "4M" };
#define page(flags) (((flags) & 0x30000) >> 16)
#define strpage(flags) page_strtbl[page(flags)]
struct cplbinfo_data {
loff_t pos;
char cplb_type;
u32 mem_control;
struct cplb_entry *tbl;
int switched;
};
static void cplbinfo_print_header(struct seq_file *m)
{
seq_printf(m, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n");
}
static int cplbinfo_nomore(struct cplbinfo_data *cdata)
{
return cdata->pos >= MAX_CPLBS;
}
static int cplbinfo_show(struct seq_file *m, void *p)
{
struct cplbinfo_data *cdata;
unsigned long data, addr;
loff_t pos;
cdata = p;
pos = cdata->pos;
addr = cdata->tbl[pos].addr;
data = cdata->tbl[pos].data;
seq_printf(m,
"%d\t0x%08lx\t%05lx\t%s\t%c\t%c\t%c\t%c\n",
(int)pos, addr, data, strpage(data),
(data & CPLB_USER_RD) ? 'Y' : 'N',
(data & CPLB_USER_WR) ? 'Y' : 'N',
(data & CPLB_SUPV_WR) ? 'Y' : 'N',
pos < cdata->switched ? 'N' : 'Y');
return 0;
}
static void cplbinfo_seq_init(struct cplbinfo_data *cdata, unsigned int cpu)
{
if (cdata->cplb_type == 'I') {
cdata->mem_control = bfin_read_IMEM_CONTROL();
cdata->tbl = icplb_tbl[cpu];
cdata->switched = first_switched_icplb;
} else {
cdata->mem_control = bfin_read_DMEM_CONTROL();
cdata->tbl = dcplb_tbl[cpu];
cdata->switched = first_switched_dcplb;
}
}
static void *cplbinfo_start(struct seq_file *m, loff_t *pos)
{
struct cplbinfo_data *cdata = m->private;
if (!*pos) {
seq_printf(m, "%cCPLBs are %sabled: 0x%x\n", cdata->cplb_type,
(cdata->mem_control & ENDCPLB ? "en" : "dis"),
cdata->mem_control);
cplbinfo_print_header(m);
} else if (cplbinfo_nomore(cdata))
return NULL;
get_cpu();
return cdata;
}
static void *cplbinfo_next(struct seq_file *m, void *p, loff_t *pos)
{
struct cplbinfo_data *cdata = p;
cdata->pos = ++(*pos);
if (cplbinfo_nomore(cdata))
return NULL;
else
return cdata;
}
static void cplbinfo_stop(struct seq_file *m, void *p)
{
put_cpu();
}
static const struct seq_operations cplbinfo_sops = {
.start = cplbinfo_start,
.next = cplbinfo_next,
.stop = cplbinfo_stop,
.show = cplbinfo_show,
};
static int cplbinfo_open(struct inode *inode, struct file *file)
{
char buf[256], *path, *p;
unsigned int cpu;
char *s_cpu, *s_cplb;
int ret;
struct seq_file *m;
struct cplbinfo_data *cdata;
path = d_path(&file->f_path, buf, sizeof(buf));
if (IS_ERR(path))
return PTR_ERR(path);
s_cpu = strstr(path, "/cpu");
s_cplb = strrchr(path, '/');
if (!s_cpu || !s_cplb)
return -EINVAL;
cpu = simple_strtoul(s_cpu + 4, &p, 10);
if (!cpu_online(cpu))
return -ENODEV;
ret = seq_open_private(file, &cplbinfo_sops, sizeof(*cdata));
if (ret)
return ret;
m = file->private_data;
cdata = m->private;
cdata->pos = 0;
cdata->cplb_type = toupper(s_cplb[1]);
cplbinfo_seq_init(cdata, cpu);
return 0;
}
static const struct file_operations cplbinfo_fops = {
.open = cplbinfo_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release_private,
};
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *cplb_dir, *cpu_dir;
char buf[10];
unsigned int cpu;
cplb_dir = proc_mkdir("cplbinfo", NULL);
if (!cplb_dir)
return -ENOMEM;
for_each_possible_cpu(cpu) {
sprintf(buf, "cpu%i", cpu);
cpu_dir = proc_mkdir(buf, cplb_dir);
if (!cpu_dir)
return -ENOMEM;
proc_create("icplb", S_IRUGO, cpu_dir, &cplbinfo_fops);
proc_create("dcplb", S_IRUGO, cpu_dir, &cplbinfo_fops);
}
return 0;
}
late_initcall(cplbinfo_init);

4
arch/blackfin/kernel/early_printk.c
View File

@ -105,10 +105,10 @@ static struct console * __init earlyserial_init(char *buf)
cflag |= CS5;
break;
case 6:
cflag |= CS5;
cflag |= CS6;
break;
case 7:
cflag |= CS5;
cflag |= CS7;
break;
default:
cflag |= CS8;

5
arch/blackfin/kernel/entry.S
View File

@ -30,6 +30,7 @@
#include <linux/linkage.h>
#include <asm/thread_info.h>
#include <asm/errno.h>
#include <asm/blackfin.h>
#include <asm/asm-offsets.h>
#include <asm/context.S>
@ -41,6 +42,10 @@
#endif
ENTRY(_ret_from_fork)
#ifdef CONFIG_IPIPE
[--sp] = reti; /* IRQs on. */
SP += 4;
#endif /* CONFIG_IPIPE */
SP += -12;
call _schedule_tail;
SP += 12;

6
arch/blackfin/kernel/fixed_code.S
View File

@ -8,10 +8,12 @@
* BF561 SMP).
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/unistd.h>
#include <asm/entry.h>
.text
__INIT
ENTRY(_fixed_code_start)
.align 16
@ -144,3 +146,5 @@ ENTRY(_safe_user_instruction)
ENDPROC(_safe_user_instruction)
ENTRY(_fixed_code_end)
__FINIT

428
arch/blackfin/kernel/ipipe.c Normal file
View File

@ -0,0 +1,428 @@
/* -*- linux-c -*-
* linux/arch/blackfin/kernel/ipipe.c
*
* Copyright (C) 2005-2007 Philippe Gerum.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
* USA; either version 2 of the License, or (at your option) any later
* version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
* Architecture-dependent I-pipe support for the Blackfin.
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/percpu.h>
#include <linux/bitops.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/kthread.h>
#include <asm/unistd.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/io.h>
static int create_irq_threads;
DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
static DEFINE_PER_CPU(unsigned long, pending_irqthread_mask);
static DEFINE_PER_CPU(int [IVG13 + 1], pending_irq_count);
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
static void __ipipe_no_irqtail(void);
unsigned long __ipipe_irq_tail_hook = (unsigned long)&__ipipe_no_irqtail;
EXPORT_SYMBOL(__ipipe_irq_tail_hook);
unsigned long __ipipe_core_clock;
EXPORT_SYMBOL(__ipipe_core_clock);
unsigned long __ipipe_freq_scale;
EXPORT_SYMBOL(__ipipe_freq_scale);
atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
unsigned long __ipipe_irq_lvmask = __all_masked_irq_flags;
EXPORT_SYMBOL(__ipipe_irq_lvmask);
static void __ipipe_ack_irq(unsigned irq, struct irq_desc *desc)
{
desc->ipipe_ack(irq, desc);
}
/*
* __ipipe_enable_pipeline() -- We are running on the boot CPU, hw
* interrupts are off, and secondary CPUs are still lost in space.
*/
void __ipipe_enable_pipeline(void)
{
unsigned irq;
__ipipe_core_clock = get_cclk(); /* Fetch this once. */
__ipipe_freq_scale = 1000000000UL / __ipipe_core_clock;
for (irq = 0; irq < NR_IRQS; ++irq)
ipipe_virtualize_irq(ipipe_root_domain,
irq,
(ipipe_irq_handler_t)&asm_do_IRQ,
NULL,
&__ipipe_ack_irq,
IPIPE_HANDLE_MASK | IPIPE_PASS_MASK);
}
/*
* __ipipe_handle_irq() -- IPIPE's generic IRQ handler. An optimistic
* interrupt protection log is maintained here for each domain. Hw
* interrupts are masked on entry.
*/
void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
{
struct ipipe_domain *this_domain, *next_domain;
struct list_head *head, *pos;
int m_ack, s = -1;
/*
* Software-triggered IRQs do not need any ack. The contents
* of the register frame should only be used when processing
* the timer interrupt, but not for handling any other
* interrupt.
*/
m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
this_domain = ipipe_current_domain;
if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
head = &this_domain->p_link;
else {
head = __ipipe_pipeline.next;
next_domain = list_entry(head, struct ipipe_domain, p_link);
if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
next_domain->irqs[irq].acknowledge(irq, irq_desc + irq);
if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags))
s = __test_and_set_bit(IPIPE_STALL_FLAG,
&ipipe_root_cpudom_var(status));
__ipipe_dispatch_wired(next_domain, irq);
goto finalize;
return;
}
}
/* Ack the interrupt. */
pos = head;
while (pos != &__ipipe_pipeline) {
next_domain = list_entry(pos, struct ipipe_domain, p_link);
/*
* For each domain handling the incoming IRQ, mark it
* as pending in its log.
*/
if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
/*
* Domains that handle this IRQ are polled for
* acknowledging it by decreasing priority
* order. The interrupt must be made pending
* _first_ in the domain's status flags before
* the PIC is unlocked.
*/
__ipipe_set_irq_pending(next_domain, irq);
if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
next_domain->irqs[irq].acknowledge(irq, irq_desc + irq);
m_ack = 1;
}
}
/*
* If the domain does not want the IRQ to be passed
* down the interrupt pipe, exit the loop now.
*/
if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
break;
pos = next_domain->p_link.next;
}
/*
* Now walk the pipeline, yielding control to the highest
* priority domain that has pending interrupt(s) or
* immediately to the current domain if the interrupt has been
* marked as 'sticky'. This search does not go beyond the
* current domain in the pipeline. We also enforce the
* additional root stage lock (blackfin-specific). */
if (test_bit(IPIPE_ROOTLOCK_FLAG, &ipipe_root_domain->flags))
s = __test_and_set_bit(IPIPE_STALL_FLAG,
&ipipe_root_cpudom_var(status));
finalize:
__ipipe_walk_pipeline(head);
if (!s)
__clear_bit(IPIPE_STALL_FLAG,
&ipipe_root_cpudom_var(status));
}
int __ipipe_check_root(void)
{
return ipipe_root_domain_p;
}
void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
{
struct irq_desc *desc = irq_desc + irq;
int prio = desc->ic_prio;
desc->depth = 0;
if (ipd != &ipipe_root &&
atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1)
__set_bit(prio, &__ipipe_irq_lvmask);
}
EXPORT_SYMBOL(__ipipe_enable_irqdesc);
void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
{
struct irq_desc *desc = irq_desc + irq;
int prio = desc->ic_prio;
if (ipd != &ipipe_root &&
atomic_dec_and_test(&__ipipe_irq_lvdepth[prio]))
__clear_bit(prio, &__ipipe_irq_lvmask);
}
EXPORT_SYMBOL(__ipipe_disable_irqdesc);
void __ipipe_stall_root_raw(void)
{
/*
* This code is called by the ins{bwl} routines (see
* arch/blackfin/lib/ins.S), which are heavily used by the
* network stack. It masks all interrupts but those handled by
* non-root domains, so that we keep decent network transfer
* rates for Linux without inducing pathological jitter for
* the real-time domain.
*/
__asm__ __volatile__ ("sti %0;" : : "d"(__ipipe_irq_lvmask));
__set_bit(IPIPE_STALL_FLAG,
&ipipe_root_cpudom_var(status));
}
void __ipipe_unstall_root_raw(void)
{
__clear_bit(IPIPE_STALL_FLAG,
&ipipe_root_cpudom_var(status));
__asm__ __volatile__ ("sti %0;" : : "d"(bfin_irq_flags));
}
int __ipipe_syscall_root(struct pt_regs *regs)
{
unsigned long flags;
/* We need to run the IRQ tail hook whenever we don't
* propagate a syscall to higher domains, because we know that
* important operations might be pending there (e.g. Xenomai
* deferred rescheduling). */
if (!__ipipe_syscall_watched_p(current, regs->orig_p0)) {
void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
hook();
return 0;
}
/*
* This routine either returns:
* 0 -- if the syscall is to be passed to Linux;
* 1 -- if the syscall should not be passed to Linux, and no
* tail work should be performed;
* -1 -- if the syscall should not be passed to Linux but the
* tail work has to be performed (for handling signals etc).
*/
if (__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL) &&
__ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs) > 0) {
if (ipipe_root_domain_p && !in_atomic()) {
/*
* Sync pending VIRQs before _TIF_NEED_RESCHED
* is tested.
*/
local_irq_save_hw(flags);
if ((ipipe_root_cpudom_var(irqpend_himask) & IPIPE_IRQMASK_VIRT) != 0)
__ipipe_sync_pipeline(IPIPE_IRQMASK_VIRT);
local_irq_restore_hw(flags);
return -1;
}
return 1;
}
return 0;
}
unsigned long ipipe_critical_enter(void (*syncfn) (void))
{
unsigned long flags;
local_irq_save_hw(flags);
return flags;
}
void ipipe_critical_exit(unsigned long flags)
{
local_irq_restore_hw(flags);
}
static void __ipipe_no_irqtail(void)
{
}
int ipipe_get_sysinfo(struct ipipe_sysinfo *info)
{
info->ncpus = num_online_cpus();
info->cpufreq = ipipe_cpu_freq();
info->archdep.tmirq = IPIPE_TIMER_IRQ;
info->archdep.tmfreq = info->cpufreq;
return 0;
}
/*
* ipipe_trigger_irq() -- Push the interrupt at front of the pipeline
* just like if it has been actually received from a hw source. Also
* works for virtual interrupts.
*/
int ipipe_trigger_irq(unsigned irq)
{
unsigned long flags;
if (irq >= IPIPE_NR_IRQS ||
(ipipe_virtual_irq_p(irq)
&& !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
return -EINVAL;
local_irq_save_hw(flags);
__ipipe_handle_irq(irq, NULL);
local_irq_restore_hw(flags);
return 1;
}
/* Move Linux IRQ to threads. */
static int do_irqd(void *__desc)
{
struct irq_desc *desc = __desc;
unsigned irq = desc - irq_desc;
int thrprio = desc->thr_prio;
int thrmask = 1 << thrprio;
int cpu = smp_processor_id();
cpumask_t cpumask;
sigfillset(&current->blocked);
current->flags |= PF_NOFREEZE;
cpumask = cpumask_of_cpu(cpu);
set_cpus_allowed(current, cpumask);
ipipe_setscheduler_root(current, SCHED_FIFO, 50 + thrprio);
while (!kthread_should_stop()) {
local_irq_disable();
if (!(desc->status & IRQ_SCHEDULED)) {
set_current_state(TASK_INTERRUPTIBLE);
resched:
local_irq_enable();
schedule();
local_irq_disable();
}
__set_current_state(TASK_RUNNING);
/*
* If higher priority interrupt servers are ready to
* run, reschedule immediately. We need this for the
* GPIO demux IRQ handler to unmask the interrupt line
* _last_, after all GPIO IRQs have run.
*/
if (per_cpu(pending_irqthread_mask, cpu) & ~(thrmask|(thrmask-1)))
goto resched;
if (--per_cpu(pending_irq_count[thrprio], cpu) == 0)
per_cpu(pending_irqthread_mask, cpu) &= ~thrmask;
desc->status &= ~IRQ_SCHEDULED;
desc->thr_handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs));
local_irq_enable();
}
__set_current_state(TASK_RUNNING);
return 0;
}
static void kick_irqd(unsigned irq, void *cookie)
{
struct irq_desc *desc = irq_desc + irq;
int thrprio = desc->thr_prio;
int thrmask = 1 << thrprio;
int cpu = smp_processor_id();
if (!(desc->status & IRQ_SCHEDULED)) {
desc->status |= IRQ_SCHEDULED;
per_cpu(pending_irqthread_mask, cpu) |= thrmask;
++per_cpu(pending_irq_count[thrprio], cpu);
wake_up_process(desc->thread);
}
}
int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc)
{
if (desc->thread || !create_irq_threads)
return 0;
desc->thread = kthread_create(do_irqd, desc, "IRQ %d", irq);
if (desc->thread == NULL) {
printk(KERN_ERR "irqd: could not create IRQ thread %d!\n", irq);
return -ENOMEM;
}
wake_up_process(desc->thread);
desc->thr_handler = ipipe_root_domain->irqs[irq].handler;
ipipe_root_domain->irqs[irq].handler = &kick_irqd;
return 0;
}
void __init ipipe_init_irq_threads(void)
{
unsigned irq;
struct irq_desc *desc;
create_irq_threads = 1;
for (irq = 0; irq < NR_IRQS; irq++) {
desc = irq_desc + irq;
if (desc->action != NULL ||
(desc->status & IRQ_NOREQUEST) != 0)
ipipe_start_irq_thread(irq, desc);
}
}
EXPORT_SYMBOL(show_stack);
#ifdef CONFIG_IPIPE_TRACE_MCOUNT
void notrace _mcount(void);
EXPORT_SYMBOL(_mcount);
#endif /* CONFIG_IPIPE_TRACE_MCOUNT */

44
arch/blackfin/kernel/irqchip.c
View File

@ -36,7 +36,7 @@
#include <linux/irq.h>
#include <asm/trace.h>
static unsigned long irq_err_count;
static atomic_t irq_err_count;
static spinlock_t irq_controller_lock;
/*
@ -48,10 +48,9 @@ void dummy_mask_unmask_irq(unsigned int irq)
void ack_bad_irq(unsigned int irq)
{
irq_err_count += 1;
atomic_inc(&irq_err_count);
printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
}
EXPORT_SYMBOL(ack_bad_irq);
static struct irq_chip bad_chip = {
.ack = dummy_mask_unmask_irq,
@ -72,7 +71,7 @@ static struct irq_desc bad_irq_desc = {
int show_interrupts(struct seq_file *p, void *v)
{
int i = *(loff_t *) v;
int i = *(loff_t *) v, j;
struct irqaction *action;
unsigned long flags;
@ -80,19 +79,20 @@ int show_interrupts(struct seq_file *p, void *v)
spin_lock_irqsave(&irq_desc[i].lock, flags);
action = irq_desc[i].action;
if (!action)
goto unlock;
seq_printf(p, "%3d: %10u ", i, kstat_irqs(i));
goto skip;
seq_printf(p, "%3d: ", i);
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
seq_printf(p, " %8s", irq_desc[i].chip->name);
seq_printf(p, " %s", action->name);
for (action = action->next; action; action = action->next)
seq_printf(p, ", %s", action->name);
seq_printf(p, " %s", action->name);
seq_putc(p, '\n');
unlock:
skip:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
} else if (i == NR_IRQS) {
seq_printf(p, "Err: %10lu\n", irq_err_count);
}
} else if (i == NR_IRQS)
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
return 0;
}
@ -101,7 +101,6 @@ int show_interrupts(struct seq_file *p, void *v)
* come via this function. Instead, they should provide their
* own 'handler'
*/
#ifdef CONFIG_DO_IRQ_L1
__attribute__((l1_text))
#endif
@ -109,8 +108,9 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
{
struct pt_regs *old_regs;
struct irq_desc *desc = irq_desc + irq;
#ifndef CONFIG_IPIPE
unsigned short pending, other_ints;
#endif
old_regs = set_irq_regs(regs);
/*
@ -121,9 +121,24 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
desc = &bad_irq_desc;
irq_enter();
#ifdef CONFIG_DEBUG_STACKOVERFLOW
/* Debugging check for stack overflow: is there less than STACK_WARN free? */
{
long sp;
sp = __get_SP() & (THREAD_SIZE-1);
if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
dump_stack();
printk(KERN_EMERG "%s: possible stack overflow while handling irq %i "
" only %ld bytes free\n",
__func__, irq, sp - sizeof(struct thread_info));
}
}
#endif
generic_handle_irq(irq);
#ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */
/* If we're the only interrupt running (ignoring IRQ15 which is for
syscalls), lower our priority to IRQ14 so that softirqs run at
that level. If there's another, lower-level interrupt, irq_exit
@ -133,6 +148,7 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
other_ints = pending & (pending - 1);
if (other_ints == 0)
lower_to_irq14();
#endif /* !CONFIG_IPIPE */
irq_exit();
set_irq_regs(old_regs);

127
arch/blackfin/kernel/kgdb.c
View File

@ -34,9 +34,14 @@ int gdb_bfin_vector = -1;
#error change the definition of slavecpulocks
#endif
#ifdef CONFIG_BFIN_WDT
# error "Please unselect blackfin watchdog driver before build KGDB."
#endif
#define IN_MEM(addr, size, l1_addr, l1_size) \
({ \
unsigned long __addr = (unsigned long)(addr); \
(l1_size && __addr >= l1_addr && __addr + (size) <= l1_addr + l1_size); \
})
#define ASYNC_BANK_SIZE \
(ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE)
void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
{
@ -219,6 +224,7 @@ int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
if (bfin_type == breakinfo[breakno].type
&& !breakinfo[breakno].occupied) {
breakinfo[breakno].occupied = 1;
breakinfo[breakno].skip = 0;
breakinfo[breakno].enabled = 1;
breakinfo[breakno].addr = addr;
breakinfo[breakno].dataacc = dataacc;
@ -363,12 +369,12 @@ void kgdb_passive_cpu_callback(void *info)
void kgdb_roundup_cpus(unsigned long flags)
{
smp_call_function(kgdb_passive_cpu_callback, NULL, 0, 0);
smp_call_function(kgdb_passive_cpu_callback, NULL, 0);
}
void kgdb_roundup_cpu(int cpu, unsigned long flags)
{
smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0, 0);
smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0);
}
#endif
@ -385,10 +391,8 @@ int kgdb_arch_handle_exception(int vector, int signo,
struct pt_regs *regs)
{
long addr;
long breakno;
char *ptr;
int newPC;
int wp_status;
int i;
switch (remcom_in_buffer[0]) {
@ -426,17 +430,6 @@ int kgdb_arch_handle_exception(int vector, int signo,
kgdb_single_step = i + 1;
}
if (vector == VEC_WATCH) {
wp_status = bfin_read_WPSTAT();
for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) {
if (wp_status & (1 << breakno)) {
breakinfo->skip = 1;
break;
}
}
bfin_write_WPSTAT(0);
}
bfin_correct_hw_break();
return 0;
@ -478,57 +471,32 @@ static int validate_memory_access_address(unsigned long addr, int size)
return 0;
if (addr >= SYSMMR_BASE)
return 0;
if (addr >= ASYNC_BANK0_BASE
&& addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
if (IN_MEM(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
return 0;
if (cpu == 0) {
if (addr >= L1_SCRATCH_START
&& (addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH))
if (IN_MEM(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
return 0;
#if L1_CODE_LENGTH != 0
if (addr >= L1_CODE_START
&& (addr + size <= L1_CODE_START + L1_CODE_LENGTH))
if (IN_MEM(addr, size, L1_CODE_START, L1_CODE_LENGTH))
return 0;
#endif
#if L1_DATA_A_LENGTH != 0
if (addr >= L1_DATA_A_START
&& (addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH))
if (IN_MEM(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
return 0;
#endif
#if L1_DATA_B_LENGTH != 0
if (addr >= L1_DATA_B_START
&& (addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH))
if (IN_MEM(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
return 0;
#endif
#ifdef CONFIG_SMP
} else if (cpu == 1) {
if (addr >= COREB_L1_SCRATCH_START
&& (addr + size <= COREB_L1_SCRATCH_START
+ L1_SCRATCH_LENGTH))
if (IN_MEM(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
return 0;
# if L1_CODE_LENGTH != 0
if (addr >= COREB_L1_CODE_START
&& (addr + size <= COREB_L1_CODE_START + L1_CODE_LENGTH))
if (IN_MEM(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH))
return 0;
# endif
# if L1_DATA_A_LENGTH != 0
if (addr >= COREB_L1_DATA_A_START
&& (addr + size <= COREB_L1_DATA_A_START + L1_DATA_A_LENGTH))
if (IN_MEM(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH))
return 0;
# endif
# if L1_DATA_B_LENGTH != 0
if (addr >= COREB_L1_DATA_B_START
&& (addr + size <= COREB_L1_DATA_B_START + L1_DATA_B_LENGTH))
if (IN_MEM(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH))
return 0;
# endif
#endif
}
#if L2_LENGTH != 0
if (addr >= L2_START
&& addr + size <= L2_START + L2_LENGTH)
if (IN_MEM(addr, size, L2_START, L2_LENGTH))
return 0;
#endif
return EFAULT;
}
@ -582,12 +550,9 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
default:
err = EFAULT;
}
} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
#ifdef CONFIG_SMP
|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
COREB_L1_CODE_START + L1_CODE_LENGTH
|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
#endif
) {
/* access L1 instruction SRAM*/
@ -658,12 +623,9 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
default:
return EFAULT;
}
} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
(unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH
} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
#ifdef CONFIG_SMP
|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
COREB_L1_CODE_START + L1_CODE_LENGTH
|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
#endif
) {
/* access L1 instruction SRAM */
@ -723,12 +685,9 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
default:
return EFAULT;
}
} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
} else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
#ifdef CONFIG_SMP
|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
(unsigned int)(mem + count) <=
COREB_L1_CODE_START + L1_CODE_LENGTH
|| (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
#endif
) {
/* access L1 instruction SRAM */
@ -745,24 +704,16 @@ int kgdb_validate_break_address(unsigned long addr)
if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end)
return 0;
if (addr >= ASYNC_BANK0_BASE
&& addr + BREAK_INSTR_SIZE <= ASYNC_BANK3_BASE + ASYNC_BANK3_BASE)
if (IN_MEM(addr, BREAK_INSTR_SIZE, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
return 0;
#if L1_CODE_LENGTH != 0
if (cpu == 0 && addr >= L1_CODE_START
&& addr + BREAK_INSTR_SIZE <= L1_CODE_START + L1_CODE_LENGTH)
if (cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
return 0;
# ifdef CONFIG_SMP
else if (cpu == 1 && addr >= COREB_L1_CODE_START
&& addr + BREAK_INSTR_SIZE <= COREB_L1_CODE_START + L1_CODE_LENGTH)
return 0;
# endif
#endif
#if L2_LENGTH != 0
if (addr >= L2_START
&& addr + BREAK_INSTR_SIZE <= L2_START + L2_LENGTH)
#ifdef CONFIG_SMP
else if (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
return 0;
#endif
if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH))
return 0;
return EFAULT;
}
@ -772,13 +723,9 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
int err;
int cpu = raw_smp_processor_id();
if ((cpu == 0 && (unsigned int)addr >= L1_CODE_START
&& (unsigned int)(addr + BREAK_INSTR_SIZE)
< L1_CODE_START + L1_CODE_LENGTH)
if ((cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
#ifdef CONFIG_SMP
|| (cpu == 1 && (unsigned int)addr >= COREB_L1_CODE_START
&& (unsigned int)(addr + BREAK_INSTR_SIZE)
< COREB_L1_CODE_START + L1_CODE_LENGTH)
|| (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
#endif
) {
/* access L1 instruction SRAM */
@ -804,9 +751,7 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle)
{
if ((unsigned int)addr >= L1_CODE_START &&
(unsigned int)(addr + BREAK_INSTR_SIZE) <
L1_CODE_START + L1_CODE_LENGTH) {
if (IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH)) {
/* access L1 instruction SRAM */
if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL)
return -EFAULT;

123
arch/blackfin/kernel/kgdb_test.c Normal file
View File

@ -0,0 +1,123 @@
/*
* arch/blackfin/kernel/kgdb_test.c - Blackfin kgdb tests
*
* Copyright 2005-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/blackfin.h>
static char cmdline[256];
static unsigned long len;
static int num1 __attribute__((l1_data));
void kgdb_l1_test(void) __attribute__((l1_text));
void kgdb_l1_test(void)
{
printk(KERN_ALERT "L1(before change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
printk(KERN_ALERT "L1 : code function addr = 0x%p\n", kgdb_l1_test);
num1 = num1 + 10 ;
printk(KERN_ALERT "L1(after change) : data variable addr = 0x%p, data value is %d\n", &num1, num1);
return ;
}
#if L2_LENGTH
static int num2 __attribute__((l2));
void kgdb_l2_test(void) __attribute__((l2));
void kgdb_l2_test(void)
{
printk(KERN_ALERT "L2(before change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
printk(KERN_ALERT "L2 : code function addr = 0x%p\n", kgdb_l2_test);
num2 = num2 + 20 ;
printk(KERN_ALERT "L2(after change) : data variable addr = 0x%p, data value is %d\n", &num2, num2);
return ;
}
#endif
int kgdb_test(char *name, int len, int count, int z)
{
printk(KERN_DEBUG "kgdb name(%d): %s, %d, %d\n", len, name, count, z);
count = z;
return count;
}
static int test_proc_output(char *buf)
{
kgdb_test("hello world!", 12, 0x55, 0x10);
kgdb_l1_test();
#if L2_LENGTH
kgdb_l2_test();
#endif
return 0;
}
static int test_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = test_proc_output(page);
if (len <= off+count)
*eof = 1;
*start = page + off;
len -= off;
if (len > count)
len = count;
if (len < 0)
len = 0;
return len;
}
static int test_write_proc(struct file *file, const char *buffer,
unsigned long count, void *data)
{
if (count >= 256)
len = 255;
else
len = count;
memcpy(cmdline, buffer, count);
cmdline[len] = 0;
return len;
}
static int __init kgdbtest_init(void)
{
struct proc_dir_entry *entry;
entry = create_proc_entry("kgdbtest", 0, NULL);
if (entry == NULL)
return -ENOMEM;
entry->read_proc = test_read_proc;
entry->write_proc = test_write_proc;
entry->data = NULL;
return 0;
}
static void __exit kgdbtest_exit(void)
{
remove_proc_entry("kgdbtest", NULL);
}
module_init(kgdbtest_init);
module_exit(kgdbtest_exit);
MODULE_LICENSE("GPL");

70
arch/blackfin/kernel/mcount.S Normal file
View File

@ -0,0 +1,70 @@
/*
* linux/arch/blackfin/mcount.S
*
* Copyright (C) 2006 Analog Devices Inc.
*
* 2007/04/12 Save index, length, modify and base registers. --rpm
*/
#include <linux/linkage.h>
#include <asm/blackfin.h>
.text
.align 4 /* just in case */
ENTRY(__mcount)
[--sp] = i0;
[--sp] = i1;
[--sp] = i2;
[--sp] = i3;
[--sp] = l0;
[--sp] = l1;
[--sp] = l2;
[--sp] = l3;
[--sp] = m0;
[--sp] = m1;
[--sp] = m2;
[--sp] = m3;
[--sp] = b0;
[--sp] = b1;
[--sp] = b2;
[--sp] = b3;
[--sp] = ( r7:0, p5:0 );
[--sp] = ASTAT;
p1.L = _ipipe_trace_enable;
p1.H = _ipipe_trace_enable;
r7 = [p1];
CC = r7 == 0;
if CC jump out;
link 0x10;
r0 = 0x0;
[sp + 0xc] = r0; /* v */
r0 = 0x0; /* type: IPIPE_TRACE_FN */
r1 = rets;
p0 = [fp]; /* p0: Prior FP */
r2 = [p0 + 4]; /* r2: Prior RETS */
call ___ipipe_trace;
unlink;
out:
ASTAT = [sp++];
( r7:0, p5:0 ) = [sp++];
b3 = [sp++];
b2 = [sp++];
b1 = [sp++];
b0 = [sp++];
m3 = [sp++];
m2 = [sp++];
m1 = [sp++];
m0 = [sp++];
l3 = [sp++];
l2 = [sp++];
l1 = [sp++];
l0 = [sp++];
i3 = [sp++];
i2 = [sp++];
i1 = [sp++];
i0 = [sp++];
rts;
ENDPROC(__mcount)

152
arch/blackfin/kernel/module.c
View File

@ -37,111 +37,6 @@
#include <asm/dma.h>
#include <asm/cacheflush.h>
/*
* handle arithmetic relocations.
* See binutils/bfd/elf32-bfin.c for more details
*/
#define RELOC_STACK_SIZE 100
static uint32_t reloc_stack[RELOC_STACK_SIZE];
static unsigned int reloc_stack_tos;
#define is_reloc_stack_empty() ((reloc_stack_tos > 0)?0:1)
static void reloc_stack_push(uint32_t value)
{
reloc_stack[reloc_stack_tos++] = value;
}
static uint32_t reloc_stack_pop(void)
{
return reloc_stack[--reloc_stack_tos];
}
static uint32_t reloc_stack_operate(unsigned int oper, struct module *mod)
{
uint32_t value;
switch (oper) {
case R_add:
value = reloc_stack[reloc_stack_tos - 2] +
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_sub:
value = reloc_stack[reloc_stack_tos - 2] -
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_mult:
value = reloc_stack[reloc_stack_tos - 2] *
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_div:
value = reloc_stack[reloc_stack_tos - 2] /
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_mod:
value = reloc_stack[reloc_stack_tos - 2] %
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_lshift:
value = reloc_stack[reloc_stack_tos - 2] <<
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_rshift:
value = reloc_stack[reloc_stack_tos - 2] >>
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_and:
value = reloc_stack[reloc_stack_tos - 2] &
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_or:
value = reloc_stack[reloc_stack_tos - 2] |
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_xor:
value = reloc_stack[reloc_stack_tos - 2] ^
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_land:
value = reloc_stack[reloc_stack_tos - 2] &&
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_lor:
value = reloc_stack[reloc_stack_tos - 2] ||
reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 2;
break;
case R_neg:
value = -reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos--;
break;
case R_comp:
value = ~reloc_stack[reloc_stack_tos - 1];
reloc_stack_tos -= 1;
break;
default:
printk(KERN_WARNING "module %s: unhandled reloction\n",
mod->name);
return 0;
}
/* now push the new value back on stack */
reloc_stack_push(value);
return value;
}
void *module_alloc(unsigned long size)
{
if (size == 0)
@ -334,16 +229,18 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
undefined symbols have been resolved. */
sym = (Elf32_Sym *) sechdrs[symindex].sh_addr
+ ELF32_R_SYM(rel[i].r_info);
if (is_reloc_stack_empty()) {
value = sym->st_value;
} else {
value = reloc_stack_pop();
}
value = sym->st_value;
value += rel[i].r_addend;
pr_debug("location is %x, value is %x type is %d \n",
(unsigned int) location32, value,
ELF32_R_TYPE(rel[i].r_info));
#ifdef CONFIG_SMP
if ((unsigned long)location16 >= COREB_L1_DATA_A_START) {
printk(KERN_ERR "module %s: cannot relocate in L1: %u (SMP kernel)",
mod->name, ELF32_R_TYPE(rel[i].r_info));
return -ENOEXEC;
}
#endif
switch (ELF32_R_TYPE(rel[i].r_info)) {
case R_pcrel24:
@ -355,6 +252,12 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
location32 = (uint32_t *) location16;
value -= (uint32_t) location32;
value >>= 1;
if ((value & 0xFF000000) != 0 &&
(value & 0xFF000000) != 0xFF000000) {
printk(KERN_ERR "module %s: relocation overflow\n",
mod->name);
return -ENOEXEC;
}
pr_debug("value is %x, before %x-%x after %x-%x\n", value,
*location16, *(location16 + 1),
(*location16 & 0xff00) | (value >> 16 & 0x00ff),
@ -399,28 +302,6 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
pr_debug("before %x after %x\n", *location32, value);
*location32 = value;
break;
case R_push:
reloc_stack_push(value);
break;
case R_const:
reloc_stack_push(rel[i].r_addend);
break;
case R_add:
case R_sub:
case R_mult:
case R_div:
case R_mod:
case R_lshift:
case R_rshift:
case R_and:
case R_or:
case R_xor:
case R_land:
case R_lor:
case R_neg:
case R_comp:
reloc_stack_operate(ELF32_R_TYPE(rel[i].r_info), mod);
break;
default:
printk(KERN_ERR "module %s: Unknown relocation: %u\n",
mod->name, ELF32_R_TYPE(rel[i].r_info));
@ -436,6 +317,7 @@ module_finalize(const Elf_Ehdr * hdr,
{
unsigned int i, strindex = 0, symindex = 0;
char *secstrings;
long err = 0;
secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
@ -460,8 +342,10 @@ module_finalize(const Elf_Ehdr * hdr,
(strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) ||
((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) &&
(hdr->e_flags & (EF_BFIN_CODE_IN_L1|EF_BFIN_CODE_IN_L2))))) {
apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
err = apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
symindex, i, mod);
if (err < 0)
return -ENOEXEC;
}
}
return 0;

32
arch/blackfin/kernel/process.c
View File

@ -39,6 +39,7 @@
#include <asm/blackfin.h>
#include <asm/fixed_code.h>
#include <asm/mem_map.h>
asmlinkage void ret_from_fork(void);
@ -81,11 +82,14 @@ void cpu_idle(void)__attribute__((l1_text));
*/
static void default_idle(void)
{
local_irq_disable();
#ifdef CONFIG_IPIPE
ipipe_suspend_domain();
#endif
local_irq_disable_hw();
if (!need_resched())
idle_with_irq_disabled();
local_irq_enable();
local_irq_enable_hw();
}
/*
@ -154,6 +158,7 @@ pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL,
NULL);
}
EXPORT_SYMBOL(kernel_thread);
void flush_thread(void)
{
@ -170,6 +175,13 @@ asmlinkage int bfin_clone(struct pt_regs *regs)
unsigned long clone_flags;
unsigned long newsp;
#ifdef __ARCH_SYNC_CORE_DCACHE
if (current->rt.nr_cpus_allowed == num_possible_cpus()) {
current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
current->rt.nr_cpus_allowed = 1;
}
#endif
/* syscall2 puts clone_flags in r0 and usp in r1 */
clone_flags = regs->r0;
newsp = regs->r1;
@ -337,22 +349,22 @@ int _access_ok(unsigned long addr, unsigned long size)
if (addr >= (unsigned long)__init_begin &&
addr + size <= (unsigned long)__init_end)
return 1;
if (addr >= L1_SCRATCH_START
&& addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH)
if (addr >= get_l1_scratch_start()
&& addr + size <= get_l1_scratch_start() + L1_SCRATCH_LENGTH)
return 1;
#if L1_CODE_LENGTH != 0
if (addr >= L1_CODE_START + (_etext_l1 - _stext_l1)
&& addr + size <= L1_CODE_START + L1_CODE_LENGTH)
if (addr >= get_l1_code_start() + (_etext_l1 - _stext_l1)
&& addr + size <= get_l1_code_start() + L1_CODE_LENGTH)
return 1;
#endif
#if L1_DATA_A_LENGTH != 0
if (addr >= L1_DATA_A_START + (_ebss_l1 - _sdata_l1)
&& addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH)
if (addr >= get_l1_data_a_start() + (_ebss_l1 - _sdata_l1)
&& addr + size <= get_l1_data_a_start() + L1_DATA_A_LENGTH)
return 1;
#endif
#if L1_DATA_B_LENGTH != 0
if (addr >= L1_DATA_B_START + (_ebss_b_l1 - _sdata_b_l1)
&& addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH)
if (addr >= get_l1_data_b_start() + (_ebss_b_l1 - _sdata_b_l1)
&& addr + size <= get_l1_data_b_start() + L1_DATA_B_LENGTH)
return 1;
#endif
#if L2_LENGTH != 0

17
arch/blackfin/kernel/ptrace.c
View File

@ -45,6 +45,7 @@
#include <asm/asm-offsets.h>
#include <asm/dma.h>
#include <asm/fixed_code.h>
#include <asm/mem_map.h>
#define TEXT_OFFSET 0
/*
@ -80,10 +81,12 @@ static inline struct pt_regs *get_user_regs(struct task_struct *task)
/*
* Get all user integer registers.
*/
static inline int ptrace_getregs(struct task_struct *tsk, void __user * uregs)
static inline int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
{
struct pt_regs *regs = get_user_regs(tsk);
return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
struct pt_regs regs;
memcpy(&regs, get_user_regs(tsk), sizeof(regs));
regs.usp = tsk->thread.usp;
return copy_to_user(uregs, &regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
}
/* Mapping from PT_xxx to the stack offset at which the register is
@ -220,8 +223,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
break;
pr_debug("ptrace: user address is valid\n");
if (L1_CODE_LENGTH != 0 && addr >= L1_CODE_START
&& addr + sizeof(tmp) <= L1_CODE_START + L1_CODE_LENGTH) {
if (L1_CODE_LENGTH != 0 && addr >= get_l1_code_start()
&& addr + sizeof(tmp) <= get_l1_code_start() + L1_CODE_LENGTH) {
safe_dma_memcpy (&tmp, (const void *)(addr), sizeof(tmp));
copied = sizeof(tmp);
@ -300,8 +303,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
break;
pr_debug("ptrace: user address is valid\n");
if (L1_CODE_LENGTH != 0 && addr >= L1_CODE_START
&& addr + sizeof(data) <= L1_CODE_START + L1_CODE_LENGTH) {
if (L1_CODE_LENGTH != 0 && addr >= get_l1_code_start()
&& addr + sizeof(data) <= get_l1_code_start() + L1_CODE_LENGTH) {
safe_dma_memcpy ((void *)(addr), &data, sizeof(data));
copied = sizeof(data);

24
arch/blackfin/kernel/reboot.c
View File

@ -21,7 +21,7 @@
* the core reset.
*/
__attribute__((l1_text))
static void bfin_reset(void)
static void _bfin_reset(void)
{
/* Wait for completion of "system" events such as cache line
* line fills so that we avoid infinite stalls later on as
@ -66,6 +66,18 @@ static void bfin_reset(void)
}
}
static void bfin_reset(void)
{
if (ANOMALY_05000353 || ANOMALY_05000386)
_bfin_reset();
else
/* the bootrom checks to see how it was reset and will
* automatically perform a software reset for us when
* it starts executing boot
*/
asm("raise 1;");
}
__attribute__((weak))
void native_machine_restart(char *cmd)
{
@ -75,14 +87,10 @@ void machine_restart(char *cmd)
{
native_machine_restart(cmd);
local_irq_disable();
if (ANOMALY_05000353 || ANOMALY_05000386)
bfin_reset();
if (smp_processor_id())
smp_call_function((void *)bfin_reset, 0, 1);
else
/* the bootrom checks to see how it was reset and will
* automatically perform a software reset for us when
* it starts executing boot
*/
asm("raise 1;");
bfin_reset();
}
__attribute__((weak))

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