ARM: 5674/1: Add clocksource/clockevent support for w90p910 platform
Add clocksource/clockevent support for w90p910 platform. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
wanzongshun
Russell King
parent
ae45b1c618
commit
58b5369e6e
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@ -495,6 +495,8 @@ config ARCH_W90X900
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select GENERIC_GPIO
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select HAVE_CLK
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select COMMON_CLKDEV
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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help
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Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
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can login www.mcuos.com or www.nuvoton.com to know more.
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@ -55,6 +55,12 @@ void clk_disable(struct clk *clk)
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return 15000000;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void w90x900_clk_enable(struct clk *clk, int enable)
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{
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unsigned int clocks = clk->cken;
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@ -3,7 +3,7 @@
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*
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* Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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* Copyright (c) 2009 Nuvoton technology corporation
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* All rights reserved.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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@ -23,6 +23,8 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <asm/mach-types.h>
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#include <asm/mach/irq.h>
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@ -31,49 +33,150 @@
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#include <mach/map.h>
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#include <mach/regs-timer.h>
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static unsigned long w90x900_gettimeoffset(void)
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#define RESETINT 0x1f
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#define PERIOD (0x01 << 27)
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#define ONESHOT (0x00 << 27)
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#define COUNTEN (0x01 << 30)
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#define INTEN (0x01 << 29)
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#define TICKS_PER_SEC 100
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#define PRESCALE 0x63 /* Divider = prescale + 1 */
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unsigned int timer0_load;
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static void w90p910_clockevent_setmode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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unsigned int val;
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val = __raw_readl(REG_TCSR0);
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val &= ~(0x03 << 27);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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__raw_writel(timer0_load, REG_TICR0);
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val |= (PERIOD | COUNTEN | INTEN | PRESCALE);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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val |= (ONESHOT | COUNTEN | INTEN | PRESCALE);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_RESUME:
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break;
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}
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__raw_writel(val, REG_TCSR0);
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}
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static int w90p910_clockevent_setnextevent(unsigned long evt,
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struct clock_event_device *clk)
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{
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unsigned int val;
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__raw_writel(evt, REG_TICR0);
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val = __raw_readl(REG_TCSR0);
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val |= (COUNTEN | INTEN | PRESCALE);
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__raw_writel(val, REG_TCSR0);
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return 0;
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}
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static struct clock_event_device w90p910_clockevent_device = {
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.name = "w90p910-timer0",
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.shift = 32,
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.features = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = w90p910_clockevent_setmode,
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.set_next_event = w90p910_clockevent_setnextevent,
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.rating = 300,
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};
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/*IRQ handler for the timer*/
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static irqreturn_t
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w90x900_timer_interrupt(int irq, void *dev_id)
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static irqreturn_t w90p910_timer0_interrupt(int irq, void *dev_id)
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{
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timer_tick();
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struct clock_event_device *evt = &w90p910_clockevent_device;
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__raw_writel(0x01, REG_TISR); /* clear TIF0 */
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction w90x900_timer_irq = {
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.name = "w90x900 Timer Tick",
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static struct irqaction w90p910_timer0_irq = {
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.name = "w90p910-timer0",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = w90x900_timer_interrupt,
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.handler = w90p910_timer0_interrupt,
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};
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/*Set up timer reg.*/
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static void w90x900_timer_setup(void)
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static void __init w90p910_clockevents_init(unsigned int rate)
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{
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__raw_writel(0, REG_TCSR0);
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__raw_writel(0, REG_TCSR1);
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__raw_writel(0, REG_TCSR2);
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__raw_writel(0, REG_TCSR3);
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__raw_writel(0, REG_TCSR4);
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__raw_writel(0x1F, REG_TISR);
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__raw_writel(15000000/(100 * 100), REG_TICR0);
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__raw_writel(0x68000063, REG_TCSR0);
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w90p910_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
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w90p910_clockevent_device.shift);
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w90p910_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
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&w90p910_clockevent_device);
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w90p910_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf,
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&w90p910_clockevent_device);
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w90p910_clockevent_device.cpumask = cpumask_of(0);
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clockevents_register_device(&w90p910_clockevent_device);
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}
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static void __init w90x900_timer_init(void)
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static cycle_t w90p910_get_cycles(struct clocksource *cs)
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{
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w90x900_timer_setup();
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setup_irq(IRQ_TIMER0, &w90x900_timer_irq);
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return ~__raw_readl(REG_TDR1);
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}
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static struct clocksource clocksource_w90p910 = {
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.name = "w90p910-timer1",
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.rating = 200,
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.read = w90p910_get_cycles,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static void __init w90p910_clocksource_init(unsigned int rate)
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{
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unsigned int val;
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__raw_writel(0xffffffff, REG_TICR1);
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val = __raw_readl(REG_TCSR1);
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val |= (COUNTEN | PERIOD);
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__raw_writel(val, REG_TCSR1);
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clocksource_w90p910.mult =
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clocksource_khz2mult((rate / 1000), clocksource_w90p910.shift);
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clocksource_register(&clocksource_w90p910);
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}
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static void __init w90p910_timer_init(void)
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{
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struct clk *ck_ext = clk_get(NULL, "ext");
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unsigned int rate;
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BUG_ON(IS_ERR(ck_ext));
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rate = clk_get_rate(ck_ext);
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clk_put(ck_ext);
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rate = rate / (PRESCALE + 0x01);
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/* set a known state */
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__raw_writel(0x00, REG_TCSR0);
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__raw_writel(0x00, REG_TCSR1);
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__raw_writel(RESETINT, REG_TISR);
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timer0_load = (rate / TICKS_PER_SEC);
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setup_irq(IRQ_TIMER0, &w90p910_timer0_irq);
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w90p910_clocksource_init(rate);
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w90p910_clockevents_init(rate);
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}
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struct sys_timer w90x900_timer = {
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.init = w90x900_timer_init,
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.offset = w90x900_gettimeoffset,
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.resume = w90x900_timer_setup
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.init = w90p910_timer_init,
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};
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@ -76,6 +76,7 @@ static DEFINE_CLK(wdt, 26);
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static DEFINE_CLK(gdma, 27);
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static DEFINE_CLK(adc, 28);
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static DEFINE_CLK(usi, 29);
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static DEFINE_CLK(ext, 0);
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static struct clk_lookup w90p910_clkregs[] = {
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DEF_CLKLOOK(&clk_lcd, "w90p910-lcd", NULL),
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@ -97,6 +98,7 @@ static struct clk_lookup w90p910_clkregs[] = {
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DEF_CLKLOOK(&clk_gdma, "w90p910-gdma", NULL),
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DEF_CLKLOOK(&clk_adc, "w90p910-adc", NULL),
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DEF_CLKLOOK(&clk_usi, "w90p910-spi", NULL),
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DEF_CLKLOOK(&clk_ext, NULL, "ext"),
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};
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/* Initial serial platform data */
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