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Merge branch 'core' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile into perf/core

This commit is contained in:
Ingo Molnar 2010-12-30 11:26:45 +01:00
parent 32ae2ade46 da169f5df2
commit 56f4c40034
3 changed files with 43 additions and 18 deletions
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4
arch/x86/include/asm/msr-index.h
View File

@ -123,6 +123,10 @@
#define MSR_AMD64_IBSCTL 0xc001103a #define MSR_AMD64_IBSCTL 0xc001103a
#define MSR_AMD64_IBSBRTARGET 0xc001103b #define MSR_AMD64_IBSBRTARGET 0xc001103b
/* Fam 15h MSRs */
#define MSR_F15H_PERF_CTL 0xc0010200
#define MSR_F15H_PERF_CTR 0xc0010201
/* Fam 10h MSRs */ /* Fam 10h MSRs */
#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058 #define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
#define FAM10H_MMIO_CONF_ENABLE (1<<0) #define FAM10H_MMIO_CONF_ENABLE (1<<0)

3
arch/x86/oprofile/nmi_int.c
View File

@ -732,6 +732,9 @@ int __init op_nmi_init(struct oprofile_operations *ops)
case 0x14: case 0x14:
cpu_type = "x86-64/family14h"; cpu_type = "x86-64/family14h";
break; break;
case 0x15:
cpu_type = "x86-64/family15h";
break;
default: default:
return -ENODEV; return -ENODEV;
} }

54
arch/x86/oprofile/op_model_amd.c
View File

@ -29,11 +29,12 @@
#include "op_x86_model.h" #include "op_x86_model.h"
#include "op_counter.h" #include "op_counter.h"
#define NUM_COUNTERS 4 #define NUM_COUNTERS 4
#define NUM_COUNTERS_F15H 6
#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
#define NUM_VIRT_COUNTERS 32 #define NUM_VIRT_COUNTERS 32
#else #else
#define NUM_VIRT_COUNTERS NUM_COUNTERS #define NUM_VIRT_COUNTERS 0
#endif #endif
#define OP_EVENT_MASK 0x0FFF #define OP_EVENT_MASK 0x0FFF
@ -41,7 +42,8 @@
#define MSR_AMD_EVENTSEL_RESERVED ((0xFFFFFCF0ULL<<32)|(1ULL<<21)) #define MSR_AMD_EVENTSEL_RESERVED ((0xFFFFFCF0ULL<<32)|(1ULL<<21))
static unsigned long reset_value[NUM_VIRT_COUNTERS]; static int num_counters;
static unsigned long reset_value[OP_MAX_COUNTER];
#define IBS_FETCH_SIZE 6 #define IBS_FETCH_SIZE 6
#define IBS_OP_SIZE 12 #define IBS_OP_SIZE 12
@ -387,7 +389,7 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
int i; int i;
/* enable active counters */ /* enable active counters */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
int virt = op_x86_phys_to_virt(i); int virt = op_x86_phys_to_virt(i);
if (!reset_value[virt]) if (!reset_value[virt])
continue; continue;
@ -406,7 +408,7 @@ static void op_amd_shutdown(struct op_msrs const * const msrs)
{ {
int i; int i;
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
if (!msrs->counters[i].addr) if (!msrs->counters[i].addr)
continue; continue;
release_perfctr_nmi(MSR_K7_PERFCTR0 + i); release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
@ -418,7 +420,7 @@ static int op_amd_fill_in_addresses(struct op_msrs * const msrs)
{ {
int i; int i;
for (i = 0; i < NUM_COUNTERS; i++) { for (i = 0; i < num_counters; i++) {
if (!reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i)) if (!reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
goto fail; goto fail;
if (!reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i)) { if (!reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i)) {
@ -426,8 +428,13 @@ static int op_amd_fill_in_addresses(struct op_msrs * const msrs)
goto fail; goto fail;
} }
/* both registers must be reserved */ /* both registers must be reserved */
msrs->counters[i].addr = MSR_K7_PERFCTR0 + i; if (num_counters == NUM_COUNTERS_F15H) {
msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i; msrs->counters[i].addr = MSR_F15H_PERF_CTR + (i << 1);
msrs->controls[i].addr = MSR_F15H_PERF_CTL + (i << 1);
} else {
msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
}
continue; continue;
fail: fail:
if (!counter_config[i].enabled) if (!counter_config[i].enabled)
@ -447,7 +454,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
int i; int i;
/* setup reset_value */ /* setup reset_value */
for (i = 0; i < NUM_VIRT_COUNTERS; ++i) { for (i = 0; i < OP_MAX_COUNTER; ++i) {
if (counter_config[i].enabled if (counter_config[i].enabled
&& msrs->counters[op_x86_virt_to_phys(i)].addr) && msrs->counters[op_x86_virt_to_phys(i)].addr)
reset_value[i] = counter_config[i].count; reset_value[i] = counter_config[i].count;
@ -456,7 +463,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
} }
/* clear all counters */ /* clear all counters */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
if (!msrs->controls[i].addr) if (!msrs->controls[i].addr)
continue; continue;
rdmsrl(msrs->controls[i].addr, val); rdmsrl(msrs->controls[i].addr, val);
@ -472,7 +479,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
} }
/* enable active counters */ /* enable active counters */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
int virt = op_x86_phys_to_virt(i); int virt = op_x86_phys_to_virt(i);
if (!reset_value[virt]) if (!reset_value[virt])
continue; continue;
@ -503,7 +510,7 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
u64 val; u64 val;
int i; int i;
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
int virt = op_x86_phys_to_virt(i); int virt = op_x86_phys_to_virt(i);
if (!reset_value[virt]) if (!reset_value[virt])
continue; continue;
@ -526,7 +533,7 @@ static void op_amd_start(struct op_msrs const * const msrs)
u64 val; u64 val;
int i; int i;
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
if (!reset_value[op_x86_phys_to_virt(i)]) if (!reset_value[op_x86_phys_to_virt(i)])
continue; continue;
rdmsrl(msrs->controls[i].addr, val); rdmsrl(msrs->controls[i].addr, val);
@ -546,7 +553,7 @@ static void op_amd_stop(struct op_msrs const * const msrs)
* Subtle: stop on all counters to avoid race with setting our * Subtle: stop on all counters to avoid race with setting our
* pm callback * pm callback
*/ */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < num_counters; ++i) {
if (!reset_value[op_x86_phys_to_virt(i)]) if (!reset_value[op_x86_phys_to_virt(i)])
continue; continue;
rdmsrl(msrs->controls[i].addr, val); rdmsrl(msrs->controls[i].addr, val);
@ -698,18 +705,29 @@ static int setup_ibs_files(struct super_block *sb, struct dentry *root)
return 0; return 0;
} }
struct op_x86_model_spec op_amd_spec;
static int op_amd_init(struct oprofile_operations *ops) static int op_amd_init(struct oprofile_operations *ops)
{ {
init_ibs(); init_ibs();
create_arch_files = ops->create_files; create_arch_files = ops->create_files;
ops->create_files = setup_ibs_files; ops->create_files = setup_ibs_files;
if (boot_cpu_data.x86 == 0x15) {
num_counters = NUM_COUNTERS_F15H;
} else {
num_counters = NUM_COUNTERS;
}
op_amd_spec.num_counters = num_counters;
op_amd_spec.num_controls = num_counters;
op_amd_spec.num_virt_counters = max(num_counters, NUM_VIRT_COUNTERS);
return 0; return 0;
} }
struct op_x86_model_spec op_amd_spec = { struct op_x86_model_spec op_amd_spec = {
.num_counters = NUM_COUNTERS, /* num_counters/num_controls filled in at runtime */
.num_controls = NUM_COUNTERS,
.num_virt_counters = NUM_VIRT_COUNTERS,
.reserved = MSR_AMD_EVENTSEL_RESERVED, .reserved = MSR_AMD_EVENTSEL_RESERVED,
.event_mask = OP_EVENT_MASK, .event_mask = OP_EVENT_MASK,
.init = op_amd_init, .init = op_amd_init,