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[ARM] Add old Feroceon support to compressed/head.S 

This patch supports the cache handling for some old Feroceon cores for
which the CPU ID is like 0x41159260.  This is a complement to
commit ab6d15d506.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Joonyoung Shim 2009-06-16 20:05:57 +09:00 committed by Nicolas Pitre
parent 3fade49b73
commit 5587931c30
1 changed files with 9 additions and 0 deletions
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9
arch/arm/boot/compressed/head.S
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@ -674,6 +674,15 @@ proc_types:
b __armv4_mmu_cache_off
b __armv5tej_mmu_cache_flush
#ifdef CONFIG_CPU_FEROCEON_OLD_ID
/* this conflicts with the standard ARMv5TE entry */
.long 0x41009260 @ Old Feroceon
.long 0xff00fff0
b __armv4_mmu_cache_on
b __armv4_mmu_cache_off
b __armv5tej_mmu_cache_flush
#endif
.word 0x66015261 @ FA526
.word 0xff01fff1
b __fa526_cache_on