IB/ipath: support new QLogic product naming scheme
This patch only renames files, fixes product names, and updates comments. Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
parent
092260b8f9
commit
525d0ca1d4
7 changed files with 68 additions and 71 deletions
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@ -10,7 +10,8 @@ ib_ipath-y := \
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ipath_eeprom.o \
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ipath_file_ops.o \
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ipath_fs.o \
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ipath_ht400.o \
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ipath_iba6110.o \
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ipath_iba6120.o \
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ipath_init_chip.o \
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ipath_intr.o \
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ipath_keys.o \
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@ -18,7 +19,6 @@ ib_ipath-y := \
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ipath_mad.o \
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ipath_mmap.o \
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ipath_mr.o \
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ipath_pe800.o \
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ipath_qp.o \
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ipath_rc.o \
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ipath_ruc.o \
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@ -401,10 +401,10 @@ static int __devinit ipath_init_one(struct pci_dev *pdev,
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/* setup the chip-specific functions, as early as possible. */
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switch (ent->device) {
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case PCI_DEVICE_ID_INFINIPATH_HT:
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ipath_init_ht400_funcs(dd);
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ipath_init_iba6110_funcs(dd);
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break;
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case PCI_DEVICE_ID_INFINIPATH_PE800:
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ipath_init_pe800_funcs(dd);
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ipath_init_iba6120_funcs(dd);
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break;
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default:
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ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
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@ -969,7 +969,8 @@ reloop:
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*/
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if (l == hdrqtail || (i && !(i&0xf))) {
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u64 lval;
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if (l == hdrqtail) /* PE-800 interrupt only on last */
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if (l == hdrqtail)
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/* request IBA6120 interrupt only on last */
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lval = dd->ipath_rhdrhead_intr_off | l;
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else
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lval = l;
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@ -983,7 +984,7 @@ reloop:
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}
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if (!dd->ipath_rhdrhead_intr_off && !reloop) {
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/* HT-400 workaround; we can have a race clearing chip
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/* IBA6110 workaround; we can have a race clearing chip
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* interrupt with another interrupt about to be delivered,
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* and can clear it before it is delivered on the GPIO
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* workaround. By doing the extra check here for the
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@ -1110,7 +1110,7 @@ static int ipath_mmap(struct file *fp, struct vm_area_struct *vma)
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ret = mmap_rcvegrbufs(vma, pd);
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else if (pgaddr == (u64) pd->port_rcvhdrq_phys) {
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/*
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* The rcvhdrq itself; readonly except on HT-400 (so have
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* The rcvhdrq itself; readonly except on HT (so have
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* to allow writable mapping), multiple pages, contiguous
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* from an i/o perspective.
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*/
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@ -1298,14 +1298,14 @@ static int find_best_unit(struct file *fp)
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* This code is present to allow a knowledgeable person to
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* specify the layout of processes to processors before opening
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* this driver, and then we'll assign the process to the "closest"
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* HT-400 to that processor (we assume reasonable connectivity,
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* InfiniPath chip to that processor (we assume reasonable connectivity,
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* for now). This code assumes that if affinity has been set
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* before this point, that at most one cpu is set; for now this
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* is reasonable. I check for both cpus_empty() and cpus_full(),
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* in case some kernel variant sets none of the bits when no
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* affinity is set. 2.6.11 and 12 kernels have all present
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* cpus set. Some day we'll have to fix it up further to handle
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* a cpu subset. This algorithm fails for two HT-400's connected
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* a cpu subset. This algorithm fails for two HT chips connected
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* in tunnel fashion. Eventually this needs real topology
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* information. There may be some issues with dual core numbering
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* as well. This needs more work prior to release.
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@ -33,7 +33,7 @@
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/*
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* This file contains all of the code that is specific to the InfiniPath
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* HT-400 chip.
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* HT chip.
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*/
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#include <linux/pci.h>
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@ -43,7 +43,7 @@
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#include "ipath_registers.h"
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/*
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* This lists the InfiniPath HT400 registers, in the actual chip layout.
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* This lists the InfiniPath registers, in the actual chip layout.
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* This structure should never be directly accessed.
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*
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* The names are in InterCap form because they're taken straight from
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@ -537,7 +537,7 @@ static void ipath_ht_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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if (hwerrs & INFINIPATH_HWE_HTCMISCERR7)
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strlcat(msg, "[HT core Misc7]", msgl);
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if (hwerrs & INFINIPATH_HWE_MEMBISTFAILED) {
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strlcat(msg, "[Memory BIST test failed, HT-400 unusable]",
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strlcat(msg, "[Memory BIST test failed, InfiniPath hardware unusable]",
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msgl);
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/* ignore from now on, so disable until driver reloaded */
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dd->ipath_hwerrmask &= ~INFINIPATH_HWE_MEMBISTFAILED;
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@ -553,7 +553,7 @@ static void ipath_ht_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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if (hwerrs & _IPATH_PLL_FAIL) {
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snprintf(bitsmsg, sizeof bitsmsg,
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"[PLL failed (%llx), HT-400 unusable]",
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"[PLL failed (%llx), InfiniPath hardware unusable]",
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(unsigned long long) (hwerrs & _IPATH_PLL_FAIL));
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strlcat(msg, bitsmsg, msgl);
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/* ignore from now on, so disable until driver reloaded */
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@ -610,18 +610,18 @@ static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
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break;
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case 5:
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/*
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* HT-460 original production board; two production levels, with
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* original production board; two production levels, with
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* different serial number ranges. See ipath_ht_early_init() for
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* case where we enable IPATH_GPIO_INTR for later serial # range.
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*/
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n = "InfiniPath_HT-460";
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n = "InfiniPath_QHT7040";
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break;
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case 6:
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n = "OEM_Board_3";
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break;
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case 7:
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/* HT-460 small form factor production board */
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n = "InfiniPath_HT-465";
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/* small form factor production board */
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n = "InfiniPath_QHT7140";
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break;
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case 8:
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n = "LS/X-1";
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@ -633,7 +633,7 @@ static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
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n = "OEM_Board_2";
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break;
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case 11:
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n = "InfiniPath_HT-470";
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n = "InfiniPath_HT-470"; /* obsoleted */
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break;
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case 12:
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n = "OEM_Board_4";
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@ -641,7 +641,7 @@ static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
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default: /* don't know, just print the number */
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ipath_dev_err(dd, "Don't yet know about board "
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"with ID %u\n", boardrev);
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snprintf(name, namelen, "Unknown_InfiniPath_HT-4xx_%u",
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snprintf(name, namelen, "Unknown_InfiniPath_QHT7xxx_%u",
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boardrev);
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break;
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}
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@ -650,11 +650,10 @@ static int ipath_ht_boardname(struct ipath_devdata *dd, char *name,
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if (dd->ipath_majrev != 3 || (dd->ipath_minrev < 2 || dd->ipath_minrev > 3)) {
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/*
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* This version of the driver only supports the HT-400
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* Rev 3.2
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* This version of the driver only supports Rev 3.2 and 3.3
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*/
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ipath_dev_err(dd,
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"Unsupported HT-400 revision %u.%u!\n",
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"Unsupported InfiniPath hardware revision %u.%u!\n",
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dd->ipath_majrev, dd->ipath_minrev);
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ret = 1;
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goto bail;
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@ -738,7 +737,7 @@ static void ipath_check_htlink(struct ipath_devdata *dd)
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static int ipath_setup_ht_reset(struct ipath_devdata *dd)
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{
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ipath_dbg("No reset possible for HT-400\n");
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ipath_dbg("No reset possible for this InfiniPath hardware\n");
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return 0;
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}
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@ -925,7 +924,7 @@ static int set_int_handler(struct ipath_devdata *dd, struct pci_dev *pdev,
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/*
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* kernels with CONFIG_PCI_MSI set the vector in the irq field of
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* struct pci_device, so we use that to program the HT-400 internal
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* struct pci_device, so we use that to program the internal
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* interrupt register (not config space) with that value. The BIOS
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* must still have done the basic MSI setup.
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*/
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@ -1013,7 +1012,7 @@ bail:
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* @dd: the infinipath device
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*
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* Called during driver unload.
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* This is currently a nop for the HT-400, not for all chips
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* This is currently a nop for the HT chip, not for all chips
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*/
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static void ipath_setup_ht_cleanup(struct ipath_devdata *dd)
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{
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@ -1470,7 +1469,7 @@ static int ipath_ht_early_init(struct ipath_devdata *dd)
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dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;
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/*
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* For HT-400, we allocate a somewhat overly large eager buffer,
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* For HT, we allocate a somewhat overly large eager buffer,
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* such that we can guarantee that we can receive the largest
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* packet that we can send out. To truly support a 4KB MTU,
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* we need to bump this to a large value. To date, other than
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@ -1531,7 +1530,7 @@ static int ipath_ht_early_init(struct ipath_devdata *dd)
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if(dd->ipath_boardrev == 5 && dd->ipath_serial[0] == '1' &&
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dd->ipath_serial[1] == '2' && dd->ipath_serial[2] == '8') {
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/*
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* Later production HT-460 has same changes as HT-465, so
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* Later production QHT7040 has same changes as QHT7140, so
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* can use GPIO interrupts. They have serial #'s starting
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* with 128, rather than 112.
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*/
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@ -1560,13 +1559,13 @@ static int ipath_ht_get_base_info(struct ipath_portdata *pd, void *kbase)
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}
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/**
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* ipath_init_ht400_funcs - set up the chip-specific function pointers
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* ipath_init_iba6110_funcs - set up the chip-specific function pointers
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* @dd: the infinipath device
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*
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* This is global, and is called directly at init to set up the
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* chip-specific function pointers for later use.
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*/
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void ipath_init_ht400_funcs(struct ipath_devdata *dd)
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void ipath_init_iba6110_funcs(struct ipath_devdata *dd)
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{
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dd->ipath_f_intrsetup = ipath_ht_intconfig;
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dd->ipath_f_bus = ipath_setup_ht_config;
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@ -32,7 +32,7 @@
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*/
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/*
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* This file contains all of the code that is specific to the
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* InfiniPath PE-800 chip.
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* InfiniPath PCIe chip.
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*/
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#include <linux/interrupt.h>
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/*
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* This file contains all the chip-specific register information and
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* access functions for the QLogic InfiniPath PE800, the PCI-Express chip.
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* access functions for the QLogic InfiniPath PCI-Express chip.
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*
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* This lists the InfiniPath PE800 registers, in the actual chip layout.
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* This lists the InfiniPath registers, in the actual chip layout.
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* This structure should never be directly accessed.
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*/
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struct _infinipath_do_not_use_kernel_regs {
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@ -213,7 +213,6 @@ static const struct ipath_kregs ipath_pe_kregs = {
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.kr_rcvhdraddr = IPATH_KREG_OFFSET(RcvHdrAddr0),
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.kr_rcvhdrtailaddr = IPATH_KREG_OFFSET(RcvHdrTailAddr0),
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/* This group is pe-800-specific; and used only in this file */
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/* The rcvpktled register controls one of the debug port signals, so
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* a packet activity LED can be connected to it. */
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.kr_rcvpktledcnt = IPATH_KREG_OFFSET(RcvPktLEDCnt),
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@ -388,7 +387,7 @@ static void ipath_pe_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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*msg = '\0';
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if (hwerrs & INFINIPATH_HWE_MEMBISTFAILED) {
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strlcat(msg, "[Memory BIST test failed, PE-800 unusable]",
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strlcat(msg, "[Memory BIST test failed, InfiniPath hardware unusable]",
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msgl);
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/* ignore from now on, so disable until driver reloaded */
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*dd->ipath_statusp |= IPATH_STATUS_HWERROR;
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@ -433,7 +432,7 @@ static void ipath_pe_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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if (hwerrs & _IPATH_PLL_FAIL) {
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snprintf(bitsmsg, sizeof bitsmsg,
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"[PLL failed (%llx), PE-800 unusable]",
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"[PLL failed (%llx), InfiniPath hardware unusable]",
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(unsigned long long) hwerrs & _IPATH_PLL_FAIL);
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strlcat(msg, bitsmsg, msgl);
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/* ignore from now on, so disable until driver reloaded */
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@ -511,22 +510,25 @@ static int ipath_pe_boardname(struct ipath_devdata *dd, char *name,
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n = "InfiniPath_Emulation";
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break;
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case 1:
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n = "InfiniPath_PE-800-Bringup";
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n = "InfiniPath_QLE7140-Bringup";
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break;
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case 2:
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n = "InfiniPath_PE-880";
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n = "InfiniPath_QLE7140";
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break;
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case 3:
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n = "InfiniPath_PE-850";
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n = "InfiniPath_QMI7140";
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break;
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case 4:
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n = "InfiniPath_PE-860";
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n = "InfiniPath_QEM7140";
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break;
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case 5:
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n = "InfiniPath_QMH7140";
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break;
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default:
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ipath_dev_err(dd,
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"Don't yet know about board with ID %u\n",
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boardrev);
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snprintf(name, namelen, "Unknown_InfiniPath_PE-8xx_%u",
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snprintf(name, namelen, "Unknown_InfiniPath_PCIe_%u",
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boardrev);
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break;
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}
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@ -534,7 +536,7 @@ static int ipath_pe_boardname(struct ipath_devdata *dd, char *name,
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snprintf(name, namelen, "%s", n);
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if (dd->ipath_majrev != 4 || !dd->ipath_minrev || dd->ipath_minrev>2) {
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ipath_dev_err(dd, "Unsupported PE-800 revision %u.%u!\n",
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ipath_dev_err(dd, "Unsupported InfiniPath hardware revision %u.%u!\n",
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dd->ipath_majrev, dd->ipath_minrev);
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ret = 1;
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} else
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@ -705,7 +707,7 @@ static void ipath_pe_quiet_serdes(struct ipath_devdata *dd)
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ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
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}
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/* this is not yet needed on the PE800, so just return 0. */
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/* this is not yet needed on this chip, so just return 0. */
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static int ipath_pe_intconfig(struct ipath_devdata *dd)
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{
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return 0;
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@ -759,8 +761,8 @@ static void ipath_setup_pe_setextled(struct ipath_devdata *dd, u64 lst,
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*
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* This is called during driver unload.
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* We do the pci_disable_msi here, not in generic code, because it
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* isn't used for the HT-400. If we do end up needing pci_enable_msi
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* at some point in the future for HT-400, we'll move the call back
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* isn't used for the HT chips. If we do end up needing pci_enable_msi
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* at some point in the future for HT, we'll move the call back
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* into the main init_one code.
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*/
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static void ipath_setup_pe_cleanup(struct ipath_devdata *dd)
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@ -780,10 +782,10 @@ static void ipath_setup_pe_cleanup(struct ipath_devdata *dd)
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* late in 2.6.16).
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* All that can be done is to edit the kernel source to remove the quirk
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* check until that is fixed.
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* We do not need to call enable_msi() for our HyperTransport chip (HT-400),
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* even those it uses MSI, and we want to avoid the quirk warning, so
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* So we call enable_msi only for the PE-800. If we do end up needing
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* pci_enable_msi at some point in the future for HT-400, we'll move the
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* We do not need to call enable_msi() for our HyperTransport chip,
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* even though it uses MSI, and we want to avoid the quirk warning, so
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* So we call enable_msi only for PCIe. If we do end up needing
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* pci_enable_msi at some point in the future for HT, we'll move the
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* call back into the main init_one code.
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* We save the msi lo and hi values, so we can restore them after
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* chip reset (the kernel PCI infrastructure doesn't yet handle that
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@ -971,8 +973,7 @@ static int ipath_setup_pe_reset(struct ipath_devdata *dd)
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int ret;
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/* Use ERROR so it shows up in logs, etc. */
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ipath_dev_err(dd, "Resetting PE-800 unit %u\n",
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dd->ipath_unit);
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ipath_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->ipath_unit);
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/* keep chip from being accessed in a few places */
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dd->ipath_flags &= ~(IPATH_INITTED|IPATH_PRESENT);
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val = dd->ipath_control | INFINIPATH_C_RESET;
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@ -1078,7 +1079,7 @@ static void ipath_pe_put_tid(struct ipath_devdata *dd, u64 __iomem *tidptr,
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* @port: the port
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*
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* clear all TID entries for a port, expected and eager.
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* Used from ipath_close(). On PE800, TIDs are only 32 bits,
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* Used from ipath_close(). On this chip, TIDs are only 32 bits,
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* not 64, but they are still on 64 bit boundaries, so tidbase
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* is declared as u64 * for the pointer math, even though we write 32 bits
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*/
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@ -1148,9 +1149,9 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
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dd->ipath_flags |= IPATH_4BYTE_TID;
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/*
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* For openib, we need to be able to handle an IB header of 96 bytes
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* or 24 dwords. HT-400 has arbitrary sized receive buffers, so we
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* made them the same size as the PIO buffers. The PE-800 does not
|
||||
* For openfabrics, we need to be able to handle an IB header of
|
||||
* 24 dwords. HT chip has arbitrary sized receive buffers, so we
|
||||
* made them the same size as the PIO buffers. This chip does not
|
||||
* handle arbitrary size buffers, so we need the header large enough
|
||||
* to handle largest IB header, but still have room for a 2KB MTU
|
||||
* standard IB packet.
|
||||
|
@ -1158,11 +1159,10 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
|
|||
dd->ipath_rcvhdrentsize = 24;
|
||||
dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;
|
||||
|
||||
/* For HT-400, we allocate a somewhat overly large eager buffer,
|
||||
* such that we can guarantee that we can receive the largest packet
|
||||
* that we can send out. To truly support a 4KB MTU, we need to
|
||||
* bump this to a larger value. We'll do this when I get around to
|
||||
* testing 4KB sends on the PE-800, which I have not yet done.
|
||||
/*
|
||||
* To truly support a 4KB MTU (for usermode), we need to
|
||||
* bump this to a larger value. For now, we use them for
|
||||
* the kernel only.
|
||||
*/
|
||||
dd->ipath_rcvegrbufsize = 2048;
|
||||
/*
|
||||
|
@ -1175,9 +1175,9 @@ static int ipath_pe_early_init(struct ipath_devdata *dd)
|
|||
dd->ipath_init_ibmaxlen = dd->ipath_ibmaxlen;
|
||||
|
||||
/*
|
||||
* For PE-800, we can request a receive interrupt for 1 or
|
||||
* We can request a receive interrupt for 1 or
|
||||
* more packets from current offset. For now, we set this
|
||||
* up for a single packet, to match the HT-400 behavior.
|
||||
* up for a single packet.
|
||||
*/
|
||||
dd->ipath_rhdrhead_intr_off = 1ULL<<32;
|
||||
|
||||
|
@ -1216,13 +1216,13 @@ static int ipath_pe_get_base_info(struct ipath_portdata *pd, void *kbase)
|
|||
}
|
||||
|
||||
/**
|
||||
* ipath_init_pe800_funcs - set up the chip-specific function pointers
|
||||
* ipath_init_iba6120_funcs - set up the chip-specific function pointers
|
||||
* @dd: the infinipath device
|
||||
*
|
||||
* This is global, and is called directly at init to set up the
|
||||
* chip-specific function pointers for later use.
|
||||
*/
|
||||
void ipath_init_pe800_funcs(struct ipath_devdata *dd)
|
||||
void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
|
||||
{
|
||||
dd->ipath_f_intrsetup = ipath_pe_intconfig;
|
||||
dd->ipath_f_bus = ipath_setup_pe_config;
|
|
@ -236,7 +236,7 @@ struct ipath_devdata {
|
|||
u64 ipath_tidtemplate;
|
||||
/* value to write to free TIDs */
|
||||
u64 ipath_tidinvalid;
|
||||
/* PE-800 rcv interrupt setup */
|
||||
/* IBA6120 rcv interrupt setup */
|
||||
u64 ipath_rhdrhead_intr_off;
|
||||
|
||||
/* size of memory at ipath_kregbase */
|
||||
|
@ -621,10 +621,8 @@ void ipath_free_data(struct ipath_portdata *dd);
|
|||
int ipath_waitfor_mdio_cmdready(struct ipath_devdata *);
|
||||
int ipath_waitfor_complete(struct ipath_devdata *, ipath_kreg, u64, u64 *);
|
||||
u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
|
||||
/* init PE-800-specific func */
|
||||
void ipath_init_pe800_funcs(struct ipath_devdata *);
|
||||
/* init HT-400-specific func */
|
||||
void ipath_init_ht400_funcs(struct ipath_devdata *);
|
||||
void ipath_init_iba6120_funcs(struct ipath_devdata *);
|
||||
void ipath_init_iba6110_funcs(struct ipath_devdata *);
|
||||
void ipath_get_eeprom_info(struct ipath_devdata *);
|
||||
u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
|
||||
|
||||
|
|
|
@ -36,8 +36,7 @@
|
|||
|
||||
/*
|
||||
* This file should only be included by kernel source, and by the diags. It
|
||||
* defines the registers, and their contents, for the InfiniPath HT-400
|
||||
* chip.
|
||||
* defines the registers, and their contents, for InfiniPath chips.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -286,7 +285,7 @@
|
|||
|
||||
#define INFINIPATH_RT_ADDR_MASK 0xFFFFFFFFFFULL /* 40 bits valid */
|
||||
|
||||
/* TID entries (memory), HT400-only */
|
||||
/* TID entries (memory), HT-only */
|
||||
#define INFINIPATH_RT_VALID 0x8000000000000000ULL
|
||||
#define INFINIPATH_RT_ADDR_SHIFT 0
|
||||
#define INFINIPATH_RT_BUFSIZE_MASK 0x3FFF
|
||||
|
|
Reference in a new issue