microblaze: Add libgcc function directly to kernel
Replaced libgcc functions with asm optimized implementation. Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Michal Simek
parent
cec051671d
commit
4e07dba7cb
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@ -42,11 +42,8 @@ KBUILD_CFLAGS += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
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LDFLAGS :=
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LDFLAGS_vmlinux :=
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LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
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head-y := arch/microblaze/kernel/head.o
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libs-y += arch/microblaze/lib/
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libs-y += $(LIBGCC)
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core-y += arch/microblaze/kernel/
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core-y += arch/microblaze/mm/
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core-y += arch/microblaze/platform/
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@ -21,31 +21,6 @@
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#include <linux/ftrace.h>
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#include <linux/uaccess.h>
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/*
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* libgcc functions - functions that are used internally by the
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* compiler... (prototypes are not correct though, but that
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* doesn't really matter since they're not versioned).
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*/
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extern void __ashldi3(void);
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EXPORT_SYMBOL(__ashldi3);
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extern void __ashrdi3(void);
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EXPORT_SYMBOL(__ashrdi3);
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extern void __divsi3(void);
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EXPORT_SYMBOL(__divsi3);
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extern void __lshrdi3(void);
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EXPORT_SYMBOL(__lshrdi3);
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extern void __modsi3(void);
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EXPORT_SYMBOL(__modsi3);
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extern void __mulsi3(void);
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EXPORT_SYMBOL(__mulsi3);
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extern void __muldi3(void);
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EXPORT_SYMBOL(__muldi3);
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extern void __ucmpdi2(void);
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EXPORT_SYMBOL(__ucmpdi2);
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extern void __udivsi3(void);
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EXPORT_SYMBOL(__udivsi3);
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extern void __umodsi3(void);
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EXPORT_SYMBOL(__umodsi3);
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extern char *_ebss;
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EXPORT_SYMBOL_GPL(_ebss);
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#ifdef CONFIG_FUNCTION_TRACER
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@ -11,3 +11,13 @@ lib-y += memcpy.o memmove.o
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endif
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lib-y += uaccess_old.o
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lib-y += ashldi3.o
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lib-y += ashrdi3.o
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lib-y += divsi3.o
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lib-y += lshrdi3.o
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lib-y += modsi3.o
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lib-y += muldi3.o
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lib-y += mulsi3.o
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lib-y += udivsi3.o
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lib-y += umodsi3.o
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@ -0,0 +1,29 @@
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#include <linux/module.h>
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#include "libgcc.h"
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long long __ashldi3(long long u, word_type b)
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{
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DWunion uu, w;
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word_type bm;
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if (b == 0)
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return u;
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uu.ll = u;
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bm = 32 - b;
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if (bm <= 0) {
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w.s.low = 0;
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w.s.high = (unsigned int) uu.s.low << -bm;
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} else {
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const unsigned int carries = (unsigned int) uu.s.low >> bm;
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w.s.low = (unsigned int) uu.s.low << b;
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w.s.high = ((unsigned int) uu.s.high << b) | carries;
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}
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return w.ll;
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}
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EXPORT_SYMBOL(__ashldi3);
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@ -0,0 +1,31 @@
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#include <linux/module.h>
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#include "libgcc.h"
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long long __ashrdi3(long long u, word_type b)
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{
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DWunion uu, w;
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word_type bm;
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if (b == 0)
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return u;
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uu.ll = u;
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bm = 32 - b;
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if (bm <= 0) {
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/* w.s.high = 1..1 or 0..0 */
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w.s.high =
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uu.s.high >> 31;
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w.s.low = uu.s.high >> -bm;
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} else {
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const unsigned int carries = (unsigned int) uu.s.high << bm;
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w.s.high = uu.s.high >> b;
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w.s.low = ((unsigned int) uu.s.low >> b) | carries;
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}
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return w.ll;
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}
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EXPORT_SYMBOL(__ashrdi3);
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@ -0,0 +1,73 @@
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#include <linux/linkage.h>
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/*
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* Divide operation for 32 bit integers.
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* Input : Dividend in Reg r5
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* Divisor in Reg r6
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* Output: Result in Reg r3
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*/
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.text
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.globl __divsi3
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.type __divsi3, @function
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.ent __divsi3
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__divsi3:
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.frame r1, 0, r15
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addik r1, r1, -16
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swi r28, r1, 0
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swi r29, r1, 4
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swi r30, r1, 8
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swi r31, r1, 12
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beqi r6, div_by_zero /* div_by_zero - division error */
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beqi r5, result_is_zero /* result is zero */
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bgeid r5, r5_pos
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xor r28, r5, r6 /* get the sign of the result */
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rsubi r5, r5, 0 /* make r5 positive */
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r5_pos:
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bgei r6, r6_pos
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rsubi r6, r6, 0 /* make r6 positive */
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r6_pos:
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addik r30, r0, 0 /* clear mod */
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addik r3, r0, 0 /* clear div */
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addik r29, r0, 32 /* initialize the loop count */
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/* first part try to find the first '1' in the r5 */
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div0:
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blti r5, div2 /* this traps r5 == 0x80000000 */
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div1:
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add r5, r5, r5 /* left shift logical r5 */
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bgtid r5, div1
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addik r29, r29, -1
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div2:
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/* left shift logical r5 get the '1' into the carry */
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add r5, r5, r5
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addc r30, r30, r30 /* move that bit into the mod register */
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rsub r31, r6, r30 /* try to subtract (r30 a r6) */
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blti r31, mod_too_small
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/* move the r31 to mod since the result was positive */
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or r30, r0, r31
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addik r3, r3, 1
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mod_too_small:
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addik r29, r29, -1
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beqi r29, loop_end
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add r3, r3, r3 /* shift in the '1' into div */
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bri div2 /* div2 */
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loop_end:
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bgei r28, return_here
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brid return_here
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rsubi r3, r3, 0 /* negate the result */
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div_by_zero:
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result_is_zero:
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or r3, r0, r0 /* set result to 0 */
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return_here:
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/* restore values of csrs and that of r3 and the divisor and the dividend */
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lwi r28, r1, 0
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lwi r29, r1, 4
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lwi r30, r1, 8
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lwi r31, r1, 12
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rtsd r15, 8
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addik r1, r1, 16
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.size __divsi3, . - __divsi3
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.end __divsi3
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@ -0,0 +1,25 @@
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#ifndef __ASM_LIBGCC_H
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#define __ASM_LIBGCC_H
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#include <asm/byteorder.h>
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typedef int word_type __attribute__ ((mode (__word__)));
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#ifdef __BIG_ENDIAN
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struct DWstruct {
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int high, low;
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};
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#elif defined(__LITTLE_ENDIAN)
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struct DWstruct {
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int low, high;
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};
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#else
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#error I feel sick.
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#endif
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typedef union {
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struct DWstruct s;
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long long ll;
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} DWunion;
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#endif /* __ASM_LIBGCC_H */
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@ -0,0 +1,29 @@
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#include <linux/module.h>
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#include "libgcc.h"
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long long __lshrdi3(long long u, word_type b)
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{
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DWunion uu, w;
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word_type bm;
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if (b == 0)
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return u;
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uu.ll = u;
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bm = 32 - b;
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if (bm <= 0) {
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w.s.high = 0;
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w.s.low = (unsigned int) uu.s.high >> -bm;
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} else {
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const unsigned int carries = (unsigned int) uu.s.high << bm;
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w.s.high = (unsigned int) uu.s.high >> b;
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w.s.low = ((unsigned int) uu.s.low >> b) | carries;
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}
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return w.ll;
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}
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EXPORT_SYMBOL(__lshrdi3);
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@ -0,0 +1,73 @@
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#include <linux/linkage.h>
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/*
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* modulo operation for 32 bit integers.
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* Input : op1 in Reg r5
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* op2 in Reg r6
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* Output: op1 mod op2 in Reg r3
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*/
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.text
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.globl __modsi3
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.type __modsi3, @function
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.ent __modsi3
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__modsi3:
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.frame r1, 0, r15
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addik r1, r1, -16
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swi r28, r1, 0
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swi r29, r1, 4
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swi r30, r1, 8
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swi r31, r1, 12
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beqi r6, div_by_zero /* div_by_zero division error */
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beqi r5, result_is_zero /* result is zero */
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bgeid r5, r5_pos
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/* get the sign of the result [ depends only on the first arg] */
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add r28, r5, r0
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rsubi r5, r5, 0 /* make r5 positive */
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r5_pos:
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bgei r6, r6_pos
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rsubi r6, r6, 0 /* make r6 positive */
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r6_pos:
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addik r3, r0, 0 /* clear mod */
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addik r30, r0, 0 /* clear div */
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addik r29, r0, 32 /* initialize the loop count */
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/* first part try to find the first '1' in the r5 */
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div1:
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add r5, r5, r5 /* left shift logical r5 */
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bgeid r5, div1
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addik r29, r29, -1
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div2:
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/* left shift logical r5 get the '1' into the carry */
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add r5, r5, r5
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addc r3, r3, r3 /* move that bit into the mod register */
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rsub r31, r6, r3 /* try to subtract (r30 a r6) */
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blti r31, mod_too_small
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/* move the r31 to mod since the result was positive */
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or r3, r0, r31
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addik r30, r30, 1
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mod_too_small:
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addik r29, r29, -1
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beqi r29, loop_end
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add r30, r30, r30 /* shift in the '1' into div */
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bri div2 /* div2 */
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loop_end:
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bgei r28, return_here
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brid return_here
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rsubi r3, r3, 0 /* negate the result */
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div_by_zero:
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result_is_zero:
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or r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */
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return_here:
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/* restore values of csrs and that of r3 and the divisor and the dividend */
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lwi r28, r1, 0
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lwi r29, r1, 4
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lwi r30, r1, 8
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lwi r31, r1, 12
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rtsd r15, 8
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addik r1, r1, 16
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.size __modsi3, . - __modsi3
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.end __modsi3
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@ -0,0 +1,121 @@
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#include <linux/linkage.h>
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/*
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* Multiply operation for 64 bit integers, for devices with hard multiply
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* Input : Operand1[H] in Reg r5
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* Operand1[L] in Reg r6
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* Operand2[H] in Reg r7
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* Operand2[L] in Reg r8
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* Output: Result[H] in Reg r3
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* Result[L] in Reg r4
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*
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* Explaination:
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*
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* Both the input numbers are divided into 16 bit number as follows
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* op1 = A B C D
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* op2 = E F G H
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* result = D * H
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* + (C * H + D * G) << 16
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* + (B * H + C * G + D * F) << 32
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* + (A * H + B * G + C * F + D * E) << 48
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*
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* Only 64 bits of the output are considered
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*/
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.text
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.globl __muldi3
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.type __muldi3, @function
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.ent __muldi3
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__muldi3:
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addi r1, r1, -40
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/* Save the input operands on the caller's stack */
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swi r5, r1, 44
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swi r6, r1, 48
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swi r7, r1, 52
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swi r8, r1, 56
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/* Store all the callee saved registers */
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sw r20, r1, r0
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swi r21, r1, 4
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swi r22, r1, 8
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swi r23, r1, 12
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swi r24, r1, 16
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swi r25, r1, 20
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swi r26, r1, 24
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swi r27, r1, 28
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/* Load all the 16 bit values for A thru H */
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lhui r20, r1, 44 /* A */
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lhui r21, r1, 46 /* B */
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lhui r22, r1, 48 /* C */
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lhui r23, r1, 50 /* D */
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lhui r24, r1, 52 /* E */
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lhui r25, r1, 54 /* F */
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lhui r26, r1, 56 /* G */
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lhui r27, r1, 58 /* H */
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/* D * H ==> LSB of the result on stack ==> Store1 */
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mul r9, r23, r27
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swi r9, r1, 36 /* Pos2 and Pos3 */
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/* Hi (Store1) + C * H + D * G ==> Store2 ==> Pos1 and Pos2 */
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/* Store the carry generated in position 2 for Pos 3 */
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lhui r11, r1, 36 /* Pos2 */
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mul r9, r22, r27 /* C * H */
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mul r10, r23, r26 /* D * G */
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add r9, r9, r10
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addc r12, r0, r0
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add r9, r9, r11
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addc r12, r12, r0 /* Store the Carry */
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shi r9, r1, 36 /* Store Pos2 */
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swi r9, r1, 32
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lhui r11, r1, 32
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shi r11, r1, 34 /* Store Pos1 */
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/* Hi (Store2) + B * H + C * G + D * F ==> Store3 ==> Pos0 and Pos1 */
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mul r9, r21, r27 /* B * H */
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mul r10, r22, r26 /* C * G */
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mul r7, r23, r25 /* D * F */
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add r9, r9, r11
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add r9, r9, r10
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add r9, r9, r7
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swi r9, r1, 32 /* Pos0 and Pos1 */
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/* Hi (Store3) + A * H + B * G + C * F + D * E ==> Store3 ==> Pos0 */
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lhui r11, r1, 32 /* Pos0 */
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mul r9, r20, r27 /* A * H */
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mul r10, r21, r26 /* B * G */
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mul r7, r22, r25 /* C * F */
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mul r8, r23, r24 /* D * E */
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add r9, r9, r11
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add r9, r9, r10
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add r9, r9, r7
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add r9, r9, r8
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sext16 r9, r9 /* Sign extend the MSB */
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shi r9, r1, 32
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/* Move results to r3 and r4 */
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lhui r3, r1, 32
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add r3, r3, r12
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shi r3, r1, 32
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lwi r3, r1, 32 /* Hi Part */
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lwi r4, r1, 36 /* Lo Part */
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/* Restore Callee saved registers */
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lw r20, r1, r0
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lwi r21, r1, 4
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lwi r22, r1, 8
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lwi r23, r1, 12
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lwi r24, r1, 16
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lwi r25, r1, 20
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lwi r26, r1, 24
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lwi r27, r1, 28
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/* Restore Frame and return */
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rtsd r15, 8
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addi r1, r1, 40
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.size __muldi3, . - __muldi3
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.end __muldi3
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@ -0,0 +1,46 @@
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#include <linux/linkage.h>
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/*
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* Multiply operation for 32 bit integers.
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* Input : Operand1 in Reg r5
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* Operand2 in Reg r6
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* Output: Result [op1 * op2] in Reg r3
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*/
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.text
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.globl __mulsi3
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.type __mulsi3, @function
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.ent __mulsi3
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__mulsi3:
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.frame r1, 0, r15
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add r3, r0, r0
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beqi r5, result_is_zero /* multiply by zero */
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beqi r6, result_is_zero /* multiply by zero */
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bgeid r5, r5_pos
|
||||
xor r4, r5, r6 /* get the sign of the result */
|
||||
rsubi r5, r5, 0 /* make r5 positive */
|
||||
r5_pos:
|
||||
bgei r6, r6_pos
|
||||
rsubi r6, r6, 0 /* make r6 positive */
|
||||
r6_pos:
|
||||
bri l1
|
||||
l2:
|
||||
add r5, r5, r5
|
||||
l1:
|
||||
srl r6, r6
|
||||
addc r7, r0, r0
|
||||
beqi r7, l2
|
||||
bneid r6, l2
|
||||
add r3, r3, r5
|
||||
blti r4, negateresult
|
||||
rtsd r15, 8
|
||||
nop
|
||||
negateresult:
|
||||
rtsd r15, 8
|
||||
rsub r3, r3, r0
|
||||
result_is_zero:
|
||||
rtsd r15, 8
|
||||
addi r3, r0, 0
|
||||
|
||||
.size __mulsi3, . - __mulsi3
|
||||
.end __mulsi3
|
||||
|
|
@ -0,0 +1,84 @@
|
|||
#include <linux/linkage.h>
|
||||
|
||||
/*
|
||||
* Unsigned divide operation.
|
||||
* Input : Divisor in Reg r5
|
||||
* Dividend in Reg r6
|
||||
* Output: Result in Reg r3
|
||||
*/
|
||||
|
||||
.text
|
||||
.globl __udivsi3
|
||||
.type __udivsi3, @function
|
||||
.ent __udivsi3
|
||||
|
||||
__udivsi3:
|
||||
|
||||
.frame r1, 0, r15
|
||||
|
||||
addik r1, r1, -12
|
||||
swi r29, r1, 0
|
||||
swi r30, r1, 4
|
||||
swi r31, r1, 8
|
||||
|
||||
beqi r6, div_by_zero /* div_by_zero /* division error */
|
||||
beqid r5, result_is_zero /* result is zero */
|
||||
addik r30, r0, 0 /* clear mod */
|
||||
addik r29, r0, 32 /* initialize the loop count */
|
||||
|
||||
/* check if r6 and r5 are equal - if yes, return 1 */
|
||||
rsub r18, r5, r6
|
||||
beqid r18, return_here
|
||||
addik r3, r0, 1
|
||||
|
||||
/* check if (uns)r6 is greater than (uns)r5. in that case, just return 0 */
|
||||
xor r18, r5, r6
|
||||
bgeid r18, 16
|
||||
add r3, r0, r0 /* we would anyways clear r3 */
|
||||
blti r6, return_here /* r6[bit 31 = 1] hence is greater */
|
||||
bri checkr6
|
||||
rsub r18, r6, r5 /* microblazecmp */
|
||||
blti r18, return_here
|
||||
|
||||
/* if r6 [bit 31] is set, then return result as 1 */
|
||||
checkr6:
|
||||
bgti r6, div0
|
||||
brid return_here
|
||||
addik r3, r0, 1
|
||||
|
||||
/* first part try to find the first '1' in the r5 */
|
||||
div0:
|
||||
blti r5, div2
|
||||
div1:
|
||||
add r5, r5, r5 /* left shift logical r5 */
|
||||
bgtid r5, div1
|
||||
addik r29, r29, -1
|
||||
div2:
|
||||
/* left shift logical r5 get the '1' into the carry */
|
||||
add r5, r5, r5
|
||||
addc r30, r30, r30 /* move that bit into the mod register */
|
||||
rsub r31, r6, r30 /* try to subtract (r30 a r6) */
|
||||
blti r31, mod_too_small
|
||||
/* move the r31 to mod since the result was positive */
|
||||
or r30, r0, r31
|
||||
addik r3, r3, 1
|
||||
mod_too_small:
|
||||
addik r29, r29, -1
|
||||
beqi r29, loop_end
|
||||
add r3, r3, r3 /* shift in the '1' into div */
|
||||
bri div2 /* div2 */
|
||||
loop_end:
|
||||
bri return_here
|
||||
div_by_zero:
|
||||
result_is_zero:
|
||||
or r3, r0, r0 /* set result to 0 */
|
||||
return_here:
|
||||
/* restore values of csrs and that of r3 and the divisor and the dividend */
|
||||
lwi r29, r1, 0
|
||||
lwi r30, r1, 4
|
||||
lwi r31, r1, 8
|
||||
rtsd r15, 8
|
||||
addik r1, r1, 12
|
||||
|
||||
.size __udivsi3, . - __udivsi3
|
||||
.end __udivsi3
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
#include <linux/linkage.h>
|
||||
|
||||
/*
|
||||
* Unsigned modulo operation for 32 bit integers.
|
||||
* Input : op1 in Reg r5
|
||||
* op2 in Reg r6
|
||||
* Output: op1 mod op2 in Reg r3
|
||||
*/
|
||||
|
||||
.text
|
||||
.globl __umodsi3
|
||||
.type __umodsi3, @function
|
||||
.ent __umodsi3
|
||||
|
||||
__umodsi3:
|
||||
.frame r1, 0, r15
|
||||
|
||||
addik r1, r1, -12
|
||||
swi r29, r1, 0
|
||||
swi r30, r1, 4
|
||||
swi r31, r1, 8
|
||||
|
||||
beqi r6, div_by_zero /* div_by_zero - division error */
|
||||
beqid r5, result_is_zero /* result is zero */
|
||||
addik r3, r0, 0 /* clear div */
|
||||
addik r30, r0, 0 /* clear mod */
|
||||
addik r29, r0, 32 /* initialize the loop count */
|
||||
|
||||
/* check if r6 and r5 are equal /* if yes, return 0 */
|
||||
rsub r18, r5, r6
|
||||
beqi r18, return_here
|
||||
|
||||
/* check if (uns)r6 is greater than (uns)r5. in that case, just return r5 */
|
||||
xor r18, r5, r6
|
||||
bgeid r18, 16
|
||||
addik r3, r5, 0
|
||||
blti r6, return_here
|
||||
bri $lcheckr6
|
||||
rsub r18, r5, r6 /* microblazecmp */
|
||||
bgti r18, return_here
|
||||
|
||||
/* if r6 [bit 31] is set, then return result as r5-r6 */
|
||||
$lcheckr6:
|
||||
bgtid r6, div0
|
||||
addik r3, r0, 0
|
||||
addik r18, r0, 0x7fffffff
|
||||
and r5, r5, r18
|
||||
and r6, r6, r18
|
||||
brid return_here
|
||||
rsub r3, r6, r5
|
||||
/* first part: try to find the first '1' in the r5 */
|
||||
div0:
|
||||
blti r5, div2
|
||||
div1:
|
||||
add r5, r5, r5 /* left shift logical r5 */
|
||||
bgeid r5, div1
|
||||
addik r29, r29, -1
|
||||
div2:
|
||||
/* left shift logical r5 get the '1' into the carry */
|
||||
add r5, r5, r5
|
||||
addc r3, r3, r3 /* move that bit into the mod register */
|
||||
rsub r31, r6, r3 /* try to subtract (r3 a r6) */
|
||||
blti r31, mod_too_small
|
||||
/* move the r31 to mod since the result was positive */
|
||||
or r3, r0, r31
|
||||
addik r30, r30, 1
|
||||
mod_too_small:
|
||||
addik r29, r29, -1
|
||||
beqi r29, loop_end
|
||||
add r30, r30, r30 /* shift in the '1' into div */
|
||||
bri div2 /* div2 */
|
||||
loop_end:
|
||||
bri return_here
|
||||
div_by_zero:
|
||||
result_is_zero:
|
||||
or r3, r0, r0 /* set result to 0 */
|
||||
return_here:
|
||||
/* restore values of csrs and that of r3 and the divisor and the dividend */
|
||||
lwi r29, r1, 0
|
||||
lwi r30, r1, 4
|
||||
lwi r31, r1, 8
|
||||
rtsd r15, 8
|
||||
addik r1, r1, 12
|
||||
|
||||
.size __umodsi3, . - __umodsi3
|
||||
.end __umodsi3
|
||||
Reference in New Issue