intel-agp: fixup resource handling in flush code.
The flush code resource handling was having problems where some BIOS reserve the resource in a pnp block and some don't. Also there was a bug in that configure was being called at resume and resetting some of the structs. Signed-off-by: Dave Airlie <airlied@linux.ie>
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4e8b6e2594
commit
4d64dd9e5d
1 changed files with 23 additions and 10 deletions
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@ -126,6 +126,7 @@ static struct _intel_private {
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};
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struct page *i8xx_page;
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struct resource ifp_resource;
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int resource_valid;
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} intel_private;
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static int intel_i810_fetch_size(void)
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@ -603,10 +604,14 @@ static void intel_i830_fini_flush(void)
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flush_agp_mappings();
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__free_page(intel_private.i8xx_page);
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intel_private.i8xx_page = NULL;
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}
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static void intel_i830_setup_flush(void)
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{
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/* return if we've already set the flush mechanism up */
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if (intel_private.i8xx_page)
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return;
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intel_private.i8xx_page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32);
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if (!intel_private.i8xx_page) {
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@ -846,18 +851,18 @@ static void intel_i915_setup_chipset_flush(void)
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pci_read_config_dword(agp_bridge->dev, I915_IFPADDR, &temp);
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if (!(temp & 0x1)) {
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intel_alloc_chipset_flush_resource();
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intel_private.resource_valid = 1;
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pci_write_config_dword(agp_bridge->dev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
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} else {
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temp &= ~1;
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intel_private.resource_valid = 1;
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intel_private.ifp_resource.start = temp;
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intel_private.ifp_resource.end = temp + PAGE_SIZE;
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ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
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if (ret) {
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intel_private.ifp_resource.start = 0;
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printk("Failed inserting resource into tree\n");
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}
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/* some BIOSes reserve this area in a pnp some don't */
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if (ret)
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intel_private.resource_valid = 0;
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}
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}
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@ -873,6 +878,7 @@ static void intel_i965_g33_setup_chipset_flush(void)
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intel_alloc_chipset_flush_resource();
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intel_private.resource_valid = 1;
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pci_write_config_dword(agp_bridge->dev, I965_IFPADDR + 4,
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upper_32_bits(intel_private.ifp_resource.start));
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pci_write_config_dword(agp_bridge->dev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
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@ -882,20 +888,23 @@ static void intel_i965_g33_setup_chipset_flush(void)
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temp_lo &= ~0x1;
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l64 = ((u64)temp_hi << 32) | temp_lo;
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intel_private.resource_valid = 1;
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intel_private.ifp_resource.start = l64;
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intel_private.ifp_resource.end = l64 + PAGE_SIZE;
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ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
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if (!ret) {
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printk("Failed inserting resource into tree - continuing\n");
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}
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/* some BIOSes reserve this area in a pnp some don't */
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if (ret)
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intel_private.resource_valid = 0;
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}
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}
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static void intel_i9xx_setup_flush(void)
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{
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/* setup a resource for this object */
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memset(&intel_private.ifp_resource, 0, sizeof(intel_private.ifp_resource));
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/* return if already configured */
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if (intel_private.ifp_resource.start)
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return;
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/* setup a resource for this object */
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intel_private.ifp_resource.name = "Intel Flush Page";
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intel_private.ifp_resource.flags = IORESOURCE_MEM;
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@ -951,6 +960,10 @@ static void intel_i915_cleanup(void)
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{
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if (intel_private.i9xx_flush_page)
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iounmap(intel_private.i9xx_flush_page);
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if (intel_private.resource_valid)
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release_resource(&intel_private.ifp_resource);
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intel_private.ifp_resource.start = 0;
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intel_private.resource_valid = 0;
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iounmap(intel_private.gtt);
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iounmap(intel_private.registers);
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}
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