davinci: Audio support for DA850/OMAP-L138 EVM
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform device defintion and Pin Mux configurations. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Chaithrika U S
Kevin Hilman
parent
e33ef5e3b3
commit
491214e1f8
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@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = {
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.enabled_uarts = 0x7,
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};
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/* davinci da850 evm audio machine driver */
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static u8 da850_iis_serializer_direction[] = {
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
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RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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};
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static struct snd_platform_data da850_evm_snd_data = {
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.tx_dma_offset = 0x2000,
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.rx_dma_offset = 0x2000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da850_iis_serializer_direction,
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.eventq_no = EVENTQ_1,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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};
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static __init void da850_evm_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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@ -86,6 +108,13 @@ static __init void da850_evm_init(void)
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*/
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__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
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__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
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ret = da8xx_pinmux_setup(da850_mcasp_pins);
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if (ret)
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pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
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ret);
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da8xx_init_mcasp(0, &da850_evm_snd_data);
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}
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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@ -290,6 +290,13 @@ static struct clk emac_clk = {
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.psc_ctlr = 1,
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};
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static struct clk mcasp_clk = {
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.name = "mcasp",
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.parent = &pll0_sysclk2,
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.lpsc = DA8XX_LPSC1_McASP0,
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.psc_ctlr = 1,
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};
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static struct davinci_clk da850_clks[] = {
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CLK(NULL, "ref", &ref_clk),
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CLK(NULL, "pll0", &pll0_clk),
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@ -327,6 +334,7 @@ static struct davinci_clk da850_clks[] = {
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CLK(NULL, "arm", &arm_clk),
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CLK(NULL, "rmii", &rmii_clk),
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CLK("davinci_emac.1", NULL, &emac_clk),
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CLK("davinci-mcasp.0", NULL, &mcasp_clk),
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CLK(NULL, NULL, NULL),
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};
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@ -373,6 +381,30 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
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MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
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MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
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/* McASP function */
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MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false)
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MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false)
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MUX_CFG(DA850, AFSR, 0, 8, 15, 1, false)
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MUX_CFG(DA850, AFSX, 0, 12, 15, 1, false)
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MUX_CFG(DA850, AHCLKR, 0, 16, 15, 1, false)
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MUX_CFG(DA850, AHCLKX, 0, 20, 15, 1, false)
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MUX_CFG(DA850, AMUTE, 0, 24, 15, 1, false)
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MUX_CFG(DA850, AXR_15, 1, 0, 15, 1, false)
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MUX_CFG(DA850, AXR_14, 1, 4, 15, 1, false)
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MUX_CFG(DA850, AXR_13, 1, 8, 15, 1, false)
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MUX_CFG(DA850, AXR_12, 1, 12, 15, 1, false)
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MUX_CFG(DA850, AXR_11, 1, 16, 15, 1, false)
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MUX_CFG(DA850, AXR_10, 1, 20, 15, 1, false)
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MUX_CFG(DA850, AXR_9, 1, 24, 15, 1, false)
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MUX_CFG(DA850, AXR_8, 1, 28, 15, 1, false)
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MUX_CFG(DA850, AXR_7, 2, 0, 15, 1, false)
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MUX_CFG(DA850, AXR_6, 2, 4, 15, 1, false)
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MUX_CFG(DA850, AXR_5, 2, 8, 15, 1, false)
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MUX_CFG(DA850, AXR_4, 2, 12, 15, 1, false)
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MUX_CFG(DA850, AXR_3, 2, 16, 15, 1, false)
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MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false)
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MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false)
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MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false)
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#endif
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};
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@ -410,6 +442,13 @@ const short da850_cpgmac_pins[] __initdata = {
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-1
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};
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const short da850_mcasp_pins[] __initdata = {
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DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
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DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
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DA850_AXR_11, DA850_AXR_12,
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-1
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};
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/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
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static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
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[IRQ_DA8XX_COMMTX] = 7,
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@ -309,6 +309,34 @@ static struct platform_device da830_mcasp1_device = {
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.resource = da830_mcasp1_resources,
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};
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static struct resource da850_mcasp_resources[] = {
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{
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.name = "mcasp",
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.start = DAVINCI_DA8XX_MCASP0_REG_BASE,
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.end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
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.flags = IORESOURCE_MEM,
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},
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/* TX event */
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{
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.start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
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.end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
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.flags = IORESOURCE_DMA,
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},
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/* RX event */
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{
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.start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
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.end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device da850_mcasp_device = {
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.name = "davinci-mcasp",
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.id = 0,
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.num_resources = ARRAY_SIZE(da850_mcasp_resources),
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.resource = da850_mcasp_resources,
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};
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int __init da8xx_register_emac(void)
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{
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return platform_device_register(&da8xx_emac_device);
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@ -316,8 +344,12 @@ int __init da8xx_register_emac(void)
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void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
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{
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if (id == 1) { /* DA830/OMAP-L137 has 3 instances of McASP */
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/* DA830/OMAP-L137 has 3 instances of McASP */
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if (cpu_is_davinci_da830() && id == 1) {
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da830_mcasp1_device.dev.platform_data = pdata;
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platform_device_register(&da830_mcasp1_device);
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} else if (cpu_is_davinci_da850()) {
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da850_mcasp_device.dev.platform_data = pdata;
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platform_device_register(&da850_mcasp_device);
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}
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}
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@ -15,6 +15,9 @@
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#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
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#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
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/* Bases of da850/da830 McASP0 register banks */
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#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000
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/* Bases of da830 McASP1 register banks */
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#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
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@ -29,6 +32,10 @@
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#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
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#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
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/* EDMA channels of da850/da830 McASP0 */
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#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0
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#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1
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/* EDMA channels of da830 McASP1 */
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#define DAVINCI_DA830_DMA_MCASP1_AREVT 2
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#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
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@ -750,6 +750,31 @@ enum davinci_da850_index {
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DA850_MII_RXD_0,
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DA850_MDIO_CLK,
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DA850_MDIO_D,
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/* McASP function */
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DA850_ACLKR,
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DA850_ACLKX,
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DA850_AFSR,
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DA850_AFSX,
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DA850_AHCLKR,
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DA850_AHCLKX,
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DA850_AMUTE,
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DA850_AXR_15,
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DA850_AXR_14,
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DA850_AXR_13,
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DA850_AXR_12,
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DA850_AXR_11,
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DA850_AXR_10,
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DA850_AXR_9,
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DA850_AXR_8,
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DA850_AXR_7,
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DA850_AXR_6,
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DA850_AXR_5,
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DA850_AXR_4,
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DA850_AXR_3,
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DA850_AXR_2,
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DA850_AXR_1,
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DA850_AXR_0,
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};
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#ifdef CONFIG_DAVINCI_MUX
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