Merge branch 'for_3.1/pm-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-cleanup
Conflicts: arch/arm/mach-omap2/pm-debug.c arch/arm/mach-omap2/pm.h
This commit is contained in:
Tony Lindgren
commit
48cb1258e8
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@ -4,14 +4,14 @@
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# Common support
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obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
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obj-y += clock.o clock_data.o opp_data.o reset.o
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obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
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# Power Management
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obj-$(CONFIG_PM) += pm.o sleep.o pm_bus.o
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obj-$(CONFIG_PM) += pm.o sleep.o
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# DSP
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obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
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@ -56,9 +56,13 @@ static struct dev_power_domain default_power_domain = {
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USE_PLATFORM_PM_SLEEP_OPS
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},
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};
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#define OMAP1_PWR_DOMAIN (&default_power_domain)
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#else
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#define OMAP1_PWR_DOMAIN NULL
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#endif /* CONFIG_PM_RUNTIME */
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static struct pm_clk_notifier_block platform_bus_notifier = {
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.pwr_domain = &default_power_domain,
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.pwr_domain = OMAP1_PWR_DOMAIN,
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.con_ids = { "ick", "fck", NULL, },
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};
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@ -72,4 +76,4 @@ static int __init omap1_pm_runtime_init(void)
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return 0;
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}
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core_initcall(omap1_pm_runtime_init);
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#endif /* CONFIG_PM_RUNTIME */
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@ -84,7 +84,8 @@ static struct mtd_partition omap3pandora_nand_partitions[] = {
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static struct omap_nand_platform_data pandora_nand_data = {
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.cs = 0,
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.devsize = 1, /* '0' for 8-bit, '1' for 16-bit device */
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.devsize = NAND_BUSWIDTH_16,
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.xfer_type = NAND_OMAP_PREFETCH_DMA,
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.parts = omap3pandora_nand_partitions,
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.nr_parts = ARRAY_SIZE(omap3pandora_nand_partitions),
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};
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@ -31,305 +31,28 @@
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#include <plat/board.h>
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include <plat/dmtimer.h>
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#include <plat/omap-pm.h>
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#include "cm2xxx_3xxx.h"
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#include "prm2xxx_3xxx.h"
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#include "pm.h"
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int omap2_pm_debug;
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u32 enable_off_mode;
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u32 sleep_while_idle;
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#define DUMP_PRM_MOD_REG(mod, reg) \
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regs[reg_count].name = #mod "." #reg; \
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regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg)
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#define DUMP_CM_MOD_REG(mod, reg) \
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regs[reg_count].name = #mod "." #reg; \
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regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg)
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#define DUMP_PRM_REG(reg) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(reg)
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#define DUMP_CM_REG(reg) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = __raw_readl(reg)
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#define DUMP_INTC_REG(reg, off) \
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regs[reg_count].name = #reg; \
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regs[reg_count++].val = \
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__raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
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void omap2_pm_dump(int mode, int resume, unsigned int us)
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{
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struct reg {
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const char *name;
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u32 val;
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} regs[32];
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int reg_count = 0, i;
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const char *s1 = NULL, *s2 = NULL;
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if (!resume) {
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#if 0
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/* MPU */
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DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
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DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL);
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DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL);
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DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST);
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DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP);
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#endif
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#if 0
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/* INTC */
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DUMP_INTC_REG(INTC_MIR0, 0x0084);
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DUMP_INTC_REG(INTC_MIR1, 0x00a4);
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DUMP_INTC_REG(INTC_MIR2, 0x00c4);
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#endif
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#if 0
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DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
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if (cpu_is_omap24xx()) {
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DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
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DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
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OMAP2_PRCM_CLKEMUL_CTRL_OFFSET);
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DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
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OMAP2_PRCM_CLKSRC_CTRL_OFFSET);
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}
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DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
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DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
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DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
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DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
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DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
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DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
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DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST);
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#endif
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#if 0
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/* DSP */
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if (cpu_is_omap24xx()) {
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
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DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL);
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DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST);
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}
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#endif
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} else {
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DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
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if (cpu_is_omap24xx())
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DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
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DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
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DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
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#if 1
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DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
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DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
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DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8);
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#endif
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}
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switch (mode) {
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case 0:
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s1 = "full";
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s2 = "retention";
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break;
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case 1:
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s1 = "MPU";
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s2 = "retention";
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break;
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case 2:
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s1 = "MPU";
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s2 = "idle";
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break;
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}
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if (!resume)
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#ifdef CONFIG_NO_HZ
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printk(KERN_INFO
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"--- Going to %s %s (next timer after %u ms)\n", s1, s2,
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jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
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jiffies));
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#else
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printk(KERN_INFO "--- Going to %s %s\n", s1, s2);
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#endif
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else
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printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n",
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us / 1000, us % 1000);
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for (i = 0; i < reg_count; i++)
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printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
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}
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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static void pm_dbg_regset_store(u32 *ptr);
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static struct dentry *pm_dbg_dir;
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static int pm_dbg_init_done;
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static int __init pm_dbg_init(void);
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static int pm_dbg_init(void);
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enum {
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DEBUG_FILE_COUNTERS = 0,
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DEBUG_FILE_TIMERS,
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};
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struct pm_module_def {
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char name[8]; /* Name of the module */
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short type; /* CM or PRM */
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unsigned short offset;
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int low; /* First register address on this module */
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int high; /* Last register address on this module */
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};
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#define MOD_CM 0
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#define MOD_PRM 1
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static const struct pm_module_def *pm_dbg_reg_modules;
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static const struct pm_module_def omap3_pm_reg_modules[] = {
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{ "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
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{ "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
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{ "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
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{ "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
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{ "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
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{ "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
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{ "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
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{ "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
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{ "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
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{ "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
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{ "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
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{ "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
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{ "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
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{ "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
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{ "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
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{ "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
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{ "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
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{ "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
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{ "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
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{ "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
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{ "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
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{ "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
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{ "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
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{ "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
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{ "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
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{ "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
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{ "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
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{ "", 0, 0, 0, 0 },
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};
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#define PM_DBG_MAX_REG_SETS 4
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static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
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static int pm_dbg_get_regset_size(void)
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{
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static int regset_size;
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if (regset_size == 0) {
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int i = 0;
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while (pm_dbg_reg_modules[i].name[0] != 0) {
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regset_size += pm_dbg_reg_modules[i].high +
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4 - pm_dbg_reg_modules[i].low;
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i++;
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}
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}
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return regset_size;
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}
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static int pm_dbg_show_regs(struct seq_file *s, void *unused)
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{
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int i, j;
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unsigned long val;
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int reg_set = (int)s->private;
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u32 *ptr;
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void *store = NULL;
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int regs;
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int linefeed;
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if (reg_set == 0) {
|
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store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
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ptr = store;
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pm_dbg_regset_store(ptr);
|
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} else {
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ptr = pm_dbg_reg_set[reg_set - 1];
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}
|
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|
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i = 0;
|
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|
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while (pm_dbg_reg_modules[i].name[0] != 0) {
|
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regs = 0;
|
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linefeed = 0;
|
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if (pm_dbg_reg_modules[i].type == MOD_CM)
|
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seq_printf(s, "MOD: CM_%s (%08x)\n",
|
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pm_dbg_reg_modules[i].name,
|
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(u32)(OMAP3430_CM_BASE +
|
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pm_dbg_reg_modules[i].offset));
|
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else
|
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seq_printf(s, "MOD: PRM_%s (%08x)\n",
|
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pm_dbg_reg_modules[i].name,
|
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(u32)(OMAP3430_PRM_BASE +
|
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pm_dbg_reg_modules[i].offset));
|
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|
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for (j = pm_dbg_reg_modules[i].low;
|
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j <= pm_dbg_reg_modules[i].high; j += 4) {
|
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val = *(ptr++);
|
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if (val != 0) {
|
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regs++;
|
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if (linefeed) {
|
||||
seq_printf(s, "\n");
|
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linefeed = 0;
|
||||
}
|
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seq_printf(s, " %02x => %08lx", j, val);
|
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if (regs % 4 == 0)
|
||||
linefeed = 1;
|
||||
}
|
||||
}
|
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seq_printf(s, "\n");
|
||||
i++;
|
||||
}
|
||||
|
||||
if (store != NULL)
|
||||
kfree(store);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pm_dbg_regset_store(u32 *ptr)
|
||||
{
|
||||
int i, j;
|
||||
u32 val;
|
||||
|
||||
i = 0;
|
||||
|
||||
while (pm_dbg_reg_modules[i].name[0] != 0) {
|
||||
for (j = pm_dbg_reg_modules[i].low;
|
||||
j <= pm_dbg_reg_modules[i].high; j += 4) {
|
||||
if (pm_dbg_reg_modules[i].type == MOD_CM)
|
||||
val = omap2_cm_read_mod_reg(
|
||||
pm_dbg_reg_modules[i].offset, j);
|
||||
else
|
||||
val = omap2_prm_read_mod_reg(
|
||||
pm_dbg_reg_modules[i].offset, j);
|
||||
*(ptr++) = val;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
||||
int pm_dbg_regset_save(int reg_set)
|
||||
{
|
||||
if (pm_dbg_reg_set[reg_set-1] == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = {
|
||||
"OFF",
|
||||
"RET",
|
||||
|
|
@ -449,11 +172,6 @@ static int pm_dbg_open(struct inode *inode, struct file *file)
|
|||
};
|
||||
}
|
||||
|
||||
static int pm_dbg_reg_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pm_dbg_show_regs, inode->i_private);
|
||||
}
|
||||
|
||||
static const struct file_operations debug_fops = {
|
||||
.open = pm_dbg_open,
|
||||
.read = seq_read,
|
||||
|
|
@ -461,40 +179,6 @@ static const struct file_operations debug_fops = {
|
|||
.release = single_release,
|
||||
};
|
||||
|
||||
static const struct file_operations debug_reg_fops = {
|
||||
.open = pm_dbg_reg_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
int pm_dbg_regset_init(int reg_set)
|
||||
{
|
||||
char name[2];
|
||||
|
||||
if (!pm_dbg_init_done)
|
||||
pm_dbg_init();
|
||||
|
||||
if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
|
||||
pm_dbg_reg_set[reg_set-1] != NULL)
|
||||
return -EINVAL;
|
||||
|
||||
pm_dbg_reg_set[reg_set-1] =
|
||||
kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
|
||||
|
||||
if (pm_dbg_reg_set[reg_set-1] == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
if (pm_dbg_dir != NULL) {
|
||||
sprintf(name, "%d", reg_set);
|
||||
|
||||
(void) debugfs_create_file(name, S_IRUGO,
|
||||
pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pwrdm_suspend_get(void *data, u64 *val)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
|
|
@ -574,20 +258,11 @@ DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n");
|
|||
|
||||
static int __init pm_dbg_init(void)
|
||||
{
|
||||
int i;
|
||||
struct dentry *d;
|
||||
char name[2];
|
||||
|
||||
if (pm_dbg_init_done)
|
||||
return 0;
|
||||
|
||||
if (cpu_is_omap34xx())
|
||||
pm_dbg_reg_modules = omap3_pm_reg_modules;
|
||||
else {
|
||||
printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
d = debugfs_create_dir("pm_debug", NULL);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
|
|
@ -599,25 +274,8 @@ static int __init pm_dbg_init(void)
|
|||
|
||||
pwrdm_for_each(pwrdms_setup, (void *)d);
|
||||
|
||||
pm_dbg_dir = debugfs_create_dir("registers", d);
|
||||
if (IS_ERR(pm_dbg_dir))
|
||||
return PTR_ERR(pm_dbg_dir);
|
||||
|
||||
(void) debugfs_create_file("current", S_IRUGO,
|
||||
pm_dbg_dir, (void *)0, &debug_reg_fops);
|
||||
|
||||
for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
|
||||
if (pm_dbg_reg_set[i] != NULL) {
|
||||
sprintf(name, "%d", i+1);
|
||||
(void) debugfs_create_file(name, S_IRUGO,
|
||||
pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
|
||||
|
||||
}
|
||||
|
||||
(void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
|
||||
&enable_off_mode, &pm_dbg_option_fops);
|
||||
(void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
|
||||
&sleep_while_idle, &pm_dbg_option_fops);
|
||||
pm_dbg_init_done = 1;
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -61,25 +61,15 @@ extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
|
|||
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
|
||||
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern int omap2_pm_debug;
|
||||
extern u32 enable_off_mode;
|
||||
extern u32 sleep_while_idle;
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define enable_off_mode 0
|
||||
#define sleep_while_idle 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
||||
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
||||
extern int pm_dbg_regset_save(int reg_set);
|
||||
extern int pm_dbg_regset_init(int reg_set);
|
||||
#else
|
||||
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
||||
#define pm_dbg_regset_save(reg_set) do {} while (0);
|
||||
#define pm_dbg_regset_init(reg_set) do {} while (0);
|
||||
#endif /* CONFIG_PM_DEBUG */
|
||||
|
||||
extern void omap24xx_idle_loop_suspend(void);
|
||||
|
|
|
|||
|
|
@ -53,6 +53,8 @@
|
|||
#include "powerdomain.h"
|
||||
#include "clockdomain.h"
|
||||
|
||||
static int omap2_pm_debug;
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static suspend_state_t suspend_state = PM_SUSPEND_ON;
|
||||
static inline bool is_suspending(void)
|
||||
|
|
@ -123,7 +125,6 @@ static void omap2_enter_full_retention(void)
|
|||
omap2_gpio_prepare_for_idle(0);
|
||||
|
||||
if (omap2_pm_debug) {
|
||||
omap2_pm_dump(0, 0, 0);
|
||||
getnstimeofday(&ts_preidle);
|
||||
}
|
||||
|
||||
|
|
@ -160,7 +161,6 @@ no_sleep:
|
|||
getnstimeofday(&ts_postidle);
|
||||
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
||||
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
||||
omap2_pm_dump(0, 1, tmp);
|
||||
}
|
||||
omap2_gpio_resume_after_idle();
|
||||
|
||||
|
|
@ -247,7 +247,6 @@ static void omap2_enter_mpu_retention(void)
|
|||
}
|
||||
|
||||
if (omap2_pm_debug) {
|
||||
omap2_pm_dump(only_idle ? 2 : 1, 0, 0);
|
||||
getnstimeofday(&ts_preidle);
|
||||
}
|
||||
|
||||
|
|
@ -259,7 +258,6 @@ static void omap2_enter_mpu_retention(void)
|
|||
getnstimeofday(&ts_postidle);
|
||||
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
||||
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
||||
omap2_pm_dump(only_idle ? 2 : 1, 1, tmp);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -497,8 +497,6 @@ console_still_active:
|
|||
|
||||
int omap3_can_sleep(void)
|
||||
{
|
||||
if (!sleep_while_idle)
|
||||
return 0;
|
||||
if (!omap_uart_can_sleep())
|
||||
return 0;
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
|
|||
sr_write_reg(sr_info, IRQSTATUS, status);
|
||||
}
|
||||
|
||||
if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
|
||||
if (sr_class->notify)
|
||||
sr_class->notify(sr_info->voltdm, status);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
|
@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info)
|
|||
struct resource *mem;
|
||||
int ret = 0;
|
||||
|
||||
if (sr_class->class_type == SR_CLASS2 &&
|
||||
sr_class->notify_flags && sr_info->irq) {
|
||||
|
||||
if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
|
||||
name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
|
||||
if (name == NULL) {
|
||||
ret = -ENOMEM;
|
||||
|
|
@ -270,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info)
|
|||
0, name, (void *)sr_info);
|
||||
if (ret)
|
||||
goto error;
|
||||
disable_irq(sr_info->irq);
|
||||
}
|
||||
|
||||
if (pdata && pdata->enable_on_init)
|
||||
|
|
@ -278,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info)
|
|||
return ret;
|
||||
|
||||
error:
|
||||
iounmap(sr_info->base);
|
||||
mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(mem->start, resource_size(mem));
|
||||
list_del(&sr_info->node);
|
||||
dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
|
||||
"interrupt handler. Smartreflex will"
|
||||
"not function as desired\n", __func__);
|
||||
kfree(name);
|
||||
kfree(sr_info);
|
||||
return ret;
|
||||
iounmap(sr_info->base);
|
||||
mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(mem->start, resource_size(mem));
|
||||
list_del(&sr_info->node);
|
||||
dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
|
||||
"interrupt handler. Smartreflex will"
|
||||
"not function as desired\n", __func__);
|
||||
kfree(name);
|
||||
kfree(sr_info);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sr_v1_disable(struct omap_sr *sr)
|
||||
|
|
@ -808,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!val)
|
||||
sr_stop_vddautocomp(sr_info);
|
||||
else
|
||||
sr_start_vddautocomp(sr_info);
|
||||
/* control enable/disable only if there is a delta in value */
|
||||
if (sr_info->autocomp_active != val) {
|
||||
if (!val)
|
||||
sr_stop_vddautocomp(sr_info);
|
||||
else
|
||||
sr_start_vddautocomp(sr_info);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -84,6 +84,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
#include <plat/omap_device.h>
|
||||
#include <plat/omap_hwmod.h>
|
||||
|
|
@ -539,20 +540,34 @@ int omap_early_device_register(struct omap_device *od)
|
|||
static int _od_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
int ret;
|
||||
|
||||
return omap_device_idle(pdev);
|
||||
ret = pm_generic_runtime_suspend(dev);
|
||||
|
||||
if (!ret)
|
||||
omap_device_idle(pdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int _od_runtime_idle(struct device *dev)
|
||||
{
|
||||
return pm_generic_runtime_idle(dev);
|
||||
}
|
||||
|
||||
static int _od_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
|
||||
return omap_device_enable(pdev);
|
||||
omap_device_enable(pdev);
|
||||
|
||||
return pm_generic_runtime_resume(dev);
|
||||
}
|
||||
|
||||
static struct dev_power_domain omap_device_power_domain = {
|
||||
.ops = {
|
||||
.runtime_suspend = _od_runtime_suspend,
|
||||
.runtime_idle = _od_runtime_idle,
|
||||
.runtime_resume = _od_runtime_resume,
|
||||
USE_PLATFORM_PM_SLEEP_OPS
|
||||
}
|
||||
|
|
|
|||
Reference in New Issue