powerpc/fsl-booke: Add support for FSL 64-bit e5500 core
The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
parent
6db92cc9d0
commit
4490c06b58
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@ -55,7 +55,9 @@ obj-$(CONFIG_IBMVIO) += vio.o
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obj-$(CONFIG_IBMEBUS) += ibmebus.o
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obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
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obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
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ifeq ($(CONFIG_PPC32),y)
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obj-$(CONFIG_E500) += idle_e500.o
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endif
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obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
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obj-$(CONFIG_TAU) += tau_6xx.o
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obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o
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@ -67,7 +69,7 @@ endif
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obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
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obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
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obj-$(CONFIG_44x) += cpu_setup_44x.o
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obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o dbell.o
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obj-$(CONFIG_PPC_FSL_BOOK3E) += cpu_setup_fsl_booke.o dbell.o
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obj-$(CONFIG_PPC_BOOK3E_64) += dbell.o
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extra-y := head_$(CONFIG_WORD_SIZE).o
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@ -51,6 +51,7 @@ _GLOBAL(__e500_dcache_setup)
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isync
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blr
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#ifdef CONFIG_PPC32
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_GLOBAL(__setup_cpu_e200)
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/* enable dedicated debug exception handling resources (Debug APU) */
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mfspr r3,SPRN_HID0
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@ -72,3 +73,17 @@ _GLOBAL(__setup_cpu_e500mc)
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bl __setup_e500mc_ivors
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mtlr r4
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blr
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#endif
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/* Right now, restore and setup are the same thing */
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_GLOBAL(__restore_cpu_e5500)
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_GLOBAL(__setup_cpu_e5500)
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mflr r4
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bl __e500_icache_setup
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bl __e500_dcache_setup
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#ifdef CONFIG_PPC_BOOK3E_64
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bl .__setup_base_ivors
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#else
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bl __setup_e500mc_ivors
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#endif
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mtlr r4
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blr
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@ -66,6 +66,10 @@ extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_power7(void);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_E500)
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extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_e5500(void);
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#endif /* CONFIG_E500 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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* ones as well...
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@ -1891,7 +1895,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.platform = "ppc5554",
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}
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#endif /* CONFIG_E200 */
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_E500
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#ifdef CONFIG_PPC32
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{ /* e500 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x80200000,
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@ -1946,6 +1952,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.machine_check = machine_check_e500mc,
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.platform = "ppce500mc",
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},
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#endif /* CONFIG_PPC32 */
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{ /* e5500 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x80240000,
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.cpu_name = "e5500",
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.cpu_features = CPU_FTRS_E500MC,
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.cpu_user_features = COMMON_USER_BOOKE,
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.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
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MMU_FTR_USE_TLBILX,
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.icache_bsize = 64,
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.dcache_bsize = 64,
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.num_pmcs = 4,
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.oprofile_cpu_type = "ppc/e500mc",
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.oprofile_type = PPC_OPROFILE_FSL_EMB,
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.cpu_setup = __setup_cpu_e5500,
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.cpu_restore = __restore_cpu_e5500,
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.machine_check = machine_check_e500mc,
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.platform = "ppce5500",
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},
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#ifdef CONFIG_PPC32
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{ /* default match */
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.pvr_mask = 0x00000000,
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.pvr_value = 0x00000000,
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@ -1960,8 +1986,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.machine_check = machine_check_e500,
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.platform = "powerpc",
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}
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#endif /* CONFIG_E500 */
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#endif /* CONFIG_PPC32 */
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#endif /* CONFIG_E500 */
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#ifdef CONFIG_PPC_BOOK3E_64
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{ /* This is a default entry to get going, to be replaced by
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@ -538,6 +538,11 @@ int machine_check_e500(struct pt_regs *regs)
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return 0;
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}
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int machine_check_generic(struct pt_regs *regs)
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{
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return 0;
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}
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#elif defined(CONFIG_E200)
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int machine_check_e200(struct pt_regs *regs)
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{
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@ -11,6 +11,8 @@ menuconfig FSL_SOC_BOOKE
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if FSL_SOC_BOOKE
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if PPC32
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config MPC8540_ADS
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bool "Freescale MPC8540 ADS"
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select DEFAULT_UIMAGE
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@ -167,7 +169,6 @@ config P3041_DS
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config P4080_DS
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bool "Freescale P4080 DS"
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select DEFAULT_UIMAGE
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select PPC_FSL_BOOK3E
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select PPC_E500MC
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select PHYS_64BIT
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select SWIOTLB
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@ -176,6 +177,8 @@ config P4080_DS
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help
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This option enables support for the P4080 DS board
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endif # PPC32
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endif # FSL_SOC_BOOKE
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config TQM85xx
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@ -125,6 +125,7 @@ config 8xx
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config E500
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select FSL_EMB_PERFMON
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select PPC_FSL_BOOK3E
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bool
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config PPC_E500MC
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@ -166,9 +167,14 @@ config BOOKE
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config FSL_BOOKE
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bool
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depends on E200 || E500
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depends on (E200 || E500) && PPC32
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default y
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# this is for common code between PPC32 & PPC64 FSL BOOKE
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config PPC_FSL_BOOK3E
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bool
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select FSL_EMB_PERFMON
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default y if FSL_BOOKE
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config PTE_64BIT
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bool
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