ALSA: pxa27x: fix ac97 cold reset
Cold reset on the pxa27x currently fails and pxa2xx_ac97_try_cold_reset: cold reset timeout (GSR=0x44) appears in the kernel log. Through trial-and-error (the pxa270 developer's manual is mostly incoherent on the topic of ac97 reset), I got cold reset to complete by setting the WARM_RST bit in the GCR register (and later noticed that pxa3xx does this for cold reset as well). Also, a timeout loop is needed to wait for the reset to complete. Tested on a palm treo 680 machine. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
This commit is contained in:
parent
d1c3ed669a
commit
41b645c862
|
@ -148,6 +148,8 @@ static inline void pxa_ac97_warm_pxa27x(void)
|
||||||
|
|
||||||
static inline void pxa_ac97_cold_pxa27x(void)
|
static inline void pxa_ac97_cold_pxa27x(void)
|
||||||
{
|
{
|
||||||
|
unsigned int timeout;
|
||||||
|
|
||||||
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
|
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
|
||||||
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
|
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
|
||||||
|
|
||||||
|
@ -157,8 +159,10 @@ static inline void pxa_ac97_cold_pxa27x(void)
|
||||||
clk_enable(ac97conf_clk);
|
clk_enable(ac97conf_clk);
|
||||||
udelay(5);
|
udelay(5);
|
||||||
clk_disable(ac97conf_clk);
|
clk_disable(ac97conf_clk);
|
||||||
GCR = GCR_COLD_RST;
|
GCR = GCR_COLD_RST | GCR_WARM_RST;
|
||||||
udelay(50);
|
timeout = 100; /* wait for the codec-ready bit to be set */
|
||||||
|
while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
|
||||||
|
mdelay(1);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
Reference in New Issue