spi: spi_bfin: relocate spin/waits
Move spin/waits to more correct locations in bfin SPI driver. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Sonic Zhang
Linus Torvalds
parent
cc487e7320
commit
3f479a65b3
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@ -276,22 +276,26 @@ static void u8_writer(struct driver_data *drv_data)
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dev_dbg(&drv_data->pdev->dev,
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"cr8-s is 0x%x\n", read_STAT());
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->tx < drv_data->tx_end) {
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write_TDBR(*(u8 *) (drv_data->tx));
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while (read_STAT() & BIT_STAT_TXS)
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continue;
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++drv_data->tx;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u8_cs_chg_writer(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->tx < drv_data->tx_end) {
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cs_active(chip);
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@ -304,10 +308,6 @@ static void u8_cs_chg_writer(struct driver_data *drv_data)
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udelay(chip->cs_chg_udelay);
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++drv_data->tx;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u8_reader(struct driver_data *drv_data)
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@ -315,6 +315,10 @@ static void u8_reader(struct driver_data *drv_data)
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dev_dbg(&drv_data->pdev->dev,
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"cr-8 is 0x%x\n", read_STAT());
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* clear TDBR buffer before read(else it will be shifted out) */
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write_TDBR(0xFFFF);
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@ -337,6 +341,10 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* clear TDBR buffer before read(else it will be shifted out) */
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write_TDBR(0xFFFF);
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@ -365,6 +373,10 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
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static void u8_duplex(struct driver_data *drv_data)
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{
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* in duplex mode, clk is triggered by writing of TDBR */
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while (drv_data->rx < drv_data->rx_end) {
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write_TDBR(*(u8 *) (drv_data->tx));
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@ -376,16 +388,16 @@ static void u8_duplex(struct driver_data *drv_data)
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++drv_data->rx;
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++drv_data->tx;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u8_cs_chg_duplex(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->rx < drv_data->rx_end) {
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cs_active(chip);
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@ -402,10 +414,6 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
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++drv_data->rx;
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++drv_data->tx;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u16_writer(struct driver_data *drv_data)
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@ -413,22 +421,26 @@ static void u16_writer(struct driver_data *drv_data)
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dev_dbg(&drv_data->pdev->dev,
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"cr16 is 0x%x\n", read_STAT());
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->tx < drv_data->tx_end) {
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write_TDBR(*(u16 *) (drv_data->tx));
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while ((read_STAT() & BIT_STAT_TXS))
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continue;
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drv_data->tx += 2;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u16_cs_chg_writer(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->tx < drv_data->tx_end) {
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cs_active(chip);
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@ -441,10 +453,6 @@ static void u16_cs_chg_writer(struct driver_data *drv_data)
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udelay(chip->cs_chg_udelay);
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drv_data->tx += 2;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u16_reader(struct driver_data *drv_data)
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@ -452,6 +460,10 @@ static void u16_reader(struct driver_data *drv_data)
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dev_dbg(&drv_data->pdev->dev,
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"cr-16 is 0x%x\n", read_STAT());
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* clear TDBR buffer before read(else it will be shifted out) */
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write_TDBR(0xFFFF);
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@ -474,6 +486,10 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* clear TDBR buffer before read(else it will be shifted out) */
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write_TDBR(0xFFFF);
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@ -502,6 +518,10 @@ static void u16_cs_chg_reader(struct driver_data *drv_data)
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static void u16_duplex(struct driver_data *drv_data)
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{
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* in duplex mode, clk is triggered by writing of TDBR */
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while (drv_data->tx < drv_data->tx_end) {
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write_TDBR(*(u16 *) (drv_data->tx));
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@ -513,16 +533,16 @@ static void u16_duplex(struct driver_data *drv_data)
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drv_data->rx += 2;
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drv_data->tx += 2;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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static void u16_cs_chg_duplex(struct driver_data *drv_data)
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{
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struct chip_data *chip = drv_data->cur_chip;
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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while (drv_data->tx < drv_data->tx_end) {
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cs_active(chip);
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@ -539,10 +559,6 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data)
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drv_data->rx += 2;
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drv_data->tx += 2;
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}
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/* poll for SPI completion before returning */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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}
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/* test if ther is more transfer to be done */
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@ -765,6 +781,10 @@ static void pump_transfers(unsigned long data)
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dma_width = WDSIZE_8;
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}
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/* poll for SPI completion before start */
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while (!(read_STAT() & BIT_STAT_SPIF))
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continue;
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/* dirty hack for autobuffer DMA mode */
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if (drv_data->tx_dma == 0xFFFF) {
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dev_dbg(&drv_data->pdev->dev,
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