x86, reboot: Move the real-mode reboot code to an assembly file
Move the real-mode reboot code out to an assembly file (reboot_32.S) which is allocated using the common lowmem trampoline allocator. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> LKML-Reference: <4D5DFBE4.7090104@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Matthieu Castet <castet.matthieu@free.fr>
This commit is contained in:
H. Peter Anvin
parent
014eea518a
commit
3d35ac346e
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@ -18,7 +18,10 @@ extern struct machine_ops machine_ops;
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void native_machine_crash_shutdown(struct pt_regs *regs);
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void native_machine_shutdown(void);
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void machine_real_restart(const unsigned char *code, int length);
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void machine_real_restart(unsigned int type);
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/* These must match dispatch_table in reboot_32.S */
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#define MRR_BIOS 0
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#define MRR_APM 1
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typedef void (*nmi_shootdown_cb)(int, struct die_args*);
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void nmi_shootdown_cpus(nmi_shootdown_cb callback);
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@ -59,6 +59,7 @@ obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-y += cpu/
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obj-y += acpi/
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obj-y += reboot.o
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obj-$(CONFIG_X86_32) += reboot_32.o
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obj-$(CONFIG_MCA) += mca_32.o
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obj-$(CONFIG_X86_MSR) += msr.o
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obj-$(CONFIG_X86_CPUID) += cpuid.o
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@ -975,20 +975,10 @@ recalc:
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static void apm_power_off(void)
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{
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unsigned char po_bios_call[] = {
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0xb8, 0x00, 0x10, /* movw $0x1000,ax */
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0x8e, 0xd0, /* movw ax,ss */
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0xbc, 0x00, 0xf0, /* movw $0xf000,sp */
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0xb8, 0x07, 0x53, /* movw $0x5307,ax */
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0xbb, 0x01, 0x00, /* movw $0x0001,bx */
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0xb9, 0x03, 0x00, /* movw $0x0003,cx */
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0xcd, 0x15 /* int $0x15 */
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};
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/* Some bioses don't like being called from CPU != 0 */
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if (apm_info.realmode_power_off) {
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set_cpus_allowed_ptr(current, cpumask_of(0));
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machine_real_restart(po_bios_call, sizeof(po_bios_call));
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machine_real_restart(MRR_APM);
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} else {
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(void)set_system_power_state(APM_STATE_OFF);
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}
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@ -295,68 +295,16 @@ static int __init reboot_init(void)
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}
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core_initcall(reboot_init);
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/* The following code and data reboots the machine by switching to real
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mode and jumping to the BIOS reset entry point, as if the CPU has
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really been reset. The previous version asked the keyboard
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controller to pulse the CPU reset line, which is more thorough, but
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doesn't work with at least one type of 486 motherboard. It is easy
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to stop this code working; hence the copious comments. */
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static const unsigned long long
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real_mode_gdt_entries [3] =
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extern const unsigned char machine_real_restart_asm[];
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extern const u64 machine_real_restart_gdt[3];
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void machine_real_restart(unsigned int type)
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{
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0x0000000000000000ULL, /* Null descriptor */
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0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
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0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
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};
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void *restart_va;
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unsigned long restart_pa;
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void (*restart_lowmem)(unsigned int);
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u64 *lowmem_gdt;
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static const struct desc_ptr
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real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
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real_mode_idt = { 0x3ff, 0 };
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/* This is 16-bit protected mode code to disable paging and the cache,
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switch to real mode and jump to the BIOS reset code.
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The instruction that switches to real mode by writing to CR0 must be
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followed immediately by a far jump instruction, which set CS to a
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valid value for real mode, and flushes the prefetch queue to avoid
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running instructions that have already been decoded in protected
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mode.
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Clears all the flags except ET, especially PG (paging), PE
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(protected-mode enable) and TS (task switch for coprocessor state
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save). Flushes the TLB after paging has been disabled. Sets CD and
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NW, to disable the cache on a 486, and invalidates the cache. This
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is more like the state of a 486 after reset. I don't know if
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something else should be done for other chips.
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More could be done here to set up the registers as if a CPU reset had
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occurred; hopefully real BIOSs don't assume much. */
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static const unsigned char real_mode_switch [] =
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{
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0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
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0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
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0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
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0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
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0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
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0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
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0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
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0x74, 0x02, /* jz f */
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0x0f, 0x09, /* wbinvd */
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0x24, 0x10, /* f: andb $0x10,al */
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0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
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};
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static const unsigned char jump_to_bios [] =
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{
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0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
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};
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/*
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* Switch to real mode and then execute the code
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* specified by the code and length parameters.
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* We assume that length will aways be less that 100!
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*/
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void machine_real_restart(const unsigned char *code, int length)
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{
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local_irq_disable();
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/* Write zero to CMOS register number 0x0f, which the BIOS POST
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@ -384,41 +332,23 @@ void machine_real_restart(const unsigned char *code, int length)
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too. */
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*((unsigned short *)0x472) = reboot_mode;
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/* For the switch to real mode, copy some code to low memory. It has
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to be in the first 64k because it is running in 16-bit mode, and it
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has to have the same physical and virtual address, because it turns
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off paging. Copy it near the end of the first page, out of the way
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of BIOS variables. */
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memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
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real_mode_switch, sizeof (real_mode_switch));
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memcpy((void *)(0x1000 - 100), code, length);
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/* Patch the GDT in the low memory trampoline */
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lowmem_gdt = TRAMPOLINE_SYM(machine_real_restart_gdt);
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/* Set up the IDT for real mode. */
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load_idt(&real_mode_idt);
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restart_va = TRAMPOLINE_SYM(machine_real_restart_asm);
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restart_pa = virt_to_phys(restart_va);
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restart_lowmem = (void (*)(unsigned int))restart_pa;
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/* Set up a GDT from which we can load segment descriptors for real
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mode. The GDT is not used in real mode; it is just needed here to
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prepare the descriptors. */
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load_gdt(&real_mode_gdt);
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/* GDT[0]: GDT self-pointer */
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lowmem_gdt[0] =
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(u64)(sizeof(machine_real_restart_gdt) - 1) +
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((u64)virt_to_phys(lowmem_gdt) << 16);
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/* GDT[1]: 64K real mode code segment */
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lowmem_gdt[1] =
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GDT_ENTRY(0x009b, restart_pa, 0xffff);
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/* Load the data segment registers, and thus the descriptors ready for
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real mode. The base address of each segment is 0x100, 16 times the
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selector value being loaded here. This is so that the segment
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registers don't have to be reloaded after switching to real mode:
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the values are consistent for real mode operation already. */
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__asm__ __volatile__ ("movl $0x0010,%%eax\n"
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"\tmovl %%eax,%%ds\n"
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"\tmovl %%eax,%%es\n"
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"\tmovl %%eax,%%fs\n"
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"\tmovl %%eax,%%gs\n"
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"\tmovl %%eax,%%ss" : : : "eax");
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/* Jump to the 16-bit code that we copied earlier. It disables paging
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and the cache, switches to real mode, and jumps to the BIOS reset
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entry point. */
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__asm__ __volatile__ ("ljmp $0x0008,%0"
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:
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: "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
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/* Jump to the identity-mapped low memory code */
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restart_lowmem(type);
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}
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#ifdef CONFIG_APM_MODULE
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EXPORT_SYMBOL(machine_real_restart);
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@ -573,7 +503,7 @@ static void native_machine_emergency_restart(void)
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#ifdef CONFIG_X86_32
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case BOOT_BIOS:
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machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
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machine_real_restart(MRR_BIOS);
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reboot_type = BOOT_KBD;
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break;
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@ -0,0 +1,131 @@
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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/*
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* The following code and data reboots the machine by switching to real
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* mode and jumping to the BIOS reset entry point, as if the CPU has
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* really been reset. The previous version asked the keyboard
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* controller to pulse the CPU reset line, which is more thorough, but
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* doesn't work with at least one type of 486 motherboard. It is easy
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* to stop this code working; hence the copious comments.
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*
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* This code is called with the restart type (0 = BIOS, 1 = APM) in %eax.
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*/
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.section ".x86_trampoline","a"
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.balign 16
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.code32
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ENTRY(machine_real_restart_asm)
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r_base = .
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/* Get our own relocated address */
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call 1f
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1: popl %ebx
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subl $1b, %ebx
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/* Patch post-real-mode segment jump */
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movw dispatch_table(%ebx,%ecx,2),%cx
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movw %cx, 101f(%ebx)
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movw %ax, 102f(%ebx)
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/* Set up the IDT for real mode. */
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lidtl machine_real_restart_idt(%ebx)
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/*
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* Set up a GDT from which we can load segment descriptors for real
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* mode. The GDT is not used in real mode; it is just needed here to
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* prepare the descriptors.
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*/
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lgdtl machine_real_restart_gdt(%ebx)
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/*
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* Load the data segment registers with 16-bit compatible values
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*/
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movl $16, %ecx
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movl %ecx, %ds
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movl %ecx, %es
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movl %ecx, %fs
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movl %ecx, %gs
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movl %ecx, %ss
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ljmpl $8, $1f - r_base
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/*
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* This is 16-bit protected mode code to disable paging and the cache,
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* switch to real mode and jump to the BIOS reset code.
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*
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* The instruction that switches to real mode by writing to CR0 must be
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* followed immediately by a far jump instruction, which set CS to a
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* valid value for real mode, and flushes the prefetch queue to avoid
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* running instructions that have already been decoded in protected
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* mode.
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*
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* Clears all the flags except ET, especially PG (paging), PE
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* (protected-mode enable) and TS (task switch for coprocessor state
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* save). Flushes the TLB after paging has been disabled. Sets CD and
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* NW, to disable the cache on a 486, and invalidates the cache. This
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* is more like the state of a 486 after reset. I don't know if
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* something else should be done for other chips.
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*
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* More could be done here to set up the registers as if a CPU reset had
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* occurred; hopefully real BIOSs don't assume much. This is not the
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* actual BIOS entry point, anyway (that is at 0xfffffff0).
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*
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* Most of this work is probably excessive, but it is what is tested.
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*/
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.code16
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1:
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xorl %ecx, %ecx
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movl %cr0, %eax
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andl $0x00000011, %eax
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orl $0x60000000, %eax
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movl %eax, %cr0
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movl %ecx, %cr3
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movl %cr0, %edx
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andl $0x60000000, %edx /* If no cache bits -> no wbinvd */
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jz 2f
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wbinvd
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2:
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andb $0x10, %al
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movl %eax, %cr0
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.byte 0xea /* ljmpw */
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101: .word 0 /* Offset */
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102: .word 0 /* Segment */
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bios:
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ljmpw $0xf000, $0xfff0
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apm:
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movw $0x1000, %ax
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movw %ax, %ss
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movw $0xf000, %sp
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movw $0x5307, %ax
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movw $0x0001, %bx
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movw $0x0003, %cx
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int $0x15
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END(machine_real_restart_asm)
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.balign 16
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/* These must match <asm/reboot.h */
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dispatch_table:
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.word bios - r_base
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.word apm - r_base
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END(dispatch_table)
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.balign 16
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machine_real_restart_idt:
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.word 0xffff /* Length - real mode default value */
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.long 0 /* Base - real mode default value */
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END(machine_real_restart_idt)
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.balign 16
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ENTRY(machine_real_restart_gdt)
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.quad 0 /* Self-pointer, filled in by PM code */
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.quad 0 /* 16-bit code segment, filled in by PM code */
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/*
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* 16-bit data segment with the selector value 16 = 0x10 and
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* base value 0x100; since this is consistent with real mode
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* semantics we don't have to reload the segments once CR0.PE = 0.
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*/
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.quad GDT_ENTRY(0x0093, 0x100, 0xffff)
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END(machine_real_restart_gdt)
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