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[POWERPC] pasemi: UART udbg support 

Early debug output for PA Semi UART. Uses the 2.05 CI real mode ops.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Olof Johansson 2007-02-04 16:36:49 -06:00 committed by Paul Mackerras
parent a1fdf6940a
commit 39c870d5b5
5 changed files with 74 additions and 0 deletions
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7
arch/powerpc/Kconfig.debug
View File

@ -185,6 +185,13 @@ config PPC_EARLY_DEBUG_ISERIES
Select this to enable early debugging for legacy iSeries. You need
to hit "Ctrl-x Ctrl-x" to see the messages on the console.
config PPC_EARLY_DEBUG_PAS_REALMODE
bool "PA Semi real mode"
depends on PPC_PASEMI
help
Select this to enable early debugging for PA Semi.
Output will be on UART0.
config PPC_EARLY_DEBUG_BEAT
bool "Beat HV Console"
depends on PPC_CELLEB

40
arch/powerpc/kernel/misc_64.S
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@ -311,6 +311,46 @@ _GLOBAL(real_writeb)
blr
#endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */
#ifdef CONFIG_PPC_PASEMI
/* No support in all binutils for these yet, so use defines */
#define LBZCIX(RT,RA,RB) .long (0x7c0006aa|(RT<<21)|(RA<<16)|(RB << 11))
#define STBCIX(RS,RA,RB) .long (0x7c0007aa|(RS<<21)|(RA<<16)|(RB << 11))
_GLOBAL(real_205_readb)
mfmsr r7
ori r0,r7,MSR_DR
xori r0,r0,MSR_DR
sync
mtmsrd r0
sync
isync
LBZCIX(r3,0,r3)
isync
mtmsrd r7
sync
isync
blr
_GLOBAL(real_205_writeb)
mfmsr r7
ori r0,r7,MSR_DR
xori r0,r0,MSR_DR
sync
mtmsrd r0
sync
isync
STBCIX(r3,0,r4)
isync
mtmsrd r7
sync
isync
blr
#endif /* CONFIG_PPC_PASEMI */
#ifdef CONFIG_CPU_FREQ_PMAC64
/*
* SCOM access functions for 970 (FX only for now)

2
arch/powerpc/kernel/udbg.c
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@ -47,6 +47,8 @@ void __init udbg_early_init(void)
udbg_init_iseries();
#elif defined(CONFIG_PPC_EARLY_DEBUG_BEAT)
udbg_init_debug_beat();
#elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE)
udbg_init_pas_realmode();
#endif
}

24
arch/powerpc/kernel/udbg_16550.c
View File

@ -14,6 +14,8 @@
extern u8 real_readb(volatile u8 __iomem *addr);
extern void real_writeb(u8 data, volatile u8 __iomem *addr);
extern u8 real_205_readb(volatile u8 __iomem *addr);
extern void real_205_writeb(u8 data, volatile u8 __iomem *addr);
struct NS16550 {
/* this struct must be packed */
@ -167,3 +169,25 @@ void __init udbg_init_maple_realmode(void)
udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC_MAPLE */
#ifdef CONFIG_PPC_PASEMI
void udbg_pas_real_putc(char c)
{
if (udbg_comport) {
while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
/* wait for idle */;
real_205_writeb(c, &udbg_comport->thr); eieio();
if (c == '\n')
udbg_pas_real_putc('\r');
}
}
void udbg_init_pas_realmode(void)
{
udbg_comport = (volatile struct NS16550 __iomem *)0xfcff03f8;
udbg_putc = udbg_pas_real_putc;
udbg_getc = NULL;
udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC_MAPLE */

1
include/asm-powerpc/udbg.h
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@ -41,6 +41,7 @@ extern void __init udbg_early_init(void);
extern void __init udbg_init_debug_lpar(void);
extern void __init udbg_init_pmac_realmode(void);
extern void __init udbg_init_maple_realmode(void);
extern void __init udbg_init_pas_realmode(void);
extern void __init udbg_init_iseries(void);
extern void __init udbg_init_rtas_panel(void);
extern void __init udbg_init_rtas_console(void);