diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c
index 846f464c767..975cf88f0e8 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c6410/cpu.c
@@ -55,7 +55,7 @@ void __init s3c6410_map_io(void)
 
 void __init s3c6410_init_clocks(int xtal)
 {
-	printk(KERN_INFO "%s: initialising clocks\n", __func__);
+	printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
 	s3c24xx_register_baseclocks(xtal);
 	s3c64xx_register_clocks();
 	s3c6400_register_clocks();
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index 99df9dbefa6..a94f1d5e819 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -230,7 +230,7 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
 {
 	int uart, irq;
 
-	printk(KERN_INFO "%s: initialising interrupts\n", __func__);
+	printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
 
 	/* initialise the pair of VICs */
 	vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid);
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index ff5d907f2fc..64a9721cccb 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -137,7 +137,7 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
 {
 	unsigned long rate = clk_get_rate(clk->parent);
 
-	printk(KERN_INFO "%s: parent is %ld\n", __func__, rate);
+	printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate);
 
 	if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK)
 		rate /= 2;
@@ -573,10 +573,10 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
 	unsigned int ptr;
 	u32 clkdiv0;
 
-	printk(KERN_INFO "%s: registering clocks\n", __func__);
+	printk(KERN_DEBUG "%s: registering clocks\n", __func__);
 
 	clkdiv0 = __raw_readl(S3C_CLK_DIV0);
-	printk(KERN_INFO "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
+	printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
 
 	xtal_clk = clk_get(NULL, "xtal");
 	BUG_ON(IS_ERR(xtal_clk));
@@ -584,7 +584,7 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
 	xtal = clk_get_rate(xtal_clk);
 	clk_put(xtal_clk);
 
-	printk(KERN_INFO "%s: xtal is %ld\n", __func__, xtal);
+	printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
 
 	epll = s3c6400_get_epll(xtal);
 	mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));