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@ -507,8 +507,9 @@ int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screenin
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}
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/* Set CRT timing registers */
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void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var,
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u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node)
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void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm,
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struct fb_var_screeninfo *var,
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u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node)
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{
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u8 regval;
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u32 value;
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@ -516,66 +517,66 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf
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value = var->xres + var->left_margin + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal total : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5);
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svga_wcrt_multi(regbase, tm->h_total_regs, (value / 8) - 5);
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value = var->xres;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal display : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1);
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svga_wcrt_multi(regbase, tm->h_display_regs, (value / 8) - 1);
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value = var->xres;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal blank start: %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder);
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svga_wcrt_multi(regbase, tm->h_blank_start_regs, (value / 8) - 1 + hborder);
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value = var->xres + var->left_margin + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal blank end : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder);
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svga_wcrt_multi(regbase, tm->h_blank_end_regs, (value / 8) - 1 - hborder);
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value = var->xres + var->right_margin;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal sync start : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8));
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svga_wcrt_multi(regbase, tm->h_sync_start_regs, (value / 8));
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value = var->xres + var->right_margin + var->hsync_len;
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value = (value * hmul) / hdiv;
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pr_debug("fb%d: horizontal sync end : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8));
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svga_wcrt_multi(regbase, tm->h_sync_end_regs, (value / 8));
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value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical total : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_total_regs, value - 2);
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svga_wcrt_multi(regbase, tm->v_total_regs, value - 2);
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value = var->yres;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical display : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_display_regs, value - 1);
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svga_wcrt_multi(regbase, tm->v_display_regs, value - 1);
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value = var->yres;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical blank start : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_blank_start_regs, value);
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svga_wcrt_multi(regbase, tm->v_blank_start_regs, value);
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value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical blank end : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2);
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svga_wcrt_multi(regbase, tm->v_blank_end_regs, value - 2);
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value = var->yres + var->lower_margin;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical sync start : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_sync_start_regs, value);
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svga_wcrt_multi(regbase, tm->v_sync_start_regs, value);
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value = var->yres + var->lower_margin + var->vsync_len;
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value = (value * vmul) / vdiv;
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pr_debug("fb%d: vertical sync end : %d\n", node, value);
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svga_wcrt_multi(NULL, tm->v_sync_end_regs, value);
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svga_wcrt_multi(regbase, tm->v_sync_end_regs, value);
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/* Set horizontal and vertical sync pulse polarity in misc register */
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regval = vga_r(NULL, VGA_MIS_R);
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regval = vga_r(regbase, VGA_MIS_R);
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if (var->sync & FB_SYNC_HOR_HIGH_ACT) {
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pr_debug("fb%d: positive horizontal sync\n", node);
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regval = regval & ~0x80;
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@ -590,7 +591,7 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf
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pr_debug("fb%d: negative vertical sync\n\n", node);
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regval = regval | 0x40;
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}
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vga_w(NULL, VGA_MIS_W, regval);
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vga_w(regbase, VGA_MIS_W, regval);
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}
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