powerpc: Extended ptrace interface
powerpc: Extended ptrace interface From: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Based on patches originally written by Torez Smith. Add a new extended ptrace interface so that user-space has a single interface for powerpc, without having to know the specific layout of the debug registers. Implement: PPC_PTRACE_GETHWDEBUGINFO PPC_PTRACE_SETHWDEBUG PPC_PTRACE_DELHWDEBUG Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Acked-by: David Gibson <dwg@au1.ibm.com> Cc: Torez Smith <lnxtorez@linux.vnet.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Sergio Durigan Junior <sergiodj@br.ibm.com> Cc: Thiago Jung Bauermann <bauerman@br.ibm.com> Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Dave Kleikamp
Benjamin Herrenschmidt
parent
172ae2e7f8
commit
3162d92dfb
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@ -0,0 +1,134 @@
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GDB intends to support the following hardware debug features of BookE
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processors:
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4 hardware breakpoints (IAC)
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2 hardware watchpoints (read, write and read-write) (DAC)
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2 value conditions for the hardware watchpoints (DVC)
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For that, we need to extend ptrace so that GDB can query and set these
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resources. Since we're extending, we're trying to create an interface
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that's extendable and that covers both BookE and server processors, so
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that GDB doesn't need to special-case each of them. We added the
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following 3 new ptrace requests.
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1. PTRACE_PPC_GETHWDEBUGINFO
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Query for GDB to discover the hardware debug features. The main info to
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be returned here is the minimum alignment for the hardware watchpoints.
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BookE processors don't have restrictions here, but server processors have
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an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid
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adding special cases to GDB based on what it sees in AUXV.
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Since we're at it, we added other useful info that the kernel can return to
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GDB: this query will return the number of hardware breakpoints, hardware
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watchpoints and whether it supports a range of addresses and a condition.
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The query will fill the following structure provided by the requesting process:
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struct ppc_debug_info {
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unit32_t version;
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unit32_t num_instruction_bps;
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unit32_t num_data_bps;
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unit32_t num_condition_regs;
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unit32_t data_bp_alignment;
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unit32_t sizeof_condition; /* size of the DVC register */
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uint64_t features; /* bitmask of the individual flags */
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};
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features will have bits indicating whether there is support for:
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#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
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#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
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#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
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#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
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2. PTRACE_SETHWDEBUG
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Sets a hardware breakpoint or watchpoint, according to the provided structure:
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struct ppc_hw_breakpoint {
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uint32_t version;
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#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
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#define PPC_BREAKPOINT_TRIGGER_READ 0x2
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#define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
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uint32_t trigger_type; /* only some combinations allowed */
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#define PPC_BREAKPOINT_MODE_EXACT 0x0
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#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
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#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
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#define PPC_BREAKPOINT_MODE_MASK 0x3
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uint32_t addr_mode; /* address match mode */
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#define PPC_BREAKPOINT_CONDITION_MODE 0x3
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#define PPC_BREAKPOINT_CONDITION_NONE 0x0
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#define PPC_BREAKPOINT_CONDITION_AND 0x1
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#define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */
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#define PPC_BREAKPOINT_CONDITION_OR 0x2
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#define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
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#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */
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#define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16))
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uint32_t condition_mode; /* break/watchpoint condition flags */
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uint64_t addr;
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uint64_t addr2;
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uint64_t condition_value;
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};
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A request specifies one event, not necessarily just one register to be set.
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For instance, if the request is for a watchpoint with a condition, both the
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DAC and DVC registers will be set in the same request.
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With this GDB can ask for all kinds of hardware breakpoints and watchpoints
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that the BookE supports. COMEFROM breakpoints available in server processors
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are not contemplated, but that is out of the scope of this work.
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ptrace will return an integer (handle) uniquely identifying the breakpoint or
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watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG
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request to ask for its removal. Return -ENOSPC if the requested breakpoint
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can't be allocated on the registers.
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Some examples of using the structure to:
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- set a breakpoint in the first breakpoint register
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p.version = PPC_DEBUG_CURRENT_VERSION;
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p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE;
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p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;
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p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
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p.addr = (uint64_t) address;
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p.addr2 = 0;
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p.condition_value = 0;
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- set a watchpoint which triggers on reads in the second watchpoint register
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p.version = PPC_DEBUG_CURRENT_VERSION;
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p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ;
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p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;
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p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
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p.addr = (uint64_t) address;
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p.addr2 = 0;
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p.condition_value = 0;
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- set a watchpoint which triggers only with a specific value
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p.version = PPC_DEBUG_CURRENT_VERSION;
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p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ;
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p.addr_mode = PPC_BREAKPOINT_MODE_EXACT;
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p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL;
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p.addr = (uint64_t) address;
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p.addr2 = 0;
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p.condition_value = (uint64_t) condition;
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- set a ranged hardware breakpoint
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p.version = PPC_DEBUG_CURRENT_VERSION;
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p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE;
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p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE;
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p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
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p.addr = (uint64_t) begin_range;
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p.addr2 = (uint64_t) end_range;
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p.condition_value = 0;
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3. PTRACE_DELHWDEBUG
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Takes an integer which identifies an existing breakpoint or watchpoint
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(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the
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corresponding breakpoint or watchpoint..
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@ -24,6 +24,12 @@
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* 2 of the License, or (at your option) any later version.
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*/
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#ifdef __KERNEL__
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#include <linux/types.h>
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#else
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#include <stdint.h>
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#endif
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#ifndef __ASSEMBLY__
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struct pt_regs {
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@ -294,4 +300,75 @@ extern void user_disable_single_step(struct task_struct *);
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#define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */
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#define PPC_PTRACE_GETHWDBGINFO 0x89
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#define PPC_PTRACE_SETHWDEBUG 0x88
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#define PPC_PTRACE_DELHWDEBUG 0x87
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#ifndef __ASSEMBLY__
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struct ppc_debug_info {
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uint32_t version; /* Only version 1 exists to date */
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uint32_t num_instruction_bps;
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uint32_t num_data_bps;
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uint32_t num_condition_regs;
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uint32_t data_bp_alignment;
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uint32_t sizeof_condition; /* size of the DVC register */
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uint64_t features;
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};
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#endif /* __ASSEMBLY__ */
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/*
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* features will have bits indication whether there is support for:
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*/
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#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x0000000000000001
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#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002
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#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004
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#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008
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#ifndef __ASSEMBLY__
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struct ppc_hw_breakpoint {
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uint32_t version; /* currently, version must be 1 */
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uint32_t trigger_type; /* only some combinations allowed */
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uint32_t addr_mode; /* address match mode */
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uint32_t condition_mode; /* break/watchpoint condition flags */
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uint64_t addr; /* break/watchpoint address */
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uint64_t addr2; /* range end or mask */
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uint64_t condition_value; /* contents of the DVC register */
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};
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#endif /* __ASSEMBLY__ */
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/*
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* Trigger Type
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*/
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#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x00000001
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#define PPC_BREAKPOINT_TRIGGER_READ 0x00000002
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#define PPC_BREAKPOINT_TRIGGER_WRITE 0x00000004
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#define PPC_BREAKPOINT_TRIGGER_RW \
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(PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
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/*
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* Address Mode
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*/
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#define PPC_BREAKPOINT_MODE_EXACT 0x00000000
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#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x00000001
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#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x00000002
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#define PPC_BREAKPOINT_MODE_MASK 0x00000003
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/*
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* Condition Mode
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*/
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#define PPC_BREAKPOINT_CONDITION_MODE 0x00000003
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#define PPC_BREAKPOINT_CONDITION_NONE 0x00000000
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#define PPC_BREAKPOINT_CONDITION_AND 0x00000001
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#define PPC_BREAKPOINT_CONDITION_EXACT PPC_BREAKPOINT_CONDITION_AND
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#define PPC_BREAKPOINT_CONDITION_OR 0x00000002
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#define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
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#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
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#define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
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#define PPC_BREAKPOINT_CONDITION_BE(n) \
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(1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
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#endif /* _ASM_POWERPC_PTRACE_H */
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@ -835,6 +835,52 @@ void ptrace_disable(struct task_struct *child)
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user_disable_single_step(child);
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}
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static long ppc_set_hwdebug(struct task_struct *child,
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struct ppc_hw_breakpoint *bp_info)
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{
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/*
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* We currently support one data breakpoint
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*/
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if (((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0) ||
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((bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0) ||
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(bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_WRITE) ||
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(bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) ||
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(bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
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return -EINVAL;
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if (child->thread.dabr)
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return -ENOSPC;
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if ((unsigned long)bp_info->addr >= TASK_SIZE)
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return -EIO;
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child->thread.dabr = (unsigned long)bp_info->addr;
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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child->thread.dbcr0 = DBCR0_IDM;
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if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
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child->thread.dbcr0 |= DBSR_DAC1R;
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if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
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child->thread.dbcr0 |= DBSR_DAC1W;
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child->thread.regs->msr |= MSR_DE;
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#endif
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return 1;
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}
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static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
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{
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if (data != 1)
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return -EINVAL;
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if (child->thread.dabr == 0)
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return -ENOENT;
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child->thread.dabr = 0;
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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child->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | DBCR0_IDM);
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child->thread.regs->msr &= ~MSR_DE;
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#endif
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return 0;
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}
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/*
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* Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
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* we mark them as obsolete now, they will be removed in a future version
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@ -928,6 +974,50 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
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break;
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}
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case PPC_PTRACE_GETHWDBGINFO: {
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struct ppc_debug_info dbginfo;
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dbginfo.version = 1;
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dbginfo.num_instruction_bps = 0;
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dbginfo.num_data_bps = 1;
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dbginfo.num_condition_regs = 0;
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#ifdef CONFIG_PPC64
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dbginfo.data_bp_alignment = 8;
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#else
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dbginfo.data_bp_alignment = 4;
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#endif
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dbginfo.sizeof_condition = 0;
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dbginfo.features = 0;
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if (!access_ok(VERIFY_WRITE, data,
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sizeof(struct ppc_debug_info)))
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return -EFAULT;
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ret = __copy_to_user((struct ppc_debug_info __user *)data,
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&dbginfo, sizeof(struct ppc_debug_info)) ?
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-EFAULT : 0;
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break;
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}
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case PPC_PTRACE_SETHWDEBUG: {
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struct ppc_hw_breakpoint bp_info;
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if (!access_ok(VERIFY_READ, data,
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sizeof(struct ppc_hw_breakpoint)))
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return -EFAULT;
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ret = __copy_from_user(&bp_info,
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(struct ppc_hw_breakpoint __user *)data,
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sizeof(struct ppc_hw_breakpoint)) ?
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-EFAULT : 0;
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if (!ret)
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ret = ppc_set_hwdebug(child, &bp_info);
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break;
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}
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case PPC_PTRACE_DELHWDEBUG: {
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ret = ppc_del_hwdebug(child, addr, data);
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break;
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}
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case PTRACE_GET_DEBUGREG: {
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ret = -EINVAL;
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/* We only support one DABR and no IABRS at the moment */
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