[PATCH] ppc32: support hotplug cpu on powermacs
This allows cpus to be off-lined on 32-bit SMP powermacs. When a cpu is off-lined, it is put into sleep mode with interrupts disabled. It can be on-lined again by asserting its soft-reset pin, which is connected to a GPIO pin. With this I can off-line the second cpu in my dual G4 powermac, which means that I can then suspend the machine (the suspend/resume code refuses to suspend if more than one cpu is online, and making it cope with multiple cpus is surprisingly messy). Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Paul Mackerras
Linus Torvalds
parent
bb0bb3b659
commit
31139971b3
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@ -265,6 +265,15 @@ config PPC601_SYNC_FIX
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If in doubt, say Y here.
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config HOTPLUG_CPU
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bool "Support for enabling/disabling CPUs"
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depends on SMP && HOTPLUG && EXPERIMENTAL && PPC_PMAC
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---help---
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Say Y here to be able to disable and re-enable individual
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CPUs at runtime on SMP machines.
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Say N if you are unsure.
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source arch/ppc/platforms/4xx/Kconfig
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source arch/ppc/platforms/85xx/Kconfig
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@ -1023,23 +1023,21 @@ __secondary_start_gemini:
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andc r4,r4,r3
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mtspr SPRN_HID0,r4
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sync
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bl gemini_prom_init
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b __secondary_start
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#endif /* CONFIG_GEMINI */
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.globl __secondary_start_psurge
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__secondary_start_psurge:
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li r24,1 /* cpu # */
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b __secondary_start_psurge99
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.globl __secondary_start_psurge2
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__secondary_start_psurge2:
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li r24,2 /* cpu # */
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b __secondary_start_psurge99
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.globl __secondary_start_psurge3
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__secondary_start_psurge3:
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li r24,3 /* cpu # */
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b __secondary_start_psurge99
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__secondary_start_psurge99:
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/* we come in here with IR=0 and DR=1, and DBAT 0
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.globl __secondary_start_pmac_0
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__secondary_start_pmac_0:
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/* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
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li r24,0
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b 1f
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li r24,1
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b 1f
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li r24,2
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b 1f
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li r24,3
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1:
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/* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0
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set to map the 0xf0000000 - 0xffffffff region */
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mfmsr r0
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rlwinm r0,r0,0,28,26 /* clear DR (0x10) */
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@ -22,6 +22,7 @@
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/sysctl.h>
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#include <linux/cpu.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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@ -35,6 +36,7 @@
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void default_idle(void)
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{
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void (*powersave)(void);
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int cpu = smp_processor_id();
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powersave = ppc_md.power_save;
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@ -44,7 +46,7 @@ void default_idle(void)
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#ifdef CONFIG_SMP
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else {
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set_thread_flag(TIF_POLLING_NRFLAG);
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while (!need_resched())
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while (!need_resched() && !cpu_is_offline(cpu))
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barrier();
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clear_thread_flag(TIF_POLLING_NRFLAG);
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}
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@ -52,6 +54,8 @@ void default_idle(void)
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}
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if (need_resched())
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schedule();
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if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
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cpu_die();
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}
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/*
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@ -45,6 +45,7 @@ cpumask_t cpu_online_map;
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cpumask_t cpu_possible_map;
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int smp_hw_index[NR_CPUS];
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struct thread_info *secondary_ti;
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static struct task_struct *idle_tasks[NR_CPUS];
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EXPORT_SYMBOL(cpu_online_map);
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EXPORT_SYMBOL(cpu_possible_map);
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@ -286,7 +287,8 @@ static void __devinit smp_store_cpu_info(int id)
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int num_cpus, i;
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int num_cpus, i, cpu;
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struct task_struct *p;
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/* Fixup boot cpu */
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smp_store_cpu_info(smp_processor_id());
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@ -308,6 +310,17 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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if (smp_ops->space_timers)
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smp_ops->space_timers(num_cpus);
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for_each_cpu(cpu) {
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if (cpu == smp_processor_id())
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continue;
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/* create a process for the processor */
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p = fork_idle(cpu);
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if (IS_ERR(p))
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panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
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p->thread_info->cpu = cpu;
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idle_tasks[cpu] = p;
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}
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}
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void __devinit smp_prepare_boot_cpu(void)
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@ -334,12 +347,17 @@ int __devinit start_secondary(void *unused)
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set_dec(tb_ticks_per_jiffy);
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cpu_callin_map[cpu] = 1;
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printk("CPU %i done callin...\n", cpu);
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printk("CPU %d done callin...\n", cpu);
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smp_ops->setup_cpu(cpu);
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printk("CPU %i done setup...\n", cpu);
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local_irq_enable();
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printk("CPU %d done setup...\n", cpu);
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smp_ops->take_timebase();
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printk("CPU %i done timebase take...\n", cpu);
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printk("CPU %d done timebase take...\n", cpu);
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spin_lock(&call_lock);
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cpu_set(cpu, cpu_online_map);
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spin_unlock(&call_lock);
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local_irq_enable();
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cpu_idle();
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return 0;
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@ -347,17 +365,11 @@ int __devinit start_secondary(void *unused)
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int __cpu_up(unsigned int cpu)
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{
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struct task_struct *p;
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char buf[32];
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int c;
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/* create a process for the processor */
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/* only regs.msr is actually used, and 0 is OK for it */
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p = fork_idle(cpu);
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if (IS_ERR(p))
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panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
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secondary_ti = p->thread_info;
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p->thread_info->cpu = cpu;
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secondary_ti = idle_tasks[cpu]->thread_info;
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mb();
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/*
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* There was a cache flush loop here to flush the cache
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@ -389,7 +401,11 @@ int __cpu_up(unsigned int cpu)
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printk("Processor %d found.\n", cpu);
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smp_ops->give_timebase();
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cpu_set(cpu, cpu_online_map);
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/* Wait until cpu puts itself in the online map */
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while (!cpu_online(cpu))
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cpu_relax();
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return 0;
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}
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@ -161,6 +161,8 @@ _GLOBAL(low_sleep_handler)
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addi r3,r3,sleep_storage@l
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stw r5,0(r3)
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.globl low_cpu_die
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low_cpu_die:
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/* Flush & disable all caches */
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bl flush_disable_caches
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@ -33,6 +33,7 @@
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/hardirq.h>
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#include <linux/cpu.h>
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#include <asm/ptrace.h>
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#include <asm/atomic.h>
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@ -55,9 +56,7 @@
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* Powersurge (old powermac SMP) support.
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*/
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extern void __secondary_start_psurge(void);
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extern void __secondary_start_psurge2(void); /* Temporary horrible hack */
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extern void __secondary_start_psurge3(void); /* Temporary horrible hack */
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extern void __secondary_start_pmac_0(void);
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/* Addresses for powersurge registers */
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#define HAMMERHEAD_BASE 0xf8000000
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@ -119,7 +118,7 @@ static volatile int sec_tb_reset = 0;
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static unsigned int pri_tb_hi, pri_tb_lo;
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static unsigned int pri_tb_stamp;
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static void __init core99_init_caches(int cpu)
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static void __devinit core99_init_caches(int cpu)
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{
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if (!cpu_has_feature(CPU_FTR_L2CR))
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return;
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@ -346,7 +345,7 @@ static int __init smp_psurge_probe(void)
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static void __init smp_psurge_kick_cpu(int nr)
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{
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void (*start)(void) = __secondary_start_psurge;
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unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;
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unsigned long a;
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/* may need to flush here if secondary bats aren't setup */
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@ -356,17 +355,7 @@ static void __init smp_psurge_kick_cpu(int nr)
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if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353);
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/* setup entry point of secondary processor */
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switch (nr) {
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case 2:
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start = __secondary_start_psurge2;
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break;
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case 3:
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start = __secondary_start_psurge3;
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break;
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}
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out_be32(psurge_start, __pa(start));
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out_be32(psurge_start, start);
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mb();
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psurge_set_ipi(nr);
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@ -500,14 +489,14 @@ static int __init smp_core99_probe(void)
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return ncpus;
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}
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static void __init smp_core99_kick_cpu(int nr)
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static void __devinit smp_core99_kick_cpu(int nr)
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{
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unsigned long save_vector, new_vector;
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unsigned long flags;
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volatile unsigned long *vector
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= ((volatile unsigned long *)(KERNELBASE+0x100));
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if (nr < 1 || nr > 3)
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if (nr < 0 || nr > 3)
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return;
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if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346);
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@ -518,19 +507,9 @@ static void __init smp_core99_kick_cpu(int nr)
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save_vector = *vector;
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/* Setup fake reset vector that does
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* b __secondary_start_psurge - KERNELBASE
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* b __secondary_start_pmac_0 + nr*8 - KERNELBASE
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*/
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switch(nr) {
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case 1:
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new_vector = (unsigned long)__secondary_start_psurge;
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break;
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case 2:
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new_vector = (unsigned long)__secondary_start_psurge2;
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break;
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case 3:
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new_vector = (unsigned long)__secondary_start_psurge3;
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break;
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}
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new_vector = (unsigned long) __secondary_start_pmac_0 + nr * 8;
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*vector = 0x48000002 + new_vector - KERNELBASE;
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/* flush data cache and inval instruction cache */
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@ -554,7 +533,7 @@ static void __init smp_core99_kick_cpu(int nr)
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if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
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}
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static void __init smp_core99_setup_cpu(int cpu_nr)
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static void __devinit smp_core99_setup_cpu(int cpu_nr)
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{
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/* Setup L2/L3 */
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if (cpu_nr != 0)
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@ -668,3 +647,47 @@ struct smp_ops_t core99_smp_ops __pmacdata = {
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.give_timebase = smp_core99_give_timebase,
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.take_timebase = smp_core99_take_timebase,
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};
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#ifdef CONFIG_HOTPLUG_CPU
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int __cpu_disable(void)
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{
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cpu_clear(smp_processor_id(), cpu_online_map);
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/* XXX reset cpu affinity here */
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openpic_set_priority(0xf);
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asm volatile("mtdec %0" : : "r" (0x7fffffff));
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mb();
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udelay(20);
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asm volatile("mtdec %0" : : "r" (0x7fffffff));
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return 0;
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}
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extern void low_cpu_die(void) __attribute__((noreturn)); /* in pmac_sleep.S */
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static int cpu_dead[NR_CPUS];
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void cpu_die(void)
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{
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local_irq_disable();
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cpu_dead[smp_processor_id()] = 1;
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mb();
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low_cpu_die();
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}
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void __cpu_die(unsigned int cpu)
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{
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int timeout;
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timeout = 1000;
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while (!cpu_dead[cpu]) {
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if (--timeout == 0) {
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printk("CPU %u refused to die!\n", cpu);
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break;
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}
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msleep(1);
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}
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cpu_callin_map[cpu] = 0;
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cpu_dead[cpu] = 0;
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}
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#endif
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@ -41,6 +41,10 @@ extern void smp_send_xmon_break(int cpu);
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struct pt_regs;
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extern void smp_message_recv(int, struct pt_regs *);
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void) __attribute__((noreturn));
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#define PROC_CHANGE_PENALTY 20
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@ -64,6 +68,8 @@ extern struct klock_info_struct klock_info;
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#else /* !(CONFIG_SMP) */
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static inline void cpu_die(void) { }
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#endif /* !(CONFIG_SMP) */
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#endif /* !(_PPC_SMP_H) */
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