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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Fix marge error due to conflict in arch/mips/kernel/head.S
  [MIPS] ARC: Remove unused arch/mips/arc/console.c
  [MIPS] SNI: sniprom
  [MIPS] Jazz: remove unneeded reset functions
  [MIPS] Whitespace cleanup.
  [MIPS] Make resources for ds1742 "static __initdata"
  [MIPS] Replace __attribute_used__ with __used
  [MIPS] Jazz: Remove unused arch/mips/jazz/io.c
  [MIPS] Mark prom_free_prom_memory as __init_refok
  [MIPS] MIPSsim: Fix cflags
This commit is contained in:
Linus Torvalds 2007-07-24 16:00:26 -07:00
parent 1e66239e23 cdcc9eb5e0
commit 2f66b529d9
17 changed files with 16 additions and 200 deletions
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2
arch/mips/Makefile
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@ -328,7 +328,7 @@ load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
# MIPS SIM
#
core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim
load-$(CONFIG_MIPS_SIM) += 0x80100000
#

31
arch/mips/arc/console.c
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@ -1,31 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996 David S. Miller (dm@sgi.com)
* Compability with board caches, Ulf Carlsson
*/
#include <linux/kernel.h>
#include <asm/sgialib.h>
#include <asm/bcache.h>
/*
* IP22 boardcache is not compatible with board caches. Thus we disable it
* during romvec action. Since r4xx0.c is always compiled and linked with your
* kernel, this shouldn't cause any harm regardless what MIPS processor you
* have.
*
* The ARC write and read functions seem to interfere with the serial lines
* in some way. You should be careful with them.
*/
void prom_putchar(char c)
{
ULONG cnt;
CHAR it = c;
bc_disable();
ArcWrite(1, &it, 1, &cnt);
bc_enable();
}

135
arch/mips/jazz/io.c
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@ -1,135 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Low level I/O functions for Jazz family machines.
*
* Copyright (C) 1997 by Ralf Baechle.
*/
#include <linux/string.h>
#include <linux/spinlock.h>
#include <asm/addrspace.h>
#include <asm/system.h>
#include <asm/jazz.h>
/*
* Map an 16mb segment of the EISA address space to 0xe3000000;
*/
static inline void map_eisa_address(unsigned long address)
{
/* XXX */
/* We've got an wired entry in the TLB. We just need to modify it.
fast and clean. But since we want to get rid of wired entries
things are a little bit more complicated ... */
}
static unsigned char jazz_readb(unsigned long addr)
{
unsigned char res;
map_eisa_address(addr);
addr &= 0xffffff;
res = *(volatile unsigned char *) (JAZZ_EISA_BASE + addr);
return res;
}
static unsigned short jazz_readw(unsigned long addr)
{
unsigned short res;
map_eisa_address(addr);
addr &= 0xffffff;
res = *(volatile unsigned char *) (JAZZ_EISA_BASE + addr);
return res;
}
static unsigned int jazz_readl(unsigned long addr)
{
unsigned int res;
map_eisa_address(addr);
addr &= 0xffffff;
res = *(volatile unsigned char *) (JAZZ_EISA_BASE + addr);
return res;
}
static void jazz_writeb(unsigned char val, unsigned long addr)
{
map_eisa_address(addr);
addr &= 0xffffff;
*(volatile unsigned char *) (JAZZ_EISA_BASE + addr) = val;
}
static void jazz_writew(unsigned short val, unsigned long addr)
{
map_eisa_address(addr);
addr &= 0xffffff;
*(volatile unsigned char *) (JAZZ_EISA_BASE + addr) = val;
}
static void jazz_writel(unsigned int val, unsigned long addr)
{
map_eisa_address(addr);
addr &= 0xffffff;
*(volatile unsigned char *) (JAZZ_EISA_BASE + addr) = val;
}
static void jazz_memset_io(unsigned long addr, int val, unsigned long len)
{
unsigned long waddr;
waddr = JAZZ_EISA_BASE | (addr & 0xffffff);
while(len) {
unsigned long fraglen;
fraglen = (~addr + 1) & 0xffffff;
fraglen = (fraglen < len) ? fraglen : len;
map_eisa_address(addr);
memset((char *)waddr, val, fraglen);
addr += fraglen;
waddr = waddr + fraglen - 0x1000000;
len -= fraglen;
}
}
static void jazz_memcpy_fromio(unsigned long to, unsigned long from, unsigned long len)
{
unsigned long waddr;
waddr = JAZZ_EISA_BASE | (from & 0xffffff);
while(len) {
unsigned long fraglen;
fraglen = (~from + 1) & 0xffffff;
fraglen = (fraglen < len) ? fraglen : len;
map_eisa_address(from);
memcpy((void *)to, (void *)waddr, fraglen);
to += fraglen;
from += fraglen;
waddr = waddr + fraglen - 0x1000000;
len -= fraglen;
}
}
static void jazz_memcpy_toio(unsigned long to, unsigned long from, unsigned long len)
{
unsigned long waddr;
waddr = JAZZ_EISA_BASE | (to & 0xffffff);
while(len) {
unsigned long fraglen;
fraglen = (~to + 1) & 0xffffff;
fraglen = (fraglen < len) ? fraglen : len;
map_eisa_address(to);
memcpy((char *)to + JAZZ_EISA_BASE, (void *)from, fraglen);
to += fraglen;
from += fraglen;
waddr = waddr + fraglen - 0x1000000;
len -= fraglen;
}
}

13
arch/mips/jazz/reset.c
View File

@ -6,10 +6,6 @@
*/
#include <linux/jiffies.h>
#include <asm/jazz.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/reboot.h>
#include <asm/delay.h>
#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
@ -58,12 +54,3 @@ void jazz_machine_restart(char *command)
jazz_write_output (0x00);
}
}
void jazz_machine_halt(void)
{
}
void jazz_machine_power_off(void)
{
/* Jazz machines don't have a software power switch */
}

4
arch/mips/jazz/setup.c
View File

@ -34,8 +34,6 @@
extern asmlinkage void jazz_handle_int(void);
extern void jazz_machine_restart(char *command);
extern void jazz_machine_halt(void);
extern void jazz_machine_power_off(void);
void __init plat_timer_setup(struct irqaction *irq)
{
@ -95,8 +93,6 @@ void __init plat_mem_setup(void)
/* The RTC is outside the port address space */
_machine_restart = jazz_machine_restart;
_machine_halt = jazz_machine_halt;
pm_power_off = jazz_machine_power_off;
screen_info = (struct screen_info) {
0, 0, /* orig-x, orig-y */

2
arch/mips/jmr3927/rbhma3100/setup.c
View File

@ -434,7 +434,7 @@ EXPORT_SYMBOL(__swizzle_addr_b);
static int __init jmr3927_rtc_init(void)
{
struct resource res = {
static struct resource __initdata res = {
.start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
.end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
.flags = IORESOURCE_MEM,

4
arch/mips/kernel/gdb-stub.c
View File

@ -1099,12 +1099,12 @@ void adel(void)
* malloc is needed by gdb client in "call func()", even a private one
* will make gdb happy
*/
static void * __attribute_used__ malloc(size_t size)
static void __used *malloc(size_t size)
{
return kmalloc(size, GFP_ATOMIC);
}
static void __attribute_used__ free (void *where)
static void __used free(void *where)
{
kfree(where);
}

2
arch/mips/kernel/head.S
View File

@ -141,7 +141,7 @@
EXPORT(stext) # used for profiling
EXPORT(_stext)
#ifdef CONFIG_BOOT_RAW
#ifndef CONFIG_BOOT_RAW
/*
* Give us a fighting chance of running if execution beings at the
* kernel load address. This is needed because this platform does

2
arch/mips/kernel/linux32.c
View File

@ -567,7 +567,7 @@ asmlinkage long sys32_fadvise64_64(int fd, int __pad,
}
save_static_function(sys32_clone);
__attribute_used__ noinline static int
static int noinline __used
_sys32_clone(nabi_no_regargs struct pt_regs regs)
{
unsigned long clone_flags;

2
arch/mips/kernel/rtlx.c
View File

@ -85,7 +85,7 @@ static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static __attribute_used__ void dump_rtlx(void)
static void __used dump_rtlx(void)
{
int i;

4
arch/mips/kernel/syscall.c
View File

@ -167,14 +167,14 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
}
save_static_function(sys_fork);
__attribute_used__ noinline static int
static int __used noinline
_sys_fork(nabi_no_regargs struct pt_regs regs)
{
return do_fork(SIGCHLD, regs.regs[29], &regs, 0, NULL, NULL);
}
save_static_function(sys_clone);
__attribute_used__ noinline static int
static int __used noinline
_sys_clone(nabi_no_regargs struct pt_regs regs)
{
unsigned long clone_flags;

3
arch/mips/kernel/vpe.c
View File

@ -154,7 +154,6 @@ struct {
};
static void release_progmem(void *ptr);
/* static __attribute_used__ void dump_vpe(struct vpe * v); */
extern void save_gp_address(unsigned int secbase, unsigned int rel);
/* get the vpe associated with this minor */
@ -1024,7 +1023,7 @@ static int vpe_elfload(struct vpe * v)
return 0;
}
__attribute_used__ void dump_vpe(struct vpe * v)
void __used dump_vpe(struct vpe * v)
{
struct tc *t;

2
arch/mips/mm/c-sb1.c
View File

@ -272,7 +272,7 @@ void sb1_flush_cache_data_page(unsigned long)
/*
* Invalidate all caches on this CPU
*/
static void __attribute_used__ local_sb1___flush_cache_all(void)
static void __used local_sb1___flush_cache_all(void)
{
__sb1_writeback_inv_dcache_all();
__sb1_flush_icache_all();

2
arch/mips/mm/init.c
View File

@ -484,7 +484,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
}
#endif
void free_initmem(void)
void __init_refok free_initmem(void)
{
prom_free_prom_memory();
free_init_pages("unused kernel memory",

5
arch/mips/sni/sniprom.c
View File

@ -19,6 +19,7 @@
#include <asm/addrspace.h>
#include <asm/sni.h>
#include <asm/mipsprom.h>
#include <asm/mipsregs.h>
#include <asm/bootinfo.h>
/* special SNI prom calls */
@ -71,7 +72,7 @@ const char *get_system_type(void)
#define SNI_IDPROM_SIZE 0x1000
#ifdef DEBUG
static void sni_idprom_dump(void)
static void __init sni_idprom_dump(void)
{
int i;
@ -88,7 +89,7 @@ static void sni_idprom_dump(void)
}
#endif
static void sni_mem_init(void )
static void __init sni_mem_init(void )
{
int i, memsize;
struct membank {

2
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
View File

@ -1020,7 +1020,7 @@ void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
static int __init toshiba_rbtx4927_rtc_init(void)
{
struct resource res = {
static struct resource __initdata res = {
.start = 0x1c010000,
.end = 0x1c010000 + 0x800 - 1,
.flags = IORESOURCE_MEM,

1
include/asm-mips/war.h
View File

@ -188,7 +188,6 @@
#define ICACHE_REFILLS_WORKAROUND_WAR 1
#endif
/*
* On the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
* may cause ll / sc and lld / scd sequences to execute non-atomically.