netxen: fix endianness in firmware commands
o Set restricted (little endian) data types in firmware command requests and responses. o Remove unnecessary conversion to LE when writing registers. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Dhananjay Phadke
David S. Miller
parent
d1d5e6b1ce
commit
2edbb45442
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@ -995,31 +995,31 @@ struct netxen_recv_context {
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*/
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typedef struct {
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u64 host_phys_addr; /* Ring base addr */
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u32 ring_size; /* Ring entries */
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u16 msi_index;
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u16 rsvd; /* Padding */
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__le64 host_phys_addr; /* Ring base addr */
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__le32 ring_size; /* Ring entries */
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__le16 msi_index;
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__le16 rsvd; /* Padding */
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} nx_hostrq_sds_ring_t;
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typedef struct {
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u64 host_phys_addr; /* Ring base addr */
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u64 buff_size; /* Packet buffer size */
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u32 ring_size; /* Ring entries */
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u32 ring_kind; /* Class of ring */
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__le64 host_phys_addr; /* Ring base addr */
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__le64 buff_size; /* Packet buffer size */
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__le32 ring_size; /* Ring entries */
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__le32 ring_kind; /* Class of ring */
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} nx_hostrq_rds_ring_t;
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typedef struct {
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u64 host_rsp_dma_addr; /* Response dma'd here */
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u32 capabilities[4]; /* Flag bit vector */
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u32 host_int_crb_mode; /* Interrupt crb usage */
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u32 host_rds_crb_mode; /* RDS crb usage */
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__le64 host_rsp_dma_addr; /* Response dma'd here */
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__le32 capabilities[4]; /* Flag bit vector */
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__le32 host_int_crb_mode; /* Interrupt crb usage */
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__le32 host_rds_crb_mode; /* RDS crb usage */
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/* These ring offsets are relative to data[0] below */
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u32 rds_ring_offset; /* Offset to RDS config */
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u32 sds_ring_offset; /* Offset to SDS config */
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u16 num_rds_rings; /* Count of RDS rings */
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u16 num_sds_rings; /* Count of SDS rings */
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u16 rsvd1; /* Padding */
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u16 rsvd2; /* Padding */
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__le32 rds_ring_offset; /* Offset to RDS config */
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__le32 sds_ring_offset; /* Offset to SDS config */
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__le16 num_rds_rings; /* Count of RDS rings */
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__le16 num_sds_rings; /* Count of SDS rings */
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__le16 rsvd1; /* Padding */
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__le16 rsvd2; /* Padding */
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u8 reserved[128]; /* reserve space for future expansion*/
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/* MUST BE 64-bit aligned.
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The following is packed:
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@ -1029,24 +1029,24 @@ typedef struct {
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} nx_hostrq_rx_ctx_t;
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typedef struct {
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u32 host_producer_crb; /* Crb to use */
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u32 rsvd1; /* Padding */
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__le32 host_producer_crb; /* Crb to use */
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__le32 rsvd1; /* Padding */
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} nx_cardrsp_rds_ring_t;
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typedef struct {
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u32 host_consumer_crb; /* Crb to use */
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u32 interrupt_crb; /* Crb to use */
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__le32 host_consumer_crb; /* Crb to use */
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__le32 interrupt_crb; /* Crb to use */
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} nx_cardrsp_sds_ring_t;
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typedef struct {
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/* These ring offsets are relative to data[0] below */
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u32 rds_ring_offset; /* Offset to RDS config */
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u32 sds_ring_offset; /* Offset to SDS config */
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u32 host_ctx_state; /* Starting State */
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u32 num_fn_per_port; /* How many PCI fn share the port */
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u16 num_rds_rings; /* Count of RDS rings */
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u16 num_sds_rings; /* Count of SDS rings */
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u16 context_id; /* Handle for context */
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__le32 rds_ring_offset; /* Offset to RDS config */
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__le32 sds_ring_offset; /* Offset to SDS config */
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__le32 host_ctx_state; /* Starting State */
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__le32 num_fn_per_port; /* How many PCI fn share the port */
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__le16 num_rds_rings; /* Count of RDS rings */
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__le16 num_sds_rings; /* Count of SDS rings */
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__le16 context_id; /* Handle for context */
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u8 phys_port; /* Physical id of port */
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u8 virt_port; /* Virtual/Logical id of port */
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u8 reserved[128]; /* save space for future expansion */
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@ -1072,34 +1072,34 @@ typedef struct {
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*/
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typedef struct {
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u64 host_phys_addr; /* Ring base addr */
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u32 ring_size; /* Ring entries */
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u32 rsvd; /* Padding */
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__le64 host_phys_addr; /* Ring base addr */
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__le32 ring_size; /* Ring entries */
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__le32 rsvd; /* Padding */
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} nx_hostrq_cds_ring_t;
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typedef struct {
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u64 host_rsp_dma_addr; /* Response dma'd here */
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u64 cmd_cons_dma_addr; /* */
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u64 dummy_dma_addr; /* */
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u32 capabilities[4]; /* Flag bit vector */
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u32 host_int_crb_mode; /* Interrupt crb usage */
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u32 rsvd1; /* Padding */
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u16 rsvd2; /* Padding */
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u16 interrupt_ctl;
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u16 msi_index;
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u16 rsvd3; /* Padding */
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__le64 host_rsp_dma_addr; /* Response dma'd here */
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__le64 cmd_cons_dma_addr; /* */
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__le64 dummy_dma_addr; /* */
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__le32 capabilities[4]; /* Flag bit vector */
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__le32 host_int_crb_mode; /* Interrupt crb usage */
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__le32 rsvd1; /* Padding */
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__le16 rsvd2; /* Padding */
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__le16 interrupt_ctl;
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__le16 msi_index;
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__le16 rsvd3; /* Padding */
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nx_hostrq_cds_ring_t cds_ring; /* Desc of cds ring */
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u8 reserved[128]; /* future expansion */
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} nx_hostrq_tx_ctx_t;
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typedef struct {
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u32 host_producer_crb; /* Crb to use */
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u32 interrupt_crb; /* Crb to use */
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__le32 host_producer_crb; /* Crb to use */
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__le32 interrupt_crb; /* Crb to use */
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} nx_cardrsp_cds_ring_t;
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typedef struct {
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u32 host_ctx_state; /* Starting state */
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u16 context_id; /* Handle for context */
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__le32 host_ctx_state; /* Starting state */
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__le16 context_id; /* Handle for context */
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u8 phys_port; /* Physical id of port */
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u8 virt_port; /* Virtual/Logical id of port */
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nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */
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@ -1202,9 +1202,9 @@ enum {
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#define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
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typedef struct {
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u64 qhdr;
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u64 req_hdr;
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u64 words[6];
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__le64 qhdr;
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__le64 req_hdr;
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__le64 words[6];
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} nx_nic_req_t;
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typedef struct {
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@ -76,7 +76,7 @@ netxen_api_unlock(struct netxen_adapter *adapter)
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static u32
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netxen_poll_rsp(struct netxen_adapter *adapter)
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{
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u32 raw_rsp, rsp = NX_CDRP_RSP_OK;
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u32 rsp = NX_CDRP_RSP_OK;
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int timeout = 0;
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do {
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@ -86,10 +86,7 @@ netxen_poll_rsp(struct netxen_adapter *adapter)
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if (++timeout > NX_OS_CRB_RETRY_COUNT)
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return NX_CDRP_RSP_TIMEOUT;
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netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET,
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&raw_rsp);
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rsp = le32_to_cpu(raw_rsp);
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netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
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} while (!NX_CDRP_IS_RSP(rsp));
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return rsp;
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@ -109,20 +106,16 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
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if (netxen_api_lock(adapter))
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return NX_RCODE_TIMEOUT;
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netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET,
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cpu_to_le32(signature));
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netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
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netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET,
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cpu_to_le32(arg1));
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netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
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netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET,
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cpu_to_le32(arg2));
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netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
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netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET,
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cpu_to_le32(arg3));
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netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
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netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
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cpu_to_le32(NX_CDRP_FORM_CMD(cmd)));
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NX_CDRP_FORM_CMD(cmd));
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rsp = netxen_poll_rsp(adapter);
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@ -133,7 +126,6 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
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rcode = NX_RCODE_TIMEOUT;
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} else if (rsp == NX_CDRP_RSP_FAIL) {
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netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
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rcode = le32_to_cpu(rcode);
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printk(KERN_ERR "%s: failed card response code:0x%x\n",
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netxen_nic_driver_name, rcode);
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@ -183,7 +175,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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int i, nrds_rings, nsds_rings;
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size_t rq_size, rsp_size;
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u32 cap, reg;
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u32 cap, reg, val;
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int err;
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@ -225,11 +217,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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prq->num_rds_rings = cpu_to_le16(nrds_rings);
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prq->num_sds_rings = cpu_to_le16(nsds_rings);
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prq->rds_ring_offset = 0;
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prq->sds_ring_offset = prq->rds_ring_offset +
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(sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
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prq->rds_ring_offset = cpu_to_le32(0);
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prq_rds = (nx_hostrq_rds_ring_t *)(prq->data + prq->rds_ring_offset);
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val = le32_to_cpu(prq->rds_ring_offset) +
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(sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
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prq->sds_ring_offset = cpu_to_le32(val);
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prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
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le32_to_cpu(prq->rds_ring_offset));
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for (i = 0; i < nrds_rings; i++) {
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@ -241,17 +236,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
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}
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prq_sds = (nx_hostrq_sds_ring_t *)(prq->data + prq->sds_ring_offset);
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prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
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le32_to_cpu(prq->sds_ring_offset));
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prq_sds[0].host_phys_addr =
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cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr);
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prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count);
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/* only one msix vector for now */
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prq_sds[0].msi_index = cpu_to_le32(0);
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/* now byteswap offsets */
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prq->rds_ring_offset = cpu_to_le32(prq->rds_ring_offset);
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prq->sds_ring_offset = cpu_to_le32(prq->sds_ring_offset);
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prq_sds[0].msi_index = cpu_to_le16(0);
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phys_addr = hostrq_phys_addr;
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err = netxen_issue_cmd(adapter,
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@ -269,9 +261,9 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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prsp_rds = ((nx_cardrsp_rds_ring_t *)
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&prsp->data[prsp->rds_ring_offset]);
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&prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
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for (i = 0; i < le32_to_cpu(prsp->num_rds_rings); i++) {
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for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
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rds_ring = &recv_ctx->rds_rings[i];
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reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
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@ -279,7 +271,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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}
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prsp_sds = ((nx_cardrsp_sds_ring_t *)
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&prsp->data[prsp->sds_ring_offset]);
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&prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
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reg = le32_to_cpu(prsp_sds[0].host_consumer_crb);
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recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
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@ -288,7 +280,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
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recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
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recv_ctx->context_id = le16_to_cpu(prsp->context_id);
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recv_ctx->virt_port = le16_to_cpu(prsp->virt_port);
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recv_ctx->virt_port = prsp->virt_port;
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out_free_rsp:
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pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
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@ -539,16 +539,19 @@ static int nx_p3_sre_macaddr_change(struct net_device *dev,
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{
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struct netxen_adapter *adapter = netdev_priv(dev);
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nx_nic_req_t req;
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nx_mac_req_t mac_req;
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nx_mac_req_t *mac_req;
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u64 word;
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int rv;
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memset(&req, 0, sizeof(nx_nic_req_t));
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req.qhdr |= (NX_NIC_REQUEST << 23);
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req.req_hdr |= NX_MAC_EVENT;
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req.req_hdr |= ((u64)adapter->portnum << 16);
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mac_req.op = op;
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memcpy(&mac_req.mac_addr, addr, 6);
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req.words[0] = cpu_to_le64(*(u64 *)&mac_req);
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req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23);
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word = NX_MAC_EVENT | ((u64)adapter->portnum << 16);
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req.req_hdr = cpu_to_le64(word);
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mac_req = (nx_mac_req_t *)&req.words[0];
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mac_req->op = op;
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memcpy(mac_req->mac_addr, addr, 6);
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rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1);
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if (rv != 0) {
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@ -612,12 +615,16 @@ send_fw_cmd:
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int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
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{
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nx_nic_req_t req;
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u64 word;
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memset(&req, 0, sizeof(nx_nic_req_t));
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req.qhdr |= (NX_HOST_REQUEST << 23);
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req.req_hdr |= NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE;
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req.req_hdr |= ((u64)adapter->portnum << 16);
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req.qhdr = cpu_to_le64(NX_HOST_REQUEST << 23);
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word = NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE |
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((u64)adapter->portnum << 16);
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req.req_hdr = cpu_to_le64(word);
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req.words[0] = cpu_to_le64(mode);
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return netxen_send_cmd_descs(adapter,
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@ -632,13 +639,15 @@ int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
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int netxen_config_intr_coalesce(struct netxen_adapter *adapter)
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{
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nx_nic_req_t req;
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u64 word;
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int rv;
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memset(&req, 0, sizeof(nx_nic_req_t));
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req.qhdr |= (NX_NIC_REQUEST << 23);
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req.req_hdr |= NETXEN_CONFIG_INTR_COALESCE;
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req.req_hdr |= ((u64)adapter->portnum << 16);
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req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23);
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word = NETXEN_CONFIG_INTR_COALESCE | ((u64)adapter->portnum << 16);
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req.req_hdr = cpu_to_le64(word);
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memcpy(&req.words[0], &adapter->coal, sizeof(adapter->coal));
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@ -772,13 +781,10 @@ int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac)
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adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4);
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adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4);
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mac_hi = cpu_to_le32(mac_hi);
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mac_lo = cpu_to_le32(mac_lo);
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if (pci_func & 1)
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*mac = ((mac_lo >> 16) | ((u64)mac_hi << 16));
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*mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16));
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else
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*mac = ((mac_lo) | ((u64)mac_hi << 32));
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*mac = le64_to_cpu((u64)mac_lo | ((u64)mac_hi << 32));
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return 0;
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}
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@ -1277,7 +1277,7 @@ static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
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dev_kfree_skb_any(skb);
|
||||
for (i = 0; i < nr_frags; i++) {
|
||||
index = frag_desc->frag_handles[i];
|
||||
index = le16_to_cpu(frag_desc->frag_handles[i]);
|
||||
skb = netxen_process_rxbuf(adapter,
|
||||
rds_ring, index, cksum);
|
||||
if (skb)
|
||||
|
|
|
|||
Reference in New Issue