[POWERPC] Bamboo zImage wrapper
Add a bootwrapper for the AMCC 440EP Bamboo Eval board. This also adds a common fixup_clock function for all 440EP(x) chips. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Josh Boyer
parent
8c1449bdb4
commit
2ba4573cda
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@ -11,5 +11,6 @@
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#define _PPC_BOOT_44X_H_
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void ebony_init(void *mac0, void *mac1);
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void bamboo_init(void);
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#endif /* _PPC_BOOT_44X_H_ */
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@ -108,3 +108,85 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc)
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setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
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}
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#define SPRN_CCR1 0x378
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void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
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{
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u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
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u32 reg;
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u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
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mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x000F0000) >> 16;
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fwdva = tmp ? tmp : 16;
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tmp = (reg & 0x00000700) >> 8;
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fwdvb = tmp ? tmp : 8;
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tmp = (reg & 0x1F000000) >> 24;
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fbdv = tmp ? tmp : 32;
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lfbdv = (reg & 0x0000007F);
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mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x03000000) >> 24;
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opbdv0 = tmp ? tmp : 4;
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mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x07000000) >> 24;
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perdv0 = tmp ? tmp : 8;
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mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x07000000) >> 24;
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prbdv0 = tmp ? tmp : 8;
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mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x03000000) >> 24;
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spcid0 = tmp ? tmp : 4;
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/* Calculate M */
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mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
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reg = mfdcr(DCRN_CPR0_DATA);
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tmp = (reg & 0x03000000) >> 24;
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if (tmp == 0) { /* PLL output */
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tmp = (reg & 0x20000000) >> 29;
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if (!tmp) /* PLLOUTA */
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m = fbdv * lfbdv * fwdva;
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else
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m = fbdv * lfbdv * fwdvb;
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}
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else if (tmp == 1) /* CPU output */
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m = fbdv * fwdva;
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else
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m = perdv0 * opbdv0 * fwdvb;
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vco = (m * sysclk) + (m >> 1);
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cpu = vco / fwdva;
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plb = vco / fwdvb / prbdv0;
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opb = plb / opbdv0;
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ebc = plb / perdv0;
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/* FIXME */
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uart0 = ser_clk;
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/* Figure out timebase. Either CPU or default TmrClk */
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asm volatile (
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"mfspr %0,%1\n"
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:
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"=&r"(reg) : "i"(SPRN_CCR1));
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if (reg & 0x0080)
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tb = 25000000; /* TmrClk is 25MHz */
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else
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tb = cpu;
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dt_fixup_cpu_clocks(cpu, tb, 0);
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dt_fixup_clock("/plb", plb);
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dt_fixup_clock("/plb/opb", opb);
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dt_fixup_clock("/plb/opb/ebc", ebc);
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dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
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dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
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dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
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dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
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}
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@ -16,5 +16,6 @@ void ibm44x_dbcr_reset(void);
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void ibm40x_dbcr_reset(void);
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void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
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void ibm4xx_fixup_ebc_ranges(const char *ebc);
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void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk);
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#endif /* _POWERPC_BOOT_4XX_H_ */
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@ -44,10 +44,10 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
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src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
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ns16550.c serial.c simple_alloc.c div64.S util.S \
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gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
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4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c
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4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c
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src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
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cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
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ps3-head.S ps3-hvcall.S ps3.c
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ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c
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src-boot := $(src-wlib) $(src-plat) empty.c
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src-boot := $(addprefix $(obj)/, $(src-boot))
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@ -142,6 +142,7 @@ ifneq ($(CONFIG_DEVICE_TREE),"")
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image-$(CONFIG_PPC_83xx) += cuImage.83xx
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image-$(CONFIG_PPC_85xx) += cuImage.85xx
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image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
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image-$(CONFIG_BAMBOO) += treeImage.bamboo
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endif
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# For 32-bit powermacs, build the COFF and miboot images
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@ -0,0 +1,45 @@
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/*
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* Copyright IBM Corporation, 2007
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* Based on ebony wrapper:
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* Copyright 2007 David Gibson, IBM Corporation.
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*
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* Clocking code based on code by:
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* Stefan Roese <sr@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the License
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*/
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#include <stdarg.h>
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#include <stddef.h>
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#include "types.h"
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#include "elf.h"
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#include "string.h"
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#include "stdio.h"
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#include "page.h"
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#include "ops.h"
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#include "dcr.h"
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#include "4xx.h"
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#include "44x.h"
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extern char _dtb_start[];
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extern char _dtb_end[];
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static void bamboo_fixups(void)
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{
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unsigned long sysclk = 33333333;
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ibm440ep_fixup_clocks(sysclk, 11059200);
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ibm4xx_fixup_memsize();
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ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
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}
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void bamboo_init(void)
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{
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platform_ops.fixups = bamboo_fixups;
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platform_ops.exit = ibm44x_dbcr_reset;
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ft_init(_dtb_start, 0, 32);
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serial_console_init();
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}
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@ -124,4 +124,14 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
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#define DCRN_MAL0_CFG 0x180
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#define MAL_RESET 0x80000000
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/* 440EP Clock/Power-on Reset regs */
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#define DCRN_CPR0_ADDR 0xc
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#define DCRN_CPR0_DATA 0xd
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#define CPR0_PLLD0 0x60
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#define CPR0_OPBD0 0xc0
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#define CPR0_PERD0 0xe0
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#define CPR0_PRIMBD0 0xa0
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#define CPR0_SCPID 0x120
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#define CPR0_PLLC0 0x40
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#endif /* _PPC_BOOT_DCR_H_ */
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@ -0,0 +1,27 @@
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/*
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* Copyright IBM Corporation, 2007
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* Based on ebony wrapper:
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* Copyright 2007 David Gibson, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the License
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*/
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#include "ops.h"
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#include "stdio.h"
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#include "44x.h"
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extern char _end[];
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BSS_STACK(4096);
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void platform_init(void)
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{
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unsigned long end_of_ram = 0x8000000;
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unsigned long avail_ram = end_of_ram - (unsigned long)_end;
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simple_alloc_init(_end, avail_ram, 32, 64);
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bamboo_init();
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}
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