Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainline
This commit is contained in:
commit
2b4f017579
30 changed files with 232 additions and 172 deletions
|
@ -199,6 +199,10 @@ and is between 256 and 4096 characters. It is defined in the file
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acpi_display_output=video
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See above.
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acpi_early_pdc_eval [HW,ACPI] Evaluate processor _PDC methods
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early. Needed on some platforms to properly
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initialize the EC.
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acpi_irq_balance [HW,ACPI]
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ACPI will balance active IRQs
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default in APIC mode
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@ -616,10 +616,10 @@ M: Richard Purdie <rpurdie@rpsys.net>
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S: Maintained
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ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
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M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
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M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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T: git git://gitorious.org/linux-gemini/mainline.git
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S: Maintained
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S: Odd Fixes
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F: arch/arm/mach-gemini/
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ARM/EBSA110 MACHINE SUPPORT
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@ -641,9 +641,9 @@ T: topgit git://git.openezx.org/openezx.git
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F: arch/arm/mach-pxa/ezx.c
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ARM/FARADAY FA526 PORT
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M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
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M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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S: Odd Fixes
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F: arch/arm/mm/*-fa*
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ARM/FOOTBRIDGE ARCHITECTURE
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@ -86,7 +86,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
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unsigned int reg_both, reg_level, reg_type;
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reg_type = __raw_readl(base + GPIO_INT_TYPE);
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reg_level = __raw_readl(base + GPIO_INT_BOTH_EDGE);
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reg_level = __raw_readl(base + GPIO_INT_LEVEL);
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reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE);
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switch (type) {
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@ -117,7 +117,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
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}
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__raw_writel(reg_type, base + GPIO_INT_TYPE);
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__raw_writel(reg_level, base + GPIO_INT_BOTH_EDGE);
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__raw_writel(reg_level, base + GPIO_INT_LEVEL);
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__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
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gpio_ack_irq(irq);
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@ -94,6 +94,7 @@ ia64_acpi_release_global_lock (unsigned int *lock)
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#define acpi_noirq 0 /* ACPI always enabled on IA64 */
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#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
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#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */
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#define acpi_ht 0 /* no HT-only mode on IA64 */
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#endif
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#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
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static inline void disable_acpi(void) { }
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@ -338,7 +338,8 @@ static void __init mpc85xx_mds_pic_init(void)
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}
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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@ -46,6 +46,7 @@ smp_85xx_kick_cpu(int nr)
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__iomem u32 *bptr_vaddr;
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struct device_node *np;
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int n = 0;
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int ioremappable;
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WARN_ON (nr < 0 || nr >= NR_CPUS);
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@ -59,21 +60,37 @@ smp_85xx_kick_cpu(int nr)
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return;
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}
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/*
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* A secondary core could be in a spinloop in the bootpage
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* (0xfffff000), somewhere in highmem, or somewhere in lowmem.
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* The bootpage and highmem can be accessed via ioremap(), but
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* we need to directly access the spinloop if its in lowmem.
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*/
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ioremappable = *cpu_rel_addr > virt_to_phys(high_memory);
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/* Map the spin table */
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bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
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if (ioremappable)
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bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
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else
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bptr_vaddr = phys_to_virt(*cpu_rel_addr);
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local_irq_save(flags);
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out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
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out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
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if (!ioremappable)
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flush_dcache_range((ulong)bptr_vaddr,
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(ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
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/* Wait a bit for the CPU to ack. */
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while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
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mdelay(1);
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local_irq_restore(flags);
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iounmap(bptr_vaddr);
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if (ioremappable)
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iounmap(bptr_vaddr);
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pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
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}
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@ -1342,14 +1342,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
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},
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},
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{
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.callback = force_acpi_ht,
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.ident = "ASUS P2B-DS",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
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DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
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},
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},
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{
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.callback = force_acpi_ht,
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.ident = "ASUS CUR-DLS",
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@ -935,6 +935,7 @@ static int dock_add(acpi_handle handle)
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struct platform_device *dd;
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id = dock_station_count;
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memset(&ds, 0, sizeof(ds));
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dd = platform_device_register_data(NULL, "dock", id, &ds, sizeof(ds));
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if (IS_ERR(dd))
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return PTR_ERR(dd);
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@ -110,6 +110,14 @@ static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
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DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
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DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
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(void *)2},
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{ set_max_cstate, "Pavilion zv5000", {
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
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(void *)1},
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{ set_max_cstate, "Asus L8400B", {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
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(void *)1},
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{},
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};
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@ -125,6 +125,8 @@ acpi_processor_eval_pdc(acpi_handle handle, struct acpi_object_list *pdc_in)
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return status;
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}
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static int early_pdc_done;
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void acpi_processor_set_pdc(acpi_handle handle)
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{
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struct acpi_object_list *obj_list;
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@ -132,6 +134,9 @@ void acpi_processor_set_pdc(acpi_handle handle)
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if (arch_has_acpi_pdc() == false)
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return;
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if (early_pdc_done)
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return;
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obj_list = acpi_processor_alloc_pdc();
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if (!obj_list)
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return;
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@ -151,6 +156,13 @@ static int set_early_pdc_optin(const struct dmi_system_id *id)
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return 0;
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}
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static int param_early_pdc_optin(char *s)
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{
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early_pdc_optin = 1;
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return 1;
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}
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__setup("acpi_early_pdc_eval", param_early_pdc_optin);
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static struct dmi_system_id __cpuinitdata early_pdc_optin_table[] = {
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{
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set_early_pdc_optin, "HP Envy", {
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@ -192,4 +204,6 @@ void __init acpi_early_processor_set_pdc(void)
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acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
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ACPI_UINT32_MAX,
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early_init_pdc, NULL, NULL, NULL);
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early_pdc_done = 1;
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}
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@ -1336,9 +1336,25 @@ static int acpi_bus_scan(acpi_handle handle, struct acpi_bus_ops *ops,
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if (child)
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*child = device;
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return 0;
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if (device)
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return 0;
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else
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return -ENODEV;
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}
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/*
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* acpi_bus_add and acpi_bus_start
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*
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* scan a given ACPI tree and (probably recently hot-plugged)
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* create and add or starts found devices.
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*
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* If no devices were found -ENODEV is returned which does not
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* mean that this is a real error, there just have been no suitable
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* ACPI objects in the table trunk from which the kernel could create
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* a device and add/start an appropriate driver.
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*/
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int
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acpi_bus_add(struct acpi_device **child,
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struct acpi_device *parent, acpi_handle handle, int type)
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@ -1348,8 +1364,7 @@ acpi_bus_add(struct acpi_device **child,
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memset(&ops, 0, sizeof(ops));
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ops.acpi_op_add = 1;
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acpi_bus_scan(handle, &ops, child);
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return 0;
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return acpi_bus_scan(handle, &ops, child);
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}
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EXPORT_SYMBOL(acpi_bus_add);
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@ -1357,11 +1372,13 @@ int acpi_bus_start(struct acpi_device *device)
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{
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struct acpi_bus_ops ops;
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if (!device)
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return -EINVAL;
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memset(&ops, 0, sizeof(ops));
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ops.acpi_op_start = 1;
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acpi_bus_scan(device->handle, &ops, NULL);
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return 0;
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return acpi_bus_scan(device->handle, &ops, NULL);
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}
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EXPORT_SYMBOL(acpi_bus_start);
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@ -213,7 +213,7 @@ acpi_table_parse_entries(char *id,
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unsigned long table_end;
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acpi_size tbl_size;
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if (acpi_disabled)
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if (acpi_disabled && !acpi_ht)
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return -ENODEV;
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if (!handler)
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@ -280,7 +280,7 @@ int __init acpi_table_parse(char *id, acpi_table_handler handler)
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struct acpi_table_header *table = NULL;
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acpi_size tbl_size;
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|
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if (acpi_disabled)
|
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if (acpi_disabled && !acpi_ht)
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return -ENODEV;
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if (!handler)
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|
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@ -598,6 +598,50 @@ struct drm_display_mode *drm_mode_std(struct drm_device *dev,
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return mode;
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}
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/*
|
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* EDID is delightfully ambiguous about how interlaced modes are to be
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* encoded. Our internal representation is of frame height, but some
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* HDTV detailed timings are encoded as field height.
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*
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* The format list here is from CEA, in frame size. Technically we
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* should be checking refresh rate too. Whatever.
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*/
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static void
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drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
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struct detailed_pixel_timing *pt)
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{
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int i;
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static const struct {
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int w, h;
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} cea_interlaced[] = {
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{ 1920, 1080 },
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{ 720, 480 },
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{ 1440, 480 },
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{ 2880, 480 },
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{ 720, 576 },
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{ 1440, 576 },
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{ 2880, 576 },
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};
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static const int n_sizes =
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sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
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if (!(pt->misc & DRM_EDID_PT_INTERLACED))
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return;
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for (i = 0; i < n_sizes; i++) {
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if ((mode->hdisplay == cea_interlaced[i].w) &&
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(mode->vdisplay == cea_interlaced[i].h / 2)) {
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mode->vdisplay *= 2;
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mode->vsync_start *= 2;
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mode->vsync_end *= 2;
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mode->vtotal *= 2;
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mode->vtotal |= 1;
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}
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}
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mode->flags |= DRM_MODE_FLAG_INTERLACE;
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}
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/**
|
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* drm_mode_detailed - create a new mode from an EDID detailed timing section
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* @dev: DRM device (needed to create new mode)
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|
@ -680,8 +724,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
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drm_mode_set_name(mode);
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if (pt->misc & DRM_EDID_PT_INTERLACED)
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mode->flags |= DRM_MODE_FLAG_INTERLACE;
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drm_mode_do_interlace_quirk(mode, pt);
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if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
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pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
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|
|
|
@ -636,6 +636,13 @@ static const struct dmi_system_id bad_lid_status[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
|
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},
|
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},
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{
|
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.ident = "Clevo M5x0N",
|
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.matches = {
|
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DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."),
|
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DMI_MATCH(DMI_BOARD_NAME, "M5x0N"),
|
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},
|
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},
|
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{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -5861,13 +5861,12 @@ nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table,
|
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struct drm_nouveau_private *dev_priv = dev->dev_private;
|
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struct nvbios *bios = &dev_priv->VBIOS;
|
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struct init_exec iexec = { true, false };
|
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unsigned long flags;
|
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|
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spin_lock_irqsave(&bios->lock, flags);
|
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mutex_lock(&bios->lock);
|
||||
bios->display.output = dcbent;
|
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parse_init_table(bios, table, &iexec);
|
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bios->display.output = NULL;
|
||||
spin_unlock_irqrestore(&bios->lock, flags);
|
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mutex_unlock(&bios->lock);
|
||||
}
|
||||
|
||||
static bool NVInitVBIOS(struct drm_device *dev)
|
||||
|
@ -5876,7 +5875,7 @@ static bool NVInitVBIOS(struct drm_device *dev)
|
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struct nvbios *bios = &dev_priv->VBIOS;
|
||||
|
||||
memset(bios, 0, sizeof(struct nvbios));
|
||||
spin_lock_init(&bios->lock);
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mutex_init(&bios->lock);
|
||||
bios->dev = dev;
|
||||
|
||||
if (!NVShadowVBIOS(dev, bios->data))
|
||||
|
|
|
@ -205,7 +205,7 @@ struct nvbios {
|
|||
struct drm_device *dev;
|
||||
struct nouveau_bios_info pub;
|
||||
|
||||
spinlock_t lock;
|
||||
struct mutex lock;
|
||||
|
||||
uint8_t data[NV_PROM_SIZE];
|
||||
unsigned int length;
|
||||
|
|
|
@ -579,6 +579,8 @@ static void nv17_tv_restore(struct drm_encoder *encoder)
|
|||
nouveau_encoder(encoder)->restore.output);
|
||||
|
||||
nv17_tv_state_load(dev, &to_tv_enc(encoder)->saved_state);
|
||||
|
||||
nouveau_encoder(encoder)->last_dpms = NV_DPMS_CLEARED;
|
||||
}
|
||||
|
||||
static int nv17_tv_create_resources(struct drm_encoder *encoder,
|
||||
|
|
|
@ -643,7 +643,7 @@ static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
|
|||
uint8_t count = U8((*ptr)++);
|
||||
SDEBUG(" count: %d\n", count);
|
||||
if (arg == ATOM_UNIT_MICROSEC)
|
||||
schedule_timeout_uninterruptible(usecs_to_jiffies(count));
|
||||
udelay(count);
|
||||
else
|
||||
schedule_timeout_uninterruptible(msecs_to_jiffies(count));
|
||||
}
|
||||
|
|
|
@ -543,9 +543,6 @@ int r600_vb_ib_get(struct radeon_device *rdev)
|
|||
void r600_vb_ib_put(struct radeon_device *rdev)
|
||||
{
|
||||
radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence);
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
list_add_tail(&rdev->r600_blit.vb_ib->list, &rdev->ib_pool.scheduled_ibs);
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
|
||||
}
|
||||
|
||||
|
|
|
@ -96,6 +96,7 @@ extern int radeon_audio;
|
|||
* symbol;
|
||||
*/
|
||||
#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
|
||||
/* RADEON_IB_POOL_SIZE must be a power of 2 */
|
||||
#define RADEON_IB_POOL_SIZE 16
|
||||
#define RADEON_DEBUGFS_MAX_NUM_FILES 32
|
||||
#define RADEONFB_CONN_LIMIT 4
|
||||
|
@ -363,11 +364,12 @@ void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev);
|
|||
*/
|
||||
struct radeon_ib {
|
||||
struct list_head list;
|
||||
unsigned long idx;
|
||||
unsigned idx;
|
||||
uint64_t gpu_addr;
|
||||
struct radeon_fence *fence;
|
||||
uint32_t *ptr;
|
||||
uint32_t *ptr;
|
||||
uint32_t length_dw;
|
||||
bool free;
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -377,10 +379,9 @@ struct radeon_ib {
|
|||
struct radeon_ib_pool {
|
||||
struct mutex mutex;
|
||||
struct radeon_bo *robj;
|
||||
struct list_head scheduled_ibs;
|
||||
struct radeon_ib ibs[RADEON_IB_POOL_SIZE];
|
||||
bool ready;
|
||||
DECLARE_BITMAP(alloc_bm, RADEON_IB_POOL_SIZE);
|
||||
unsigned head_id;
|
||||
};
|
||||
|
||||
struct radeon_cp {
|
||||
|
|
|
@ -86,7 +86,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
|
|||
&p->validated);
|
||||
}
|
||||
}
|
||||
return radeon_bo_list_validate(&p->validated, p->ib->fence);
|
||||
return radeon_bo_list_validate(&p->validated);
|
||||
}
|
||||
|
||||
int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
|
||||
|
@ -189,12 +189,10 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
|
|||
{
|
||||
unsigned i;
|
||||
|
||||
if (error && parser->ib) {
|
||||
radeon_bo_list_unvalidate(&parser->validated,
|
||||
parser->ib->fence);
|
||||
} else {
|
||||
radeon_bo_list_unreserve(&parser->validated);
|
||||
if (!error && parser->ib) {
|
||||
radeon_bo_list_fence(&parser->validated, parser->ib->fence);
|
||||
}
|
||||
radeon_bo_list_unreserve(&parser->validated);
|
||||
for (i = 0; i < parser->nrelocs; i++) {
|
||||
if (parser->relocs[i].gobj) {
|
||||
mutex_lock(&parser->rdev->ddev->struct_mutex);
|
||||
|
|
|
@ -306,11 +306,10 @@ void radeon_bo_list_unreserve(struct list_head *head)
|
|||
}
|
||||
}
|
||||
|
||||
int radeon_bo_list_validate(struct list_head *head, void *fence)
|
||||
int radeon_bo_list_validate(struct list_head *head)
|
||||
{
|
||||
struct radeon_bo_list *lobj;
|
||||
struct radeon_bo *bo;
|
||||
struct radeon_fence *old_fence = NULL;
|
||||
int r;
|
||||
|
||||
r = radeon_bo_list_reserve(head);
|
||||
|
@ -334,32 +333,27 @@ int radeon_bo_list_validate(struct list_head *head, void *fence)
|
|||
}
|
||||
lobj->gpu_offset = radeon_bo_gpu_offset(bo);
|
||||
lobj->tiling_flags = bo->tiling_flags;
|
||||
if (fence) {
|
||||
old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
|
||||
bo->tbo.sync_obj = radeon_fence_ref(fence);
|
||||
bo->tbo.sync_obj_arg = NULL;
|
||||
}
|
||||
if (old_fence) {
|
||||
radeon_fence_unref(&old_fence);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
|
||||
void radeon_bo_list_fence(struct list_head *head, void *fence)
|
||||
{
|
||||
struct radeon_bo_list *lobj;
|
||||
struct radeon_fence *old_fence;
|
||||
struct radeon_bo *bo;
|
||||
struct radeon_fence *old_fence = NULL;
|
||||
|
||||
if (fence)
|
||||
list_for_each_entry(lobj, head, list) {
|
||||
old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
|
||||
if (old_fence == fence) {
|
||||
lobj->bo->tbo.sync_obj = NULL;
|
||||
radeon_fence_unref(&old_fence);
|
||||
}
|
||||
list_for_each_entry(lobj, head, list) {
|
||||
bo = lobj->bo;
|
||||
spin_lock(&bo->tbo.lock);
|
||||
old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
|
||||
bo->tbo.sync_obj = radeon_fence_ref(fence);
|
||||
bo->tbo.sync_obj_arg = NULL;
|
||||
spin_unlock(&bo->tbo.lock);
|
||||
if (old_fence) {
|
||||
radeon_fence_unref(&old_fence);
|
||||
}
|
||||
radeon_bo_list_unreserve(head);
|
||||
}
|
||||
}
|
||||
|
||||
int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
|
||||
|
|
|
@ -156,8 +156,8 @@ extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
|
|||
struct list_head *head);
|
||||
extern int radeon_bo_list_reserve(struct list_head *head);
|
||||
extern void radeon_bo_list_unreserve(struct list_head *head);
|
||||
extern int radeon_bo_list_validate(struct list_head *head, void *fence);
|
||||
extern void radeon_bo_list_unvalidate(struct list_head *head, void *fence);
|
||||
extern int radeon_bo_list_validate(struct list_head *head);
|
||||
extern void radeon_bo_list_fence(struct list_head *head, void *fence);
|
||||
extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
|
||||
struct vm_area_struct *vma);
|
||||
extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
|
||||
|
|
|
@ -41,68 +41,55 @@ int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
|
|||
{
|
||||
struct radeon_fence *fence;
|
||||
struct radeon_ib *nib;
|
||||
unsigned long i;
|
||||
int r = 0;
|
||||
int r = 0, i, c;
|
||||
|
||||
*ib = NULL;
|
||||
r = radeon_fence_create(rdev, &fence);
|
||||
if (r) {
|
||||
DRM_ERROR("failed to create fence for new IB\n");
|
||||
dev_err(rdev->dev, "failed to create fence for new IB\n");
|
||||
return r;
|
||||
}
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
i = find_first_zero_bit(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
|
||||
if (i < RADEON_IB_POOL_SIZE) {
|
||||
set_bit(i, rdev->ib_pool.alloc_bm);
|
||||
rdev->ib_pool.ibs[i].length_dw = 0;
|
||||
*ib = &rdev->ib_pool.ibs[i];
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
goto out;
|
||||
for (i = rdev->ib_pool.head_id, c = 0, nib = NULL; c < RADEON_IB_POOL_SIZE; c++, i++) {
|
||||
i &= (RADEON_IB_POOL_SIZE - 1);
|
||||
if (rdev->ib_pool.ibs[i].free) {
|
||||
nib = &rdev->ib_pool.ibs[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (list_empty(&rdev->ib_pool.scheduled_ibs)) {
|
||||
/* we go do nothings here */
|
||||
if (nib == NULL) {
|
||||
/* This should never happen, it means we allocated all
|
||||
* IB and haven't scheduled one yet, return EBUSY to
|
||||
* userspace hoping that on ioctl recall we get better
|
||||
* luck
|
||||
*/
|
||||
dev_err(rdev->dev, "no free indirect buffer !\n");
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
DRM_ERROR("all IB allocated none scheduled.\n");
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
radeon_fence_unref(&fence);
|
||||
return -EBUSY;
|
||||
}
|
||||
/* get the first ib on the scheduled list */
|
||||
nib = list_entry(rdev->ib_pool.scheduled_ibs.next,
|
||||
struct radeon_ib, list);
|
||||
if (nib->fence == NULL) {
|
||||
/* we go do nothings here */
|
||||
rdev->ib_pool.head_id = (nib->idx + 1) & (RADEON_IB_POOL_SIZE - 1);
|
||||
nib->free = false;
|
||||
if (nib->fence) {
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx);
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
|
||||
r = radeon_fence_wait(nib->fence, false);
|
||||
if (r) {
|
||||
DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx,
|
||||
(unsigned long)nib->gpu_addr, nib->length_dw);
|
||||
DRM_ERROR("radeon: GPU lockup detected, fail to get a IB\n");
|
||||
goto out;
|
||||
r = radeon_fence_wait(nib->fence, false);
|
||||
if (r) {
|
||||
dev_err(rdev->dev, "error waiting fence of IB(%u:0x%016lX:%u)\n",
|
||||
nib->idx, (unsigned long)nib->gpu_addr, nib->length_dw);
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
nib->free = true;
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
radeon_fence_unref(&fence);
|
||||
return r;
|
||||
}
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
}
|
||||
radeon_fence_unref(&nib->fence);
|
||||
|
||||
nib->fence = fence;
|
||||
nib->length_dw = 0;
|
||||
|
||||
/* scheduled list is accessed here */
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
list_del(&nib->list);
|
||||
INIT_LIST_HEAD(&nib->list);
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
|
||||
*ib = nib;
|
||||
out:
|
||||
if (r) {
|
||||
radeon_fence_unref(&fence);
|
||||
} else {
|
||||
(*ib)->fence = fence;
|
||||
}
|
||||
return r;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
|
||||
|
@ -114,18 +101,7 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
|
|||
return;
|
||||
}
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
if (!list_empty(&tmp->list) && !radeon_fence_signaled(tmp->fence)) {
|
||||
/* IB is scheduled & not signaled don't do anythings */
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
return;
|
||||
}
|
||||
list_del(&tmp->list);
|
||||
INIT_LIST_HEAD(&tmp->list);
|
||||
if (tmp->fence)
|
||||
radeon_fence_unref(&tmp->fence);
|
||||
|
||||
tmp->length_dw = 0;
|
||||
clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
|
||||
tmp->free = true;
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
}
|
||||
|
||||
|
@ -135,7 +111,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
|
|||
|
||||
if (!ib->length_dw || !rdev->cp.ready) {
|
||||
/* TODO: Nothings in the ib we should report. */
|
||||
DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
|
||||
DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -148,7 +124,8 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
|
|||
radeon_ring_ib_execute(rdev, ib);
|
||||
radeon_fence_emit(rdev, ib->fence);
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs);
|
||||
/* once scheduled IB is considered free and protected by the fence */
|
||||
ib->free = true;
|
||||
mutex_unlock(&rdev->ib_pool.mutex);
|
||||
radeon_ring_unlock_commit(rdev);
|
||||
return 0;
|
||||
|
@ -164,7 +141,6 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
|
|||
if (rdev->ib_pool.robj)
|
||||
return 0;
|
||||
/* Allocate 1M object buffer */
|
||||
INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
|
||||
r = radeon_bo_create(rdev, NULL, RADEON_IB_POOL_SIZE*64*1024,
|
||||
true, RADEON_GEM_DOMAIN_GTT,
|
||||
&rdev->ib_pool.robj);
|
||||
|
@ -195,9 +171,9 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
|
|||
rdev->ib_pool.ibs[i].ptr = ptr + offset;
|
||||
rdev->ib_pool.ibs[i].idx = i;
|
||||
rdev->ib_pool.ibs[i].length_dw = 0;
|
||||
INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].list);
|
||||
rdev->ib_pool.ibs[i].free = true;
|
||||
}
|
||||
bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
|
||||
rdev->ib_pool.head_id = 0;
|
||||
rdev->ib_pool.ready = true;
|
||||
DRM_INFO("radeon: ib pool ready.\n");
|
||||
if (radeon_debugfs_ib_init(rdev)) {
|
||||
|
@ -214,7 +190,6 @@ void radeon_ib_pool_fini(struct radeon_device *rdev)
|
|||
return;
|
||||
}
|
||||
mutex_lock(&rdev->ib_pool.mutex);
|
||||
bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
|
||||
if (rdev->ib_pool.robj) {
|
||||
r = radeon_bo_reserve(rdev->ib_pool.robj, false);
|
||||
if (likely(r == 0)) {
|
||||
|
@ -363,7 +338,7 @@ static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
|
|||
if (ib == NULL) {
|
||||
return 0;
|
||||
}
|
||||
seq_printf(m, "IB %04lu\n", ib->idx);
|
||||
seq_printf(m, "IB %04u\n", ib->idx);
|
||||
seq_printf(m, "IB fence %p\n", ib->fence);
|
||||
seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
|
||||
for (i = 0; i < ib->length_dw; i++) {
|
||||
|
|
|
@ -348,22 +348,19 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
|
|||
*/
|
||||
|
||||
DRM_INFO("It appears like vesafb is loaded. "
|
||||
"Ignore above error if any. Entering stealth mode.\n");
|
||||
"Ignore above error if any.\n");
|
||||
ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
|
||||
if (unlikely(ret != 0)) {
|
||||
DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
|
||||
goto out_no_device;
|
||||
}
|
||||
vmw_kms_init(dev_priv);
|
||||
vmw_overlay_init(dev_priv);
|
||||
} else {
|
||||
ret = vmw_request_device(dev_priv);
|
||||
if (unlikely(ret != 0))
|
||||
goto out_no_device;
|
||||
vmw_kms_init(dev_priv);
|
||||
vmw_overlay_init(dev_priv);
|
||||
vmw_fb_init(dev_priv);
|
||||
}
|
||||
ret = vmw_request_device(dev_priv);
|
||||
if (unlikely(ret != 0))
|
||||
goto out_no_device;
|
||||
vmw_kms_init(dev_priv);
|
||||
vmw_overlay_init(dev_priv);
|
||||
vmw_fb_init(dev_priv);
|
||||
|
||||
dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
|
||||
register_pm_notifier(&dev_priv->pm_nb);
|
||||
|
@ -406,17 +403,15 @@ static int vmw_driver_unload(struct drm_device *dev)
|
|||
|
||||
unregister_pm_notifier(&dev_priv->pm_nb);
|
||||
|
||||
if (!dev_priv->stealth) {
|
||||
vmw_fb_close(dev_priv);
|
||||
vmw_kms_close(dev_priv);
|
||||
vmw_overlay_close(dev_priv);
|
||||
vmw_release_device(dev_priv);
|
||||
pci_release_regions(dev->pdev);
|
||||
} else {
|
||||
vmw_kms_close(dev_priv);
|
||||
vmw_overlay_close(dev_priv);
|
||||
vmw_fb_close(dev_priv);
|
||||
vmw_kms_close(dev_priv);
|
||||
vmw_overlay_close(dev_priv);
|
||||
vmw_release_device(dev_priv);
|
||||
if (dev_priv->stealth)
|
||||
pci_release_region(dev->pdev, 2);
|
||||
}
|
||||
else
|
||||
pci_release_regions(dev->pdev);
|
||||
|
||||
if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
|
||||
drm_irq_uninstall(dev_priv->dev);
|
||||
if (dev->devname == vmw_devname)
|
||||
|
@ -585,11 +580,6 @@ static int vmw_master_set(struct drm_device *dev,
|
|||
int ret = 0;
|
||||
|
||||
DRM_INFO("Master set.\n");
|
||||
if (dev_priv->stealth) {
|
||||
ret = vmw_request_device(dev_priv);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (active) {
|
||||
BUG_ON(active != &dev_priv->fbdev_master);
|
||||
|
@ -649,18 +639,11 @@ static void vmw_master_drop(struct drm_device *dev,
|
|||
|
||||
ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
|
||||
|
||||
if (dev_priv->stealth) {
|
||||
ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
|
||||
if (unlikely(ret != 0))
|
||||
DRM_ERROR("Unable to clean VRAM on master drop.\n");
|
||||
vmw_release_device(dev_priv);
|
||||
}
|
||||
dev_priv->active_master = &dev_priv->fbdev_master;
|
||||
ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
|
||||
ttm_vt_unlock(&dev_priv->fbdev_master.lock);
|
||||
|
||||
if (!dev_priv->stealth)
|
||||
vmw_fb_on(dev_priv);
|
||||
vmw_fb_on(dev_priv);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -559,6 +559,9 @@ int vmw_fb_init(struct vmw_private *vmw_priv)
|
|||
info->pixmap.scan_align = 1;
|
||||
#endif
|
||||
|
||||
info->aperture_base = vmw_priv->vram_start;
|
||||
info->aperture_size = vmw_priv->vram_size;
|
||||
|
||||
/*
|
||||
* Dirty & Deferred IO
|
||||
*/
|
||||
|
|
|
@ -1161,9 +1161,17 @@ static int i8042_pm_restore(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int i8042_pm_thaw(struct device *dev)
|
||||
{
|
||||
i8042_interrupt(0, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops i8042_pm_ops = {
|
||||
.suspend = i8042_pm_reset,
|
||||
.resume = i8042_pm_restore,
|
||||
.thaw = i8042_pm_thaw,
|
||||
.poweroff = i8042_pm_reset,
|
||||
.restore = i8042_pm_restore,
|
||||
};
|
||||
|
|
|
@ -720,12 +720,6 @@ static int acpiphp_bus_add(struct acpiphp_func *func)
|
|||
-ret_val);
|
||||
goto acpiphp_bus_add_out;
|
||||
}
|
||||
/*
|
||||
* try to start anyway. We could have failed to add
|
||||
* simply because this bus had previously been added
|
||||
* on another add. Don't bother with the return value
|
||||
* we just keep going.
|
||||
*/
|
||||
ret_val = acpi_bus_start(device);
|
||||
|
||||
acpiphp_bus_add_out:
|
||||
|
|
|
@ -5771,7 +5771,7 @@ static void thermal_exit(void)
|
|||
case TPACPI_THERMAL_ACPI_TMP07:
|
||||
case TPACPI_THERMAL_ACPI_UPDT:
|
||||
sysfs_remove_group(&tpacpi_sensors_pdev->dev.kobj,
|
||||
&thermal_temp_input16_group);
|
||||
&thermal_temp_input8_group);
|
||||
break;
|
||||
case TPACPI_THERMAL_NONE:
|
||||
default:
|
||||
|
|
|
@ -376,6 +376,7 @@ struct input_absinfo {
|
|||
#define KEY_DISPLAY_OFF 245 /* display device to off state */
|
||||
|
||||
#define KEY_WIMAX 246
|
||||
#define KEY_RFKILL 247 /* Key that controls all radios */
|
||||
|
||||
/* Range 248 - 255 is reserved for special needs of AT keyboard driver */
|
||||
|
||||
|
|
Reference in a new issue