[POWERPC] Xilinx: Register AC97 Controller Reference with the platform bus
Add AC97 platform bus registration for Xilinx Virtex platforms. Signed-off-by: Joachim Foerster <JOFT@gmx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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@ -87,6 +87,29 @@
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}, \
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}, \
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}
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}
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#define XPAR_AC97_CONTROLLER_REFERENCE(num) { \
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.name = "ml403_ac97cr", \
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.id = num, \
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.num_resources = 3, \
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.resource = (struct resource[]) { \
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{ \
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.start = XPAR_OPB_AC97_CONTROLLER_REF_##num##_BASEADDR, \
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.end = XPAR_OPB_AC97_CONTROLLER_REF_##num##_HIGHADDR, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \
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.end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \
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.flags = IORESOURCE_IRQ, \
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}, \
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{ \
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.start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \
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.end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \
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.flags = IORESOURCE_IRQ, \
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}, \
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}, \
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}
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/* UART 8250 driver platform data table */
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/* UART 8250 driver platform data table */
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struct plat_serial8250_port virtex_serial_platform_data[] = {
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struct plat_serial8250_port virtex_serial_platform_data[] = {
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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@ -173,6 +196,14 @@ struct platform_device virtex_platform_devices[] = {
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#if defined(XPAR_TFT_3_BASEADDR)
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#if defined(XPAR_TFT_3_BASEADDR)
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XPAR_TFT(3),
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XPAR_TFT(3),
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#endif
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#endif
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/* AC97 Controller Reference instances */
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#if defined(XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR)
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XPAR_AC97_CONTROLLER_REFERENCE(0),
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#endif
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#if defined(XPAR_OPB_AC97_CONTROLLER_REF_1_BASEADDR)
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XPAR_AC97_CONTROLLER_REFERENCE(1),
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#endif
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};
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};
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/* Early serial support functions */
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/* Early serial support functions */
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