tg3: Fix single MSI-X vector coalescing
The interrupt coalescing setup code used the TG3_FLG2_USING_MSIX flag to determine whether or not to configure the rx coalescing parameters. This is incorrect for the single MSI-X vector case. This patch changes the code to look at the TG3_FLG3_ENABLE_RSS instead. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -7447,7 +7447,7 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
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tw32(HOSTCC_TXCOAL_MAXF_INT, 0);
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}
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if (!(tp->tg3_flags2 & TG3_FLG2_USING_MSIX)) {
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if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_RSS)) {
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tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs);
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tw32(HOSTCC_RXMAX_FRAMES, ec->rx_max_coalesced_frames);
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tw32(HOSTCC_RXCOAL_MAXF_INT, ec->rx_max_coalesced_frames_irq);
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