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sata_mv: mbus decode window support

Make it possible to pass mbus_dram_target_info to the sata_mv
driver via the platform data, make the sata_mv driver program
the window registers based on this data if it is passed in, and
make the Orion platform setup code use this method instead of
programming the SATA mbus window registers by hand.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Lennert Buytenhek 2008-03-27 14:51:39 -04:00 committed by Nicolas Pitre
parent 92aecfa955
commit 15a32632d9
5 changed files with 36 additions and 42 deletions

View File

@ -103,13 +103,6 @@
#define ETH_MAX_WIN 6
#define ETH_MAX_REMAP_WIN 4
/*
* SATA Address Decode Windows registers
*/
#define SATA_WIN_CTRL(win) ORION_SATA_REG(0x30 + ((win) * 0x10))
#define SATA_WIN_BASE(win) ORION_SATA_REG(0x34 + ((win) * 0x10))
#define SATA_MAX_WIN 4
struct mbus_dram_target_info orion_mbus_dram_info;
@ -288,35 +281,3 @@ void __init orion_setup_eth_wins(void)
}
}
}
void __init orion_setup_sata_wins(void)
{
int i;
/*
* First, disable and clear windows
*/
for (i = 0; i < SATA_MAX_WIN; i++) {
orion_write(SATA_WIN_BASE(i), 0);
orion_write(SATA_WIN_CTRL(i), 0);
}
/*
* Setup windows for DDR banks.
*/
for (i = 0; i < DDR_MAX_CS; i++) {
u32 base, size;
size = orion_read(DDR_SIZE_CS(i));
base = orion_read(DDR_BASE_CS(i));
if (size & DDR_BANK_EN) {
base = DDR_REG_TO_BASE(base);
size = DDR_REG_TO_SIZE(size);
orion_write(SATA_WIN_CTRL(i),
((size-1) & 0xffff0000) |
(ATTR_DDR_CS(i) << 8) |
(TARGET_DDR << 4) | WIN_EN);
orion_write(SATA_WIN_BASE(i),
base & 0xffff0000);
}
}
}

View File

@ -17,6 +17,7 @@
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
#include <linux/ata_platform.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/timex.h>
@ -289,6 +290,7 @@ static struct platform_device orion_sata = {
void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
{
sata_data->dram = &orion_mbus_dram_info;
orion_sata.dev.platform_data = sata_data;
platform_device_register(&orion_sata);
}
@ -342,8 +344,6 @@ void __init orion_init(void)
*/
orion_setup_cpu_wins();
orion_setup_eth_wins();
if (dev == MV88F5182_DEV_ID)
orion_setup_sata_wins();
/*
* REgister devices

View File

@ -33,7 +33,6 @@ extern struct mbus_dram_target_info orion_mbus_dram_info;
void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap);
void orion_setup_cpu_wins(void);
void orion_setup_eth_wins(void);
void orion_setup_sata_wins(void);
/*
* Shared code used internally by other Orion core functions.

View File

@ -74,6 +74,7 @@
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/mbus.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
@ -352,6 +353,9 @@ enum {
#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
#define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC))
#define WINDOW_CTRL(i) (0x20030 + ((i) << 4))
#define WINDOW_BASE(i) (0x20034 + ((i) << 4))
enum {
/* DMA boundary 0xffff is required by the s/g splitting
* we need on /length/ in mv_fill-sg().
@ -2897,6 +2901,27 @@ static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
return 0;
}
static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
struct mbus_dram_target_info *dram)
{
int i;
for (i = 0; i < 4; i++) {
writel(0, hpriv->base + WINDOW_CTRL(i));
writel(0, hpriv->base + WINDOW_BASE(i));
}
for (i = 0; i < dram->num_cs; i++) {
struct mbus_dram_window *cs = dram->cs + i;
writel(((cs->size - 1) & 0xffff0000) |
(cs->mbus_attr << 8) |
(dram->mbus_dram_target_id << 4) | 1,
hpriv->base + WINDOW_CTRL(i));
writel(cs->base, hpriv->base + WINDOW_BASE(i));
}
}
/**
* mv_platform_probe - handle a positive probe of an soc Marvell
* host
@ -2951,6 +2976,12 @@ static int mv_platform_probe(struct platform_device *pdev)
res->end - res->start + 1);
hpriv->base -= MV_SATAHC0_REG_BASE;
/*
* (Re-)program MBUS remapping windows if we are asked to.
*/
if (mv_platform_data->dram != NULL)
mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
rc = mv_create_dma_pools(hpriv, &pdev->dev);
if (rc)
return rc;

View File

@ -27,7 +27,10 @@ extern int __devexit __pata_platform_remove(struct device *dev);
/*
* Marvell SATA private data
*/
struct mbus_dram_target_info;
struct mv_sata_platform_data {
struct mbus_dram_target_info *dram;
int n_ports; /* number of sata ports */
};