b43: Remove unnecessary MMIO in interrupt hotpath
This removes unnecessary MMIO accesses in the interrupt hotpath. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
a2caba6b5f
commit
1379072877
2 changed files with 21 additions and 44 deletions
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@ -778,8 +778,8 @@ struct b43_wldev {
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/* Reason code of the last interrupt. */
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u32 irq_reason;
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u32 dma_reason[6];
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/* saved irq enable/disable state bitfield. */
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u32 irq_savedstate;
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/* The currently active generic-interrupt mask. */
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u32 irq_mask;
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/* Link Quality calculation context. */
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struct b43_noise_calculation noisecalc;
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/* if > 0 MAC is suspended. if == 0 MAC is enabled. */
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@ -673,32 +673,6 @@ static void b43_short_slot_timing_disable(struct b43_wldev *dev)
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b43_set_slot_time(dev, 20);
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}
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/* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
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* Returns the _previously_ enabled IRQ mask.
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*/
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static inline u32 b43_interrupt_enable(struct b43_wldev *dev, u32 mask)
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{
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u32 old_mask;
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old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask | mask);
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return old_mask;
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}
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/* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
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* Returns the _previously_ enabled IRQ mask.
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*/
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static inline u32 b43_interrupt_disable(struct b43_wldev *dev, u32 mask)
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{
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u32 old_mask;
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old_mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
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return old_mask;
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}
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/* Synchronize IRQ top- and bottom-half.
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* IRQs must be masked before calling this.
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* This must not be called with the irq_lock held.
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@ -1593,7 +1567,7 @@ static void handle_irq_beacon(struct b43_wldev *dev)
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/* This is the bottom half of the asynchronous beacon update. */
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/* Ignore interrupt in the future. */
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dev->irq_savedstate &= ~B43_IRQ_BEACON;
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dev->irq_mask &= ~B43_IRQ_BEACON;
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cmd = b43_read32(dev, B43_MMIO_MACCMD);
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beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
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@ -1602,7 +1576,7 @@ static void handle_irq_beacon(struct b43_wldev *dev)
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/* Schedule interrupt manually, if busy. */
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if (beacon0_valid && beacon1_valid) {
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b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
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dev->irq_savedstate |= B43_IRQ_BEACON;
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dev->irq_mask |= B43_IRQ_BEACON;
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return;
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}
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@ -1641,11 +1615,9 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
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if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
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spin_lock_irq(&wl->irq_lock);
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/* update beacon right away or defer to irq */
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dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
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handle_irq_beacon(dev);
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/* The handler might have updated the IRQ mask. */
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
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dev->irq_savedstate);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
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mmiowb();
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spin_unlock_irq(&wl->irq_lock);
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}
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@ -1879,7 +1851,7 @@ static void b43_interrupt_tasklet(struct b43_wldev *dev)
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if (reason & B43_IRQ_TX_OK)
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handle_irq_transmit_status(dev);
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b43_interrupt_enable(dev, dev->irq_savedstate);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
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mmiowb();
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spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
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}
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@ -1893,7 +1865,9 @@ static void b43_interrupt_ack(struct b43_wldev *dev, u32 reason)
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b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);
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b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);
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b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);
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/* Unused ring
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b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]);
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*/
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}
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/* Interrupt handler top-half */
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@ -1903,18 +1877,19 @@ static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
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struct b43_wldev *dev = dev_id;
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u32 reason;
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if (!dev)
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return IRQ_NONE;
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B43_WARN_ON(!dev);
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spin_lock(&dev->wl->irq_lock);
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if (b43_status(dev) < B43_STAT_STARTED)
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if (unlikely(b43_status(dev) < B43_STAT_STARTED)) {
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/* This can only happen on shared IRQ lines. */
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goto out;
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}
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reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
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if (reason == 0xffffffff) /* shared IRQ */
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goto out;
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ret = IRQ_HANDLED;
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reason &= b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
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reason &= dev->irq_mask;
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if (!reason)
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goto out;
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@ -1928,16 +1903,18 @@ static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
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& 0x0001DC00;
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dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON)
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& 0x0000DC00;
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/* Unused ring
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dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON)
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& 0x0000DC00;
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*/
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b43_interrupt_ack(dev, reason);
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/* disable all IRQs. They are enabled again in the bottom half. */
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dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
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/* save the reason code and call our bottom half. */
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dev->irq_reason = reason;
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tasklet_schedule(&dev->isr_tasklet);
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out:
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out:
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mmiowb();
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spin_unlock(&dev->wl->irq_lock);
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@ -3799,7 +3776,7 @@ static void b43_wireless_core_stop(struct b43_wldev *dev)
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* setting the status to INITIALIZED, as the interrupt handler
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* won't care about IRQs then. */
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spin_lock_irqsave(&wl->irq_lock, flags);
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dev->irq_savedstate = b43_interrupt_disable(dev, B43_IRQ_ALL);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
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b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* flush */
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spin_unlock_irqrestore(&wl->irq_lock, flags);
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b43_synchronize_irq(dev);
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@ -3840,7 +3817,7 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
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/* Start data flow (TX/RX). */
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b43_mac_enable(dev);
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b43_interrupt_enable(dev, dev->irq_savedstate);
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
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/* Start maintainance work */
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b43_periodic_tasks_setup(dev);
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@ -4003,9 +3980,9 @@ static void setup_struct_wldev_for_init(struct b43_wldev *dev)
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/* IRQ related flags */
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dev->irq_reason = 0;
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memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
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dev->irq_savedstate = B43_IRQ_MASKTEMPLATE;
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dev->irq_mask = B43_IRQ_MASKTEMPLATE;
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if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
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dev->irq_savedstate &= ~B43_IRQ_PHY_TXERR;
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dev->irq_mask &= ~B43_IRQ_PHY_TXERR;
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dev->mac_suspended = 1;
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