ath9k_hw: Setup paprd only for supported chains
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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7090ad1416
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11441fb8b7
2 changed files with 36 additions and 17 deletions
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@ -21,10 +21,12 @@ void ar9003_paprd_enable(struct ath_hw *ah, bool val)
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{
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
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AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B1,
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AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B2,
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AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
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if (ah->caps.tx_chainmask & BIT(1))
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B1,
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AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
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if (ah->caps.tx_chainmask & BIT(2))
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B2,
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AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
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}
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EXPORT_SYMBOL(ar9003_paprd_enable);
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@ -57,7 +59,8 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, am_mask);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, ht40_mask);
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for (i = 0; i < 3; i++) {
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for (i = 0; i < ah->caps.max_txchains; i++) {
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REG_RMW_FIELD(ah, ctrl0[i],
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AR_PHY_PAPRD_CTRL0_USE_SINGLE_TABLE_MASK, 1);
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REG_RMW_FIELD(ah, ctrl1[i],
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@ -102,8 +105,14 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, -6);
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if (AR_SREV_9485(ah))
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
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-3);
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else
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
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-6);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
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AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
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-15);
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@ -620,13 +629,15 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
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AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
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training_power);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B1,
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AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
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training_power);
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if (ah->caps.tx_chainmask & BIT(1))
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B1,
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AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
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training_power);
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2,
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AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
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training_power);
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if (ah->caps.tx_chainmask & BIT(2))
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REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2,
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AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
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training_power);
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}
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EXPORT_SYMBOL(ar9003_paprd_populate_single_table);
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@ -987,7 +987,9 @@
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#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT 0x0ffe0000
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#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT_S 17
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#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + 0x490)
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#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + \
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(AR_SREV_9485(ah) ? \
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0x580 : 0x490))
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#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE 0x00000001
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#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE_S 0
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#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING 0x0000007e
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@ -1003,11 +1005,15 @@
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#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP 0x0003f000
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#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP_S 12
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#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + 0x494)
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#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + \
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(AR_SREV_9485(ah) ? \
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0x584 : 0x494))
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#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN 0xFFFFFFFF
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#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN_S 0
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#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + 0x498)
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#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + \
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(AR_SREV_9485(ah) ? \
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0x588 : 0x498))
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#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE 0x0000003f
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#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE_S 0
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#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP 0x00000fc0
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@ -1023,7 +1029,9 @@
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#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE 0x20000000
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#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE_S 29
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#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + 0x49c)
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#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + \
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(AR_SREV_9485(ah) ? \
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0x58c : 0x49c))
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#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES 0x03ff0000
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#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES_S 16
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#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_SAFETY_DELTA 0x0000f000
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