GPIO: add new Xilinx driver for powerpc
This driver supports the Xilinx XPS GPIO IP core which has the typical GPIO features. Signed-off-by: Kiran Sutariya <kirans@xilinx.com> Signed-off-by: John Linn <john.linn@xilinx.com> Cc: David Brownell <david-b@pacbell.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Cc: "Grant Likely" <grant.likely@secretlab.ca> Cc: <avorontsov@ru.mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
John Linn
Linus Torvalds
parent
e33c3b5e17
commit
0bcb6069a6
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@ -65,6 +65,14 @@ config GPIO_SYSFS
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# put expanders in the right section, in alphabetical order
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comment "Memory mapped GPIO expanders:"
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config GPIO_XILINX
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bool "Xilinx GPIO support"
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depends on PPC_OF
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help
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Say yes here to support the Xilinx FPGA GPIO device
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comment "I2C GPIO expanders:"
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config GPIO_MAX732X
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@ -10,4 +10,5 @@ obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
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obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
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obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
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obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
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obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
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obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
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@ -0,0 +1,235 @@
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/*
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* Xilinx gpio driver
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*
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* Copyright 2008 Xilinx, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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/* Register Offset Definitions */
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#define XGPIO_DATA_OFFSET (0x0) /* Data register */
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#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
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struct xgpio_instance {
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struct of_mm_gpio_chip mmchip;
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u32 gpio_state; /* GPIO state shadow register */
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u32 gpio_dir; /* GPIO direction shadow register */
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spinlock_t gpio_lock; /* Lock used for synchronization */
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};
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/**
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* xgpio_get - Read the specified signal of the GPIO device.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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*
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* This function reads the specified signal of the GPIO device. It returns 0 if
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* the signal clear, 1 if signal is set or negative value on error.
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*/
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static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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return (in_be32(mm_gc->regs + XGPIO_DATA_OFFSET) >> gpio) & 1;
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}
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/**
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* xgpio_set - Write the specified signal of the GPIO device.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* This function writes the specified value in to the specified signal of the
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* GPIO device.
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*/
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static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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unsigned long flags;
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct xgpio_instance *chip =
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container_of(mm_gc, struct xgpio_instance, mmchip);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Write to GPIO signal and set its direction to output */
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if (val)
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chip->gpio_state |= 1 << gpio;
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else
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chip->gpio_state &= ~(1 << gpio);
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out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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}
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/**
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* xgpio_dir_in - Set the direction of the specified GPIO signal as input.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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*
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* This function sets the direction of specified GPIO signal as input.
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* It returns 0 if direction of GPIO signals is set as input otherwise it
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* returns negative error value.
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*/
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static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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unsigned long flags;
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct xgpio_instance *chip =
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container_of(mm_gc, struct xgpio_instance, mmchip);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Set the GPIO bit in shadow register and set direction as input */
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chip->gpio_dir |= (1 << gpio);
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out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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return 0;
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}
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/**
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* xgpio_dir_out - Set the direction of the specified GPIO signal as output.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* This function sets the direction of specified GPIO signal as output. If all
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* GPIO signals of GPIO chip is configured as input then it returns
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* error otherwise it returns 0.
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*/
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static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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unsigned long flags;
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct xgpio_instance *chip =
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container_of(mm_gc, struct xgpio_instance, mmchip);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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/* Write state of GPIO signal */
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if (val)
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chip->gpio_state |= 1 << gpio;
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else
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chip->gpio_state &= ~(1 << gpio);
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out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
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/* Clear the GPIO bit in shadow register and set direction as output */
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chip->gpio_dir &= (~(1 << gpio));
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out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
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spin_unlock_irqrestore(&chip->gpio_lock, flags);
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return 0;
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}
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/**
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* xgpio_save_regs - Set initial values of GPIO pins
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* @mm_gc: pointer to memory mapped GPIO chip structure
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*/
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static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
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{
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struct xgpio_instance *chip =
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container_of(mm_gc, struct xgpio_instance, mmchip);
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out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
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out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
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}
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/**
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* xgpio_of_probe - Probe method for the GPIO device.
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* @np: pointer to device tree node
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*
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* This function probes the GPIO device in the device tree. It initializes the
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* driver data structure. It returns 0, if the driver is bound to the GPIO
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* device, or a negative value if there is an error.
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*/
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static int __devinit xgpio_of_probe(struct device_node *np)
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{
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struct xgpio_instance *chip;
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struct of_gpio_chip *ofchip;
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int status = 0;
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const u32 *tree_info;
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chip = kzalloc(sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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ofchip = &chip->mmchip.of_gc;
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/* Update GPIO state shadow register with default value */
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tree_info = of_get_property(np, "xlnx,dout-default", NULL);
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if (tree_info)
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chip->gpio_state = *tree_info;
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/* Update GPIO direction shadow register with default value */
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chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */
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tree_info = of_get_property(np, "xlnx,tri-default", NULL);
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if (tree_info)
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chip->gpio_dir = *tree_info;
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/* Check device node and parent device node for device width */
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ofchip->gc.ngpio = 32; /* By default assume full GPIO controller */
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tree_info = of_get_property(np, "xlnx,gpio-width", NULL);
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if (!tree_info)
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tree_info = of_get_property(np->parent,
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"xlnx,gpio-width", NULL);
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if (tree_info)
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ofchip->gc.ngpio = *tree_info;
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spin_lock_init(&chip->gpio_lock);
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ofchip->gpio_cells = 2;
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ofchip->gc.direction_input = xgpio_dir_in;
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ofchip->gc.direction_output = xgpio_dir_out;
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ofchip->gc.get = xgpio_get;
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ofchip->gc.set = xgpio_set;
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chip->mmchip.save_regs = xgpio_save_regs;
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/* Call the OF gpio helper to setup and register the GPIO device */
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status = of_mm_gpiochip_add(np, &chip->mmchip);
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if (status) {
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kfree(chip);
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pr_err("%s: error in probe function with status %d\n",
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np->full_name, status);
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return status;
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}
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pr_info("XGpio: %s: registered\n", np->full_name);
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return 0;
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}
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static struct of_device_id xgpio_of_match[] __devinitdata = {
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{ .compatible = "xlnx,xps-gpio-1.00.a", },
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{ /* end of list */ },
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};
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static int __init xgpio_init(void)
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{
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struct device_node *np;
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for_each_matching_node(np, xgpio_of_match)
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xgpio_of_probe(np);
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return 0;
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}
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/* Make sure we get initialized before anyone else tries to use us */
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subsys_initcall(xgpio_init);
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/* No exit call at the moment as we cannot unregister of GPIO chips */
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MODULE_AUTHOR("Xilinx, Inc.");
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MODULE_DESCRIPTION("Xilinx GPIO driver");
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MODULE_LICENSE("GPL");
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