shpchp: remove unnecessary struct php_ctlr
The struct php_ctlr seems to be only for complicating codes. This patch removes struct php_ctlr and related codes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Kenji Kaneshige
Greg Kroah-Hartman
parent
ab17443a3d
commit
0abe68ce24
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@ -83,7 +83,6 @@ struct event_info {
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struct controller {
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struct mutex crit_sect; /* critical section mutex */
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struct mutex cmd_lock; /* command lock */
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struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
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int num_slots; /* Number of slots on ctlr */
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int slot_num_inc; /* 1 or -1 */
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struct pci_dev *pci_dev;
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@ -102,6 +101,8 @@ struct controller {
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u32 cap_offset;
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unsigned long mmio_base;
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unsigned long mmio_size;
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void __iomem *creg;
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struct timer_list poll_timer;
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};
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@ -176,10 +177,10 @@ extern int __must_check shpchp_create_ctrl_files(struct controller *ctrl);
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extern int shpchp_sysfs_enable_slot(struct slot *slot);
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extern int shpchp_sysfs_disable_slot(struct slot *slot);
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extern u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id);
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extern u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id);
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extern u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id);
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extern u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id);
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extern u8 shpchp_handle_attention_button(u8 hp_slot, struct controller *ctrl);
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extern u8 shpchp_handle_switch_change(u8 hp_slot, struct controller *ctrl);
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extern u8 shpchp_handle_presence_change(u8 hp_slot, struct controller *ctrl);
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extern u8 shpchp_handle_power_fault(u8 hp_slot, struct controller *ctrl);
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/* pci functions */
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extern int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
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@ -262,24 +263,6 @@ enum ctrl_offsets {
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SLOT11 = offsetof(struct ctrl_reg, slot11),
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SLOT12 = offsetof(struct ctrl_reg, slot12),
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};
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typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
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struct php_ctlr_state_s {
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struct php_ctlr_state_s *pnext;
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struct pci_dev *pci_dev;
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unsigned int irq;
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unsigned long flags; /* spinlock's */
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u32 slot_device_offset;
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u32 num_slots;
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struct timer_list int_poll_timer; /* Added for poll event */
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php_intr_callback_t attention_button_callback;
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php_intr_callback_t switch_change_callback;
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php_intr_callback_t presence_change_callback;
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php_intr_callback_t power_fault_callback;
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void *callback_instance_id;
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void __iomem *creg; /* Ptr to controller register space */
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};
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/* Inline functions */
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/* Inline functions to check the sanity of a pointer that is passed to us */
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static inline int slot_paranoia_check (struct slot *slot, const char *function)
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@ -400,21 +383,8 @@ static inline void amd_pogo_errata_restore_misc_reg(struct slot *p_slot)
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pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
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}
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enum php_ctlr_type {
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PCI,
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ISA,
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ACPI
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};
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int shpc_init( struct controller *ctrl, struct pci_dev *pdev);
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int shpc_get_ctlr_slot_config( struct controller *ctrl,
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int *num_ctlr_slots,
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int *first_device_num,
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int *physical_slot_num,
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int *updown,
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int *flags);
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struct hpc_ops {
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int (*power_on_slot ) (struct slot *slot);
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int (*slot_enable ) (struct slot *slot);
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@ -211,36 +211,6 @@ void cleanup_slots(struct controller *ctrl)
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}
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}
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static int get_ctlr_slot_config(struct controller *ctrl)
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{
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int num_ctlr_slots;
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int first_device_num;
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int physical_slot_num;
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int updown;
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int rc;
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int flags;
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rc = shpc_get_ctlr_slot_config(ctrl, &num_ctlr_slots,
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&first_device_num, &physical_slot_num,
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&updown, &flags);
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if (rc) {
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err("%s: get_ctlr_slot_config fail for b:d (%x:%x)\n",
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__FUNCTION__, ctrl->bus, ctrl->device);
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return -1;
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}
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ctrl->num_slots = num_ctlr_slots;
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ctrl->slot_device_offset = first_device_num;
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ctrl->first_slot = physical_slot_num;
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ctrl->slot_num_inc = updown; /* either -1 or 1 */
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dbg("%s: num_slot(0x%x) 1st_dev(0x%x) psn(0x%x) updown(%d) for b:d "
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"(%x:%x)\n", __FUNCTION__, num_ctlr_slots, first_device_num,
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physical_slot_num, updown, ctrl->bus, ctrl->device);
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return 0;
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}
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/*
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* set_attention_status - Turns the Amber LED for a slot on, off or blink
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*/
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@ -386,8 +356,6 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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int rc;
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struct controller *ctrl;
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struct slot *t_slot;
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int first_device_num; /* first PCI device number */
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int num_ctlr_slots; /* number of slots implemented */
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if (!is_shpc_capable(pdev))
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return -ENODEV;
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@ -416,17 +384,6 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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dbg("ctrl bus=0x%x, device=%x, function=%x, irq=%x\n",
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ctrl->bus, ctrl->device, ctrl->function, pdev->irq);
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/*
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* Save configuration headers for this and subordinate PCI buses
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*/
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rc = get_ctlr_slot_config(ctrl);
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if (rc) {
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err(msg_initialization_err, rc);
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goto err_out_release_ctlr;
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}
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first_device_num = ctrl->slot_device_offset;
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num_ctlr_slots = ctrl->num_slots;
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ctrl->add_support = 1;
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/* Setup the slot information structures */
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@ -437,7 +394,7 @@ static int shpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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/* Now hpc_functions (slot->hpc_ops->functions) are ready */
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t_slot = shpchp_find_slot(ctrl, first_device_num);
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t_slot = shpchp_find_slot(ctrl, ctrl->slot_device_offset);
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/* Check for operation bus speed */
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rc = t_slot->hpc_ops->get_cur_bus_speed(t_slot, &ctrl->speed);
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@ -57,9 +57,8 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
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return 0;
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}
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u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id)
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u8 shpchp_handle_attention_button(u8 hp_slot, struct controller *ctrl)
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{
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struct controller *ctrl = (struct controller *) inst_id;
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struct slot *p_slot;
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u32 event_type;
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@ -81,9 +80,8 @@ u8 shpchp_handle_attention_button(u8 hp_slot, void *inst_id)
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}
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u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
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u8 shpchp_handle_switch_change(u8 hp_slot, struct controller *ctrl)
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{
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struct controller *ctrl = (struct controller *) inst_id;
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struct slot *p_slot;
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u8 getstatus;
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u32 event_type;
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@ -120,9 +118,8 @@ u8 shpchp_handle_switch_change(u8 hp_slot, void *inst_id)
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return 1;
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}
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u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
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u8 shpchp_handle_presence_change(u8 hp_slot, struct controller *ctrl)
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{
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struct controller *ctrl = (struct controller *) inst_id;
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struct slot *p_slot;
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u32 event_type;
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@ -154,9 +151,8 @@ u8 shpchp_handle_presence_change(u8 hp_slot, void *inst_id)
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return 1;
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}
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u8 shpchp_handle_power_fault(u8 hp_slot, void *inst_id)
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u8 shpchp_handle_power_fault(u8 hp_slot, struct controller *ctrl)
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{
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struct controller *ctrl = (struct controller *) inst_id;
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struct slot *p_slot;
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u32 event_type;
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@ -212,44 +212,40 @@
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#define SLOT_SERR_INT_MASK 0x3
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DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
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static struct php_ctlr_state_s *php_ctlr_list_head; /* HPC state linked list */
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static int ctlr_seq_num = 0; /* Controller sequenc # */
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static spinlock_t list_lock;
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static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
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static irqreturn_t shpc_isr(int irq, void *dev_id);
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static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int sec);
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static void start_int_poll_timer(struct controller *ctrl, int sec);
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static int hpc_check_cmd_status(struct controller *ctrl);
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static inline u8 shpc_readb(struct controller *ctrl, int reg)
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{
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return readb(ctrl->hpc_ctlr_handle->creg + reg);
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return readb(ctrl->creg + reg);
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}
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static inline void shpc_writeb(struct controller *ctrl, int reg, u8 val)
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{
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writeb(val, ctrl->hpc_ctlr_handle->creg + reg);
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writeb(val, ctrl->creg + reg);
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}
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static inline u16 shpc_readw(struct controller *ctrl, int reg)
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{
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return readw(ctrl->hpc_ctlr_handle->creg + reg);
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return readw(ctrl->creg + reg);
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}
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static inline void shpc_writew(struct controller *ctrl, int reg, u16 val)
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{
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writew(val, ctrl->hpc_ctlr_handle->creg + reg);
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writew(val, ctrl->creg + reg);
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}
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static inline u32 shpc_readl(struct controller *ctrl, int reg)
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{
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return readl(ctrl->hpc_ctlr_handle->creg + reg);
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return readl(ctrl->creg + reg);
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}
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static inline void shpc_writel(struct controller *ctrl, int reg, u32 val)
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{
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writel(val, ctrl->hpc_ctlr_handle->creg + reg);
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writel(val, ctrl->creg + reg);
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}
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static inline int shpc_indirect_read(struct controller *ctrl, int index,
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@ -268,21 +264,20 @@ static inline int shpc_indirect_read(struct controller *ctrl, int index,
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/*
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* This is the interrupt polling timeout function.
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*/
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static void int_poll_timeout(unsigned long lphp_ctlr)
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static void int_poll_timeout(unsigned long data)
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{
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struct php_ctlr_state_s *php_ctlr =
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(struct php_ctlr_state_s *)lphp_ctlr;
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struct controller *ctrl = (struct controller *)data;
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DBG_ENTER_ROUTINE
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/* Poll for interrupt events. regs == NULL => polling */
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shpc_isr(0, php_ctlr->callback_instance_id);
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shpc_isr(0, ctrl);
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init_timer(&php_ctlr->int_poll_timer);
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init_timer(&ctrl->poll_timer);
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if (!shpchp_poll_time)
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shpchp_poll_time = 2; /* default polling interval is 2 sec */
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start_int_poll_timer(php_ctlr, shpchp_poll_time);
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start_int_poll_timer(ctrl, shpchp_poll_time);
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DBG_LEAVE_ROUTINE
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}
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@ -290,16 +285,16 @@ static void int_poll_timeout(unsigned long lphp_ctlr)
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/*
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* This function starts the interrupt polling timer.
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*/
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static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int sec)
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static void start_int_poll_timer(struct controller *ctrl, int sec)
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{
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/* Clamp to sane value */
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if ((sec <= 0) || (sec > 60))
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sec = 2;
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php_ctlr->int_poll_timer.function = &int_poll_timeout;
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php_ctlr->int_poll_timer.data = (unsigned long)php_ctlr;
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php_ctlr->int_poll_timer.expires = jiffies + sec * HZ;
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add_timer(&php_ctlr->int_poll_timer);
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ctrl->poll_timer.function = &int_poll_timeout;
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ctrl->poll_timer.data = (unsigned long)ctrl;
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ctrl->poll_timer.expires = jiffies + sec * HZ;
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add_timer(&ctrl->poll_timer);
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}
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static inline int is_ctrl_busy(struct controller *ctrl)
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@ -666,33 +661,8 @@ static void hpc_set_green_led_blink(struct slot *slot)
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shpc_write_cmd(slot, slot->hp_slot, SET_PWR_BLINK);
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}
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int shpc_get_ctlr_slot_config(struct controller *ctrl,
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int *num_ctlr_slots, /* number of slots in this HPC */
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int *first_device_num, /* PCI dev num of the first slot in this SHPC */
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int *physical_slot_num, /* phy slot num of the first slot in this SHPC */
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int *updown, /* physical_slot_num increament: 1 or -1 */
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int *flags)
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{
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u32 slot_config;
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DBG_ENTER_ROUTINE
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slot_config = shpc_readl(ctrl, SLOT_CONFIG);
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*first_device_num = (slot_config & FIRST_DEV_NUM) >> 8;
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*num_ctlr_slots = slot_config & SLOT_NUM;
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*physical_slot_num = (slot_config & PSN) >> 16;
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*updown = ((slot_config & UPDOWN) >> 29) ? 1 : -1;
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dbg("%s: physical_slot_num = %x\n", __FUNCTION__, *physical_slot_num);
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DBG_LEAVE_ROUTINE
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return 0;
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}
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static void hpc_release_ctlr(struct controller *ctrl)
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{
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struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
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struct php_ctlr_state_s *p, *p_prev;
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int i;
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u32 slot_reg, serr_int;
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@ -722,40 +692,15 @@ static void hpc_release_ctlr(struct controller *ctrl)
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serr_int &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
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if (shpchp_poll_mode) {
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del_timer(&php_ctlr->int_poll_timer);
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} else {
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if (php_ctlr->irq) {
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free_irq(php_ctlr->irq, ctrl);
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php_ctlr->irq = 0;
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pci_disable_msi(php_ctlr->pci_dev);
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}
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if (shpchp_poll_mode)
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del_timer(&ctrl->poll_timer);
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else {
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free_irq(ctrl->pci_dev->irq, ctrl);
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pci_disable_msi(ctrl->pci_dev);
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}
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if (php_ctlr->pci_dev) {
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iounmap(php_ctlr->creg);
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release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
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php_ctlr->pci_dev = NULL;
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}
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spin_lock(&list_lock);
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p = php_ctlr_list_head;
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p_prev = NULL;
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while (p) {
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if (p == php_ctlr) {
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if (p_prev)
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p_prev->pnext = p->pnext;
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else
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php_ctlr_list_head = p->pnext;
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break;
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} else {
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p_prev = p;
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p = p->pnext;
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}
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}
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spin_unlock(&list_lock);
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kfree(php_ctlr);
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iounmap(ctrl->creg);
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release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
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/*
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* If this is the last controller to be released, destroy the
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@ -764,8 +709,7 @@ static void hpc_release_ctlr(struct controller *ctrl)
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if (atomic_dec_and_test(&shpchp_num_controllers))
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destroy_workqueue(shpchp_wq);
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DBG_LEAVE_ROUTINE
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DBG_LEAVE_ROUTINE
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}
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static int hpc_power_on_slot(struct slot * slot)
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@ -891,7 +835,6 @@ static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
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static irqreturn_t shpc_isr(int irq, void *dev_id)
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{
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struct controller *ctrl = (struct controller *)dev_id;
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struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
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u32 serr_int, slot_reg, intr_loc, intr_loc2;
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int hp_slot;
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@ -942,20 +885,16 @@ static irqreturn_t shpc_isr(int irq, void *dev_id)
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__FUNCTION__, hp_slot, slot_reg);
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if (slot_reg & MRL_CHANGE_DETECTED)
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php_ctlr->switch_change_callback(
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hp_slot, php_ctlr->callback_instance_id);
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shpchp_handle_switch_change(hp_slot, ctrl);
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if (slot_reg & BUTTON_PRESS_DETECTED)
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||||
php_ctlr->attention_button_callback(
|
||||
hp_slot, php_ctlr->callback_instance_id);
|
||||
shpchp_handle_attention_button(hp_slot, ctrl);
|
||||
|
||||
if (slot_reg & PRSNT_CHANGE_DETECTED)
|
||||
php_ctlr->presence_change_callback(
|
||||
hp_slot , php_ctlr->callback_instance_id);
|
||||
shpchp_handle_presence_change(hp_slot, ctrl);
|
||||
|
||||
if (slot_reg & (ISO_PFAULT_DETECTED | CON_PFAULT_DETECTED))
|
||||
php_ctlr->power_fault_callback(
|
||||
hp_slot, php_ctlr->callback_instance_id);
|
||||
shpchp_handle_power_fault(hp_slot, ctrl);
|
||||
|
||||
/* Clear all slot events */
|
||||
slot_reg &= ~SLOT_REG_RSVDZ_MASK;
|
||||
|
|
@ -1114,10 +1053,8 @@ static struct hpc_ops shpchp_hpc_ops = {
|
|||
.release_ctlr = hpc_release_ctlr,
|
||||
};
|
||||
|
||||
int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
||||
int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
|
||||
{
|
||||
struct php_ctlr_state_s *php_ctlr, *p;
|
||||
void *instance_id = ctrl;
|
||||
int rc = -1, num_slots = 0;
|
||||
u8 hp_slot;
|
||||
u32 shpc_base_offset;
|
||||
|
|
@ -1128,16 +1065,6 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
|
||||
ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
|
||||
|
||||
spin_lock_init(&list_lock);
|
||||
php_ctlr = kzalloc(sizeof(*php_ctlr), GFP_KERNEL);
|
||||
|
||||
if (!php_ctlr) { /* allocate controller state data */
|
||||
err("%s: HPC controller memory allocation error!\n", __FUNCTION__);
|
||||
goto abort;
|
||||
}
|
||||
|
||||
php_ctlr->pci_dev = pdev; /* save pci_dev in context */
|
||||
|
||||
if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
|
||||
PCI_DEVICE_ID_AMD_GOLAM_7450)) {
|
||||
/* amd shpc driver doesn't use Base Offset; assume 0 */
|
||||
|
|
@ -1147,20 +1074,20 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC);
|
||||
if (!ctrl->cap_offset) {
|
||||
err("%s : cap_offset == 0\n", __FUNCTION__);
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset);
|
||||
|
||||
rc = shpc_indirect_read(ctrl, 0, &shpc_base_offset);
|
||||
if (rc) {
|
||||
err("%s: cannot read base_offset\n", __FUNCTION__);
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
|
||||
rc = shpc_indirect_read(ctrl, 3, &tempdword);
|
||||
if (rc) {
|
||||
err("%s: cannot read slot config\n", __FUNCTION__);
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
num_slots = tempdword & SLOT_NUM;
|
||||
dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots);
|
||||
|
|
@ -1170,7 +1097,7 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
if (rc) {
|
||||
err("%s: cannot read creg (index = %d)\n",
|
||||
__FUNCTION__, i);
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
dbg("%s: offset %d: value %x\n", __FUNCTION__,i,
|
||||
tempdword);
|
||||
|
|
@ -1187,24 +1114,24 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
rc = pci_enable_device(pdev);
|
||||
if (rc) {
|
||||
err("%s: pci_enable_device failed\n", __FUNCTION__);
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
|
||||
if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {
|
||||
err("%s: cannot reserve MMIO region\n", __FUNCTION__);
|
||||
rc = -1;
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
|
||||
php_ctlr->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
|
||||
if (!php_ctlr->creg) {
|
||||
ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
|
||||
if (!ctrl->creg) {
|
||||
err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__,
|
||||
ctrl->mmio_size, ctrl->mmio_base);
|
||||
release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
|
||||
rc = -1;
|
||||
goto abort_free_ctlr;
|
||||
goto abort;
|
||||
}
|
||||
dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
|
||||
dbg("%s: ctrl->creg %p\n", __FUNCTION__, ctrl->creg);
|
||||
|
||||
mutex_init(&ctrl->crit_sect);
|
||||
mutex_init(&ctrl->cmd_lock);
|
||||
|
|
@ -1212,23 +1139,14 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
/* Setup wait queue */
|
||||
init_waitqueue_head(&ctrl->queue);
|
||||
|
||||
/* Find the IRQ */
|
||||
php_ctlr->irq = pdev->irq;
|
||||
php_ctlr->attention_button_callback = shpchp_handle_attention_button,
|
||||
php_ctlr->switch_change_callback = shpchp_handle_switch_change;
|
||||
php_ctlr->presence_change_callback = shpchp_handle_presence_change;
|
||||
php_ctlr->power_fault_callback = shpchp_handle_power_fault;
|
||||
php_ctlr->callback_instance_id = instance_id;
|
||||
|
||||
ctrl->hpc_ctlr_handle = php_ctlr;
|
||||
ctrl->hpc_ops = &shpchp_hpc_ops;
|
||||
|
||||
/* Return PCI Controller Info */
|
||||
slot_config = shpc_readl(ctrl, SLOT_CONFIG);
|
||||
php_ctlr->slot_device_offset = (slot_config & FIRST_DEV_NUM) >> 8;
|
||||
php_ctlr->num_slots = slot_config & SLOT_NUM;
|
||||
dbg("%s: slot_device_offset %x\n", __FUNCTION__, php_ctlr->slot_device_offset);
|
||||
dbg("%s: num_slots %x\n", __FUNCTION__, php_ctlr->num_slots);
|
||||
ctrl->slot_device_offset = (slot_config & FIRST_DEV_NUM) >> 8;
|
||||
ctrl->num_slots = slot_config & SLOT_NUM;
|
||||
ctrl->first_slot = (slot_config & PSN) >> 16;
|
||||
ctrl->slot_num_inc = ((slot_config & UPDOWN) >> 29) ? 1 : -1;
|
||||
|
||||
/* Mask Global Interrupt Mask & Command Complete Interrupt Mask */
|
||||
tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
|
||||
|
|
@ -1243,7 +1161,7 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
/* Mask the MRL sensor SERR Mask of individual slot in
|
||||
* Slot SERR-INT Mask & clear all the existing event if any
|
||||
*/
|
||||
for (hp_slot = 0; hp_slot < php_ctlr->num_slots; hp_slot++) {
|
||||
for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
|
||||
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
|
||||
dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
|
||||
hp_slot, slot_reg);
|
||||
|
|
@ -1255,24 +1173,27 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
shpc_writel(ctrl, SLOT_REG(hp_slot), slot_reg);
|
||||
}
|
||||
|
||||
if (shpchp_poll_mode) {/* Install interrupt polling code */
|
||||
/* Install and start the interrupt polling timer */
|
||||
init_timer(&php_ctlr->int_poll_timer);
|
||||
start_int_poll_timer( php_ctlr, 10 ); /* start with 10 second delay */
|
||||
if (shpchp_poll_mode) {
|
||||
/* Install interrupt polling timer. Start with 10 sec delay */
|
||||
init_timer(&ctrl->poll_timer);
|
||||
start_int_poll_timer(ctrl, 10);
|
||||
} else {
|
||||
/* Installs the interrupt handler */
|
||||
rc = pci_enable_msi(pdev);
|
||||
if (rc) {
|
||||
info("Can't get msi for the hotplug controller\n");
|
||||
info("Use INTx for the hotplug controller\n");
|
||||
} else
|
||||
php_ctlr->irq = pdev->irq;
|
||||
}
|
||||
|
||||
rc = request_irq(php_ctlr->irq, shpc_isr, IRQF_SHARED, MY_NAME, (void *) ctrl);
|
||||
dbg("%s: request_irq %d for hpc%d (returns %d)\n", __FUNCTION__, php_ctlr->irq, ctlr_seq_num, rc);
|
||||
rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
|
||||
MY_NAME, (void *)ctrl);
|
||||
dbg("%s: request_irq %d for hpc%d (returns %d)\n",
|
||||
__FUNCTION__, ctrl->pci_dev->irq,
|
||||
atomic_read(&shpchp_num_controllers), rc);
|
||||
if (rc) {
|
||||
err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq);
|
||||
goto abort_free_ctlr;
|
||||
err("Can't get irq %d for the hotplug controller\n",
|
||||
ctrl->pci_dev->irq);
|
||||
goto abort_iounmap;
|
||||
}
|
||||
}
|
||||
dbg("%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n", __FUNCTION__,
|
||||
|
|
@ -1280,24 +1201,6 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
PCI_FUNC(pdev->devfn), pdev->irq);
|
||||
get_hp_hw_control_from_firmware(pdev);
|
||||
|
||||
/* Add this HPC instance into the HPC list */
|
||||
spin_lock(&list_lock);
|
||||
if (php_ctlr_list_head == 0) {
|
||||
php_ctlr_list_head = php_ctlr;
|
||||
p = php_ctlr_list_head;
|
||||
p->pnext = NULL;
|
||||
} else {
|
||||
p = php_ctlr_list_head;
|
||||
|
||||
while (p->pnext)
|
||||
p = p->pnext;
|
||||
|
||||
p->pnext = php_ctlr;
|
||||
}
|
||||
spin_unlock(&list_lock);
|
||||
|
||||
ctlr_seq_num++;
|
||||
|
||||
/*
|
||||
* If this is the first controller to be initialized,
|
||||
* initialize the shpchpd work queue
|
||||
|
|
@ -1306,14 +1209,14 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
shpchp_wq = create_singlethread_workqueue("shpchpd");
|
||||
if (!shpchp_wq) {
|
||||
rc = -ENOMEM;
|
||||
goto abort_free_ctlr;
|
||||
goto abort_iounmap;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Unmask all event interrupts of all slots
|
||||
*/
|
||||
for (hp_slot = 0; hp_slot < php_ctlr->num_slots; hp_slot++) {
|
||||
for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
|
||||
slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
|
||||
dbg("%s: Default Logical Slot Register %d value %x\n", __FUNCTION__,
|
||||
hp_slot, slot_reg);
|
||||
|
|
@ -1336,10 +1239,8 @@ int shpc_init(struct controller * ctrl, struct pci_dev * pdev)
|
|||
return 0;
|
||||
|
||||
/* We end up here for the many possible ways to fail this API. */
|
||||
abort_free_ctlr:
|
||||
if (php_ctlr->creg)
|
||||
iounmap(php_ctlr->creg);
|
||||
kfree(php_ctlr);
|
||||
abort_iounmap:
|
||||
iounmap(ctrl->creg);
|
||||
abort:
|
||||
DBG_LEAVE_ROUTINE
|
||||
return rc;
|
||||
|
|
|
|||
Reference in New Issue