rt2x00: Revise irqmask locking for PCI devices
The PCI device irqmask is locked by a spin_lock. Currently spin_lock_irqsave is used everywhere. To reduce the locking overhead replace spin_lock_irqsave in hard irq context with spin_lock and in soft irq context with spin_lock_irq. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
567108ebd3
commit
0aa13b2e06
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@ -1317,27 +1317,25 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev,
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static void rt2400pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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static void rt2400pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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struct rt2x00_field32 irq_field)
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struct rt2x00_field32 irq_field)
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{
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{
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unsigned long flags;
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u32 reg;
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u32 reg;
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/*
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/*
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* Enable a single interrupt. The interrupt mask register
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* Enable a single interrupt. The interrupt mask register
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* access needs locking.
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* access needs locking.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt2400pci_txstatus_tasklet(unsigned long data)
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static void rt2400pci_txstatus_tasklet(unsigned long data)
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{
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{
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struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
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struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
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u32 reg;
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u32 reg;
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unsigned long flags;
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/*
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/*
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* Handle all tx queues.
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* Handle all tx queues.
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@ -1349,7 +1347,7 @@ static void rt2400pci_txstatus_tasklet(unsigned long data)
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/*
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/*
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* Enable all TXDONE interrupts again.
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* Enable all TXDONE interrupts again.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
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rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
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@ -1357,7 +1355,7 @@ static void rt2400pci_txstatus_tasklet(unsigned long data)
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rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
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rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt2400pci_tbtt_tasklet(unsigned long data)
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static void rt2400pci_tbtt_tasklet(unsigned long data)
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@ -1378,7 +1376,6 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
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{
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{
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struct rt2x00_dev *rt2x00dev = dev_instance;
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struct rt2x00_dev *rt2x00dev = dev_instance;
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u32 reg, mask;
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u32 reg, mask;
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unsigned long flags;
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/*
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/*
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* Get the interrupt sources & saved to local variable.
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* Get the interrupt sources & saved to local variable.
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@ -1420,13 +1417,13 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
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* Disable all interrupts for which a tasklet was scheduled right now,
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* Disable all interrupts for which a tasklet was scheduled right now,
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* the tasklet will reenable the appropriate interrupts.
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* the tasklet will reenable the appropriate interrupts.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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reg |= mask;
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reg |= mask;
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock(&rt2x00dev->irqmask_lock);
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@ -1449,27 +1449,25 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev,
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static void rt2500pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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static void rt2500pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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struct rt2x00_field32 irq_field)
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struct rt2x00_field32 irq_field)
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{
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{
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unsigned long flags;
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u32 reg;
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u32 reg;
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/*
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/*
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* Enable a single interrupt. The interrupt mask register
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* Enable a single interrupt. The interrupt mask register
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* access needs locking.
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* access needs locking.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt2500pci_txstatus_tasklet(unsigned long data)
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static void rt2500pci_txstatus_tasklet(unsigned long data)
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{
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{
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struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
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struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
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u32 reg;
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u32 reg;
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unsigned long flags;
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/*
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/*
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* Handle all tx queues.
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* Handle all tx queues.
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@ -1481,7 +1479,7 @@ static void rt2500pci_txstatus_tasklet(unsigned long data)
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/*
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/*
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* Enable all TXDONE interrupts again.
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* Enable all TXDONE interrupts again.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
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rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
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@ -1489,7 +1487,7 @@ static void rt2500pci_txstatus_tasklet(unsigned long data)
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rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
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rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt2500pci_tbtt_tasklet(unsigned long data)
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static void rt2500pci_tbtt_tasklet(unsigned long data)
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@ -1510,7 +1508,6 @@ static irqreturn_t rt2500pci_interrupt(int irq, void *dev_instance)
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{
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{
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struct rt2x00_dev *rt2x00dev = dev_instance;
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struct rt2x00_dev *rt2x00dev = dev_instance;
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u32 reg, mask;
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u32 reg, mask;
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unsigned long flags;
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/*
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/*
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* Get the interrupt sources & saved to local variable.
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* Get the interrupt sources & saved to local variable.
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@ -1552,13 +1549,13 @@ static irqreturn_t rt2500pci_interrupt(int irq, void *dev_instance)
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* Disable all interrupts for which a tasklet was scheduled right now,
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* Disable all interrupts for which a tasklet was scheduled right now,
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* the tasklet will reenable the appropriate interrupts.
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* the tasklet will reenable the appropriate interrupts.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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rt2x00pci_register_read(rt2x00dev, CSR8, ®);
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reg |= mask;
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reg |= mask;
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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rt2x00pci_register_write(rt2x00dev, CSR8, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock(&rt2x00dev->irqmask_lock);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -765,18 +765,17 @@ static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
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static void rt2800pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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static void rt2800pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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struct rt2x00_field32 irq_field)
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struct rt2x00_field32 irq_field)
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{
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{
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unsigned long flags;
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u32 reg;
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u32 reg;
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/*
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/*
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* Enable a single interrupt. The interrupt mask register
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* Enable a single interrupt. The interrupt mask register
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* access needs locking.
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* access needs locking.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2x00_set_field32(®, irq_field, 1);
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rt2x00_set_field32(®, irq_field, 1);
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rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
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rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt2800pci_txstatus_tasklet(unsigned long data)
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static void rt2800pci_txstatus_tasklet(unsigned long data)
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@ -862,7 +861,6 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
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{
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{
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struct rt2x00_dev *rt2x00dev = dev_instance;
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struct rt2x00_dev *rt2x00dev = dev_instance;
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u32 reg, mask;
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u32 reg, mask;
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unsigned long flags;
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/* Read status and ACK all interrupts */
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/* Read status and ACK all interrupts */
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rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, ®);
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rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, ®);
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@ -905,11 +903,11 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
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* Disable all interrupts for which a tasklet was scheduled right now,
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* Disable all interrupts for which a tasklet was scheduled right now,
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* the tasklet will reenable the appropriate interrupts.
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* the tasklet will reenable the appropriate interrupts.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock(&rt2x00dev->irqmask_lock);
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rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2800_register_read(rt2x00dev, INT_MASK_CSR, ®);
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reg &= mask;
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reg &= mask;
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rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
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rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock(&rt2x00dev->irqmask_lock);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@ -2263,39 +2263,37 @@ static void rt61pci_wakeup(struct rt2x00_dev *rt2x00dev)
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static void rt61pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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static void rt61pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
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struct rt2x00_field32 irq_field)
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struct rt2x00_field32 irq_field)
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{
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{
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unsigned long flags;
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u32 reg;
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u32 reg;
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/*
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/*
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* Enable a single interrupt. The interrupt mask register
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* Enable a single interrupt. The interrupt mask register
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* access needs locking.
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* access needs locking.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
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rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt61pci_enable_mcu_interrupt(struct rt2x00_dev *rt2x00dev,
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static void rt61pci_enable_mcu_interrupt(struct rt2x00_dev *rt2x00dev,
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struct rt2x00_field32 irq_field)
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struct rt2x00_field32 irq_field)
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{
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{
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unsigned long flags;
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u32 reg;
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u32 reg;
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/*
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/*
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* Enable a single MCU interrupt. The interrupt mask register
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* Enable a single MCU interrupt. The interrupt mask register
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* access needs locking.
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* access needs locking.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock_irq(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, MCU_INT_MASK_CSR, ®);
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rt2x00pci_register_read(rt2x00dev, MCU_INT_MASK_CSR, ®);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00_set_field32(®, irq_field, 0);
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rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
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rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock_irq(&rt2x00dev->irqmask_lock);
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}
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}
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static void rt61pci_txstatus_tasklet(unsigned long data)
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static void rt61pci_txstatus_tasklet(unsigned long data)
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@ -2333,7 +2331,6 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
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struct rt2x00_dev *rt2x00dev = dev_instance;
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struct rt2x00_dev *rt2x00dev = dev_instance;
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u32 reg_mcu, mask_mcu;
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u32 reg_mcu, mask_mcu;
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u32 reg, mask;
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u32 reg, mask;
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unsigned long flags;
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/*
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/*
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* Get the interrupt sources & saved to local variable.
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* Get the interrupt sources & saved to local variable.
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@ -2378,7 +2375,7 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
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* Disable all interrupts for which a tasklet was scheduled right now,
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* Disable all interrupts for which a tasklet was scheduled right now,
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* the tasklet will reenable the appropriate interrupts.
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* the tasklet will reenable the appropriate interrupts.
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*/
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*/
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spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
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spin_lock(&rt2x00dev->irqmask_lock);
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rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
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rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, ®);
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reg |= mask;
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reg |= mask;
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@ -2388,7 +2385,7 @@ static irqreturn_t rt61pci_interrupt(int irq, void *dev_instance)
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reg |= mask_mcu;
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reg |= mask_mcu;
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rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
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rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
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spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
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spin_unlock(&rt2x00dev->irqmask_lock);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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