ARM: S5P: Should be S3C_VA_USB_HSPHY instead of S5P_VA_XX
Basically, other S3C SoCs and S5PC100 use 'S3C_VA_USB_HSPHY' commonly. It should be changed to 'S3C_VA_USB_HSPHY' for common usage and others. Now happens build error on S5PC100. Cc: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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457d4fe851
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08115a1392
3 changed files with 3 additions and 3 deletions
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@ -98,7 +98,7 @@ static struct map_desc exynos4_iodesc[] __initdata = {
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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}, {
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.virtual = (unsigned long)S5P_VA_USB_HSPHY,
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.virtual = (unsigned long)S3C_VA_USB_HSPHY,
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.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
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.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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@ -11,7 +11,7 @@
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#ifndef __PLAT_S5P_REGS_USB_PHY_H
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#ifndef __PLAT_S5P_REGS_USB_PHY_H
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#define __PLAT_S5P_REGS_USB_PHY_H
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#define __PLAT_S5P_REGS_USB_PHY_H
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#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S5P_VA_USB_HSPHY)
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#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S3C_VA_USB_HSPHY)
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#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00)
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#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00)
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#define PHY1_HSIC_NORMAL_MASK (0xf << 9)
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#define PHY1_HSIC_NORMAL_MASK (0xf << 9)
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@ -39,7 +39,7 @@
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#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
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#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
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#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000)
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#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000)
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#define S5P_VA_USB_HSPHY S3C_ADDR(0x02900000)
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#define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000)
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#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
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#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
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#define VA_VIC0 VA_VIC(0)
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#define VA_VIC0 VA_VIC(0)
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