[ALSA] hda-intel - Fix ULI M5461 support
HDA Intel driver Fix and clean up for the support of ULI M5461 - set CORB/RIRB sizes explicitly - add workarounds for ULI on ia32 - max number of streams depends on the chip type now - increase the size of BDL Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai
Jaroslav Kysela
parent
3c10a9d9f8
commit
07e4ca50a5
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@ -72,7 +72,8 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
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"{ATI, SB450},"
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"{VIA, VT8251},"
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"{VIA, VT8237A},"
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"{SiS, SIS966}}");
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"{SiS, SIS966},"
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"{ULI, M5461}}");
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MODULE_DESCRIPTION("Intel HDA driver");
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#define SFX "hda-intel: "
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@ -142,9 +143,24 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
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*/
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/* max number of SDs */
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#define MAX_ICH6_DEV 8
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/* ICH, ATI and VIA have 4 playback and 4 capture */
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#define ICH6_CAPTURE_INDEX 0
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#define ICH6_NUM_CAPTURE 4
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#define ICH6_PLAYBACK_INDEX 4
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#define ICH6_NUM_PLAYBACK 4
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/* ULI has 6 playback and 5 capture */
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#define ULI_CAPTURE_INDEX 0
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#define ULI_NUM_CAPTURE 5
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#define ULI_PLAYBACK_INDEX 5
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#define ULI_NUM_PLAYBACK 6
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/* this number is statically defined for simplicity */
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#define MAX_AZX_DEV 16
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/* max number of fragments - we may use more if allocating more pages for BDL */
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#define AZX_MAX_FRAG (PAGE_SIZE / (MAX_ICH6_DEV * 16))
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#define BDL_SIZE PAGE_ALIGN(8192)
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#define AZX_MAX_FRAG (BDL_SIZE / (MAX_AZX_DEV * 16))
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/* max buffer size - no h/w limit, you can increase as you like */
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#define AZX_MAX_BUF_SIZE (1024*1024*1024)
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/* max number of PCM devics per card */
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@ -201,7 +217,6 @@ enum {
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};
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/* Defines for ATI HD Audio support in SB450 south bridge */
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#define ATI_SB450_HDAUDIO_PCI_DEVICE_ID 0x437b
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#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
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#define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
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@ -259,6 +274,14 @@ struct snd_azx {
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snd_card_t *card;
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struct pci_dev *pci;
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/* chip type specific */
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int driver_type;
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int playback_streams;
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int playback_index_offset;
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int capture_streams;
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int capture_index_offset;
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int num_streams;
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/* pci resources */
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unsigned long addr;
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void __iomem *remap_addr;
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@ -268,8 +291,8 @@ struct snd_azx {
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spinlock_t reg_lock;
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struct semaphore open_mutex;
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/* streams */
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azx_dev_t azx_dev[MAX_ICH6_DEV];
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/* streams (x num_streams) */
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azx_dev_t *azx_dev;
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/* PCM */
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unsigned int pcm_devs;
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@ -293,6 +316,23 @@ struct snd_azx {
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unsigned int initialized: 1;
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};
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/* driver types */
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enum {
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AZX_DRIVER_ICH,
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AZX_DRIVER_ATI,
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AZX_DRIVER_VIA,
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AZX_DRIVER_SIS,
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AZX_DRIVER_ULI,
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};
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static char *driver_short_names[] __devinitdata = {
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[AZX_DRIVER_ICH] = "HDA Intel",
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[AZX_DRIVER_ATI] = "HDA ATI SB",
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[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
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[AZX_DRIVER_SIS] = "HDA SIS966",
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[AZX_DRIVER_ULI] = "HDA ULI M5461"
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};
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/*
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* macros for easy use
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*/
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@ -361,6 +401,8 @@ static void azx_init_cmd_io(azx_t *chip)
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azx_writel(chip, CORBLBASE, (u32)chip->corb.addr);
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azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr));
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/* set the corb size to 256 entries (ULI requires explicitly) */
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azx_writeb(chip, CORBSIZE, 0x02);
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/* set the corb write pointer to 0 */
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azx_writew(chip, CORBWP, 0);
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/* reset the corb hw read pointer */
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@ -374,6 +416,8 @@ static void azx_init_cmd_io(azx_t *chip)
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azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
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azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr));
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/* set the rirb size to 256 entries (ULI requires explicitly) */
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azx_writeb(chip, RIRBSIZE, 0x02);
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/* reset the rirb hw write pointer */
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azx_writew(chip, RIRBWP, ICH6_RBRWP_CLR);
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/* set N=1, get RIRB response interrupt for new entry */
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@ -597,7 +641,7 @@ static void azx_int_disable(azx_t *chip)
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int i;
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/* disable interrupts in stream descriptor */
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for (i = 0; i < MAX_ICH6_DEV; i++) {
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for (i = 0; i < chip->num_streams; i++) {
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azx_dev_t *azx_dev = &chip->azx_dev[i];
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azx_sd_writeb(azx_dev, SD_CTL,
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azx_sd_readb(azx_dev, SD_CTL) & ~SD_INT_MASK);
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@ -617,7 +661,7 @@ static void azx_int_clear(azx_t *chip)
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int i;
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/* clear stream status */
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for (i = 0; i < MAX_ICH6_DEV; i++) {
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for (i = 0; i < chip->num_streams; i++) {
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azx_dev_t *azx_dev = &chip->azx_dev[i];
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azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK);
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}
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@ -687,8 +731,7 @@ static void azx_init_chip(azx_t *chip)
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}
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/* For ATI SB450 azalia HD audio, we need to enable snoop */
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if (chip->pci->vendor == PCI_VENDOR_ID_ATI &&
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chip->pci->device == ATI_SB450_HDAUDIO_PCI_DEVICE_ID) {
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if (chip->driver_type == AZX_DRIVER_ATI) {
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pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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&ati_misc_cntl2);
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pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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@ -715,7 +758,7 @@ static irqreturn_t azx_interrupt(int irq, void* dev_id, struct pt_regs *regs)
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return IRQ_NONE;
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}
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for (i = 0; i < MAX_ICH6_DEV; i++) {
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for (i = 0; i < chip->num_streams; i++) {
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azx_dev = &chip->azx_dev[i];
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if (status & azx_dev->sd_int_sta_mask) {
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azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK);
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@ -880,9 +923,15 @@ static int __devinit azx_codec_create(azx_t *chip, const char *model)
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/* assign a stream for the PCM */
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static inline azx_dev_t *azx_assign_device(azx_t *chip, int stream)
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{
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int dev, i;
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dev = stream == SNDRV_PCM_STREAM_PLAYBACK ? 4 : 0;
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for (i = 0; i < 4; i++, dev++)
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int dev, i, nums;
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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dev = chip->playback_index_offset;
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nums = chip->playback_streams;
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} else {
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dev = chip->capture_index_offset;
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nums = chip->capture_streams;
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}
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for (i = 0; i < nums; i++, dev++)
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if (! chip->azx_dev[dev].opened) {
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chip->azx_dev[dev].opened = 1;
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return &chip->azx_dev[dev];
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@ -1190,7 +1239,7 @@ static int __devinit azx_init_stream(azx_t *chip)
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/* initialize each stream (aka device)
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* assign the starting bdl address to each stream (device) and initialize
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*/
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for (i = 0; i < MAX_ICH6_DEV; i++) {
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for (i = 0; i < chip->num_streams; i++) {
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unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4);
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azx_dev_t *azx_dev = &chip->azx_dev[i];
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azx_dev->bdl = (u32 *)(chip->bdl.area + off);
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@ -1249,7 +1298,7 @@ static int azx_free(azx_t *chip)
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if (chip->initialized) {
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int i;
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for (i = 0; i < MAX_ICH6_DEV; i++)
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for (i = 0; i < chip->num_streams; i++)
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azx_stream_stop(chip, &chip->azx_dev[i]);
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/* disable interrupts */
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@ -1265,10 +1314,10 @@ static int azx_free(azx_t *chip)
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/* wait a little for interrupts to finish */
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msleep(1);
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iounmap(chip->remap_addr);
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}
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if (chip->remap_addr)
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iounmap(chip->remap_addr);
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if (chip->irq >= 0)
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free_irq(chip->irq, (void*)chip);
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@ -1280,6 +1329,7 @@ static int azx_free(azx_t *chip)
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snd_dma_free_pages(&chip->posbuf);
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pci_release_regions(chip->pci);
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pci_disable_device(chip->pci);
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kfree(chip->azx_dev);
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kfree(chip);
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return 0;
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@ -1294,7 +1344,8 @@ static int azx_dev_free(snd_device_t *device)
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* constructor
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*/
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static int __devinit azx_create(snd_card_t *card, struct pci_dev *pci,
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int posfix, azx_t **rchip)
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int posfix, int driver_type,
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azx_t **rchip)
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{
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azx_t *chip;
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int err = 0;
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@ -1320,9 +1371,20 @@ static int __devinit azx_create(snd_card_t *card, struct pci_dev *pci,
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chip->card = card;
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chip->pci = pci;
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chip->irq = -1;
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chip->driver_type = driver_type;
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chip->position_fix = posfix;
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#if BITS_PER_LONG != 64
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/* Fix up base address on ULI M5461 */
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if (chip->driver_type == AZX_DRIVER_ULI) {
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u16 tmp3;
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pci_read_config_word(pci, 0x40, &tmp3);
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pci_write_config_word(pci, 0x40, tmp3 | 0x10);
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pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
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}
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#endif
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if ((err = pci_request_regions(pci, "ICH HD audio")) < 0) {
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kfree(chip);
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pci_disable_device(pci);
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@ -1348,16 +1410,37 @@ static int __devinit azx_create(snd_card_t *card, struct pci_dev *pci,
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pci_set_master(pci);
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synchronize_irq(chip->irq);
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switch (chip->driver_type) {
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case AZX_DRIVER_ULI:
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chip->playback_streams = ULI_NUM_PLAYBACK;
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chip->capture_streams = ULI_NUM_CAPTURE;
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chip->playback_index_offset = ULI_PLAYBACK_INDEX;
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chip->capture_index_offset = ULI_CAPTURE_INDEX;
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break;
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default:
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chip->playback_streams = ICH6_NUM_PLAYBACK;
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chip->capture_streams = ICH6_NUM_CAPTURE;
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chip->playback_index_offset = ICH6_PLAYBACK_INDEX;
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chip->capture_index_offset = ICH6_CAPTURE_INDEX;
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break;
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}
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chip->num_streams = chip->playback_streams + chip->capture_streams;
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chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), GFP_KERNEL);
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if (! chip->azx_dev) {
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snd_printk(KERN_ERR "cannot malloc azx_dev\n");
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goto errout;
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}
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/* allocate memory for the BDL for each stream */
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if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
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PAGE_SIZE, &chip->bdl)) < 0) {
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BDL_SIZE, &chip->bdl)) < 0) {
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snd_printk(KERN_ERR SFX "cannot allocate BDL\n");
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goto errout;
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}
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if (chip->position_fix == POS_FIX_POSBUF) {
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/* allocate memory for the position buffer */
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if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
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MAX_ICH6_DEV * 8, &chip->posbuf)) < 0) {
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chip->num_streams * 8, &chip->posbuf)) < 0) {
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snd_printk(KERN_ERR SFX "cannot allocate posbuf\n");
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goto errout;
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}
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@ -1386,6 +1469,10 @@ static int __devinit azx_create(snd_card_t *card, struct pci_dev *pci,
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goto errout;
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}
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strcpy(card->driver, "HDA-Intel");
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strcpy(card->shortname, driver_short_names[chip->driver_type]);
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sprintf(card->longname, "%s at 0x%lx irq %i", card->shortname, chip->addr, chip->irq);
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*rchip = chip;
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return 0;
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@ -1414,15 +1501,12 @@ static int __devinit azx_probe(struct pci_dev *pci, const struct pci_device_id *
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return -ENOMEM;
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}
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if ((err = azx_create(card, pci, position_fix[dev], &chip)) < 0) {
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if ((err = azx_create(card, pci, position_fix[dev], pci_id->driver_data,
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&chip)) < 0) {
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snd_card_free(card);
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return err;
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}
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strcpy(card->driver, "HDA-Intel");
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strcpy(card->shortname, "HDA Intel");
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sprintf(card->longname, "%s at 0x%lx irq %i", card->shortname, chip->addr, chip->irq);
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/* create codec instances */
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if ((err = azx_codec_create(chip, model[dev])) < 0) {
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snd_card_free(card);
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@ -1463,13 +1547,13 @@ static void __devexit azx_remove(struct pci_dev *pci)
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/* PCI IDs */
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static struct pci_device_id azx_ids[] = {
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{ 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH6 */
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{ 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH7 */
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{ 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ESB2 */
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{ 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ATI SB450 */
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{ 0x1106, 0x3288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* VIA VT8251/VT8237A */
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{ 0x1039, 0x7502, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SIS966 */
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{ 0x10b9, 0x5461, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ALI 5461? */
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{ 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH6 */
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{ 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH7 */
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{ 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ESB2 */
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{ 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATI }, /* ATI SB450 */
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{ 0x1106, 0x3288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_VIA }, /* VIA VT8251/VT8237A */
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{ 0x1039, 0x7502, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_SIS }, /* SIS966 */
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{ 0x10b9, 0x5461, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ULI }, /* ULI M5461 */
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, azx_ids);
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