drm/nouveau: fix nv30 pcie boards
Wasn't aware they even existed, apparently they do! They're actually AGP chips with a bridge as far as I can tell, which puts them in the same boat as nv40/nv45. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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04eb34a43c
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01d153326e
2 changed files with 3 additions and 3 deletions
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@ -398,7 +398,7 @@ nouveau_mem_vram_init(struct drm_device *dev)
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dma_bits = 40;
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} else
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if (drm_pci_device_is_pcie(dev) &&
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dev_priv->chipset != 0x40 &&
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dev_priv->chipset > 0x40 &&
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dev_priv->chipset != 0x45) {
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if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(39)))
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dma_bits = 39;
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@ -427,7 +427,7 @@ nouveau_sgdma_init(struct drm_device *dev)
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u32 aper_size, align;
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int ret;
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if (dev_priv->card_type >= NV_50 || drm_pci_device_is_pcie(dev))
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if (dev_priv->card_type >= NV_40 && drm_pci_device_is_pcie(dev))
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aper_size = 512 * 1024 * 1024;
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else
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aper_size = 64 * 1024 * 1024;
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@ -457,7 +457,7 @@ nouveau_sgdma_init(struct drm_device *dev)
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dev_priv->gart_info.func = &nv50_sgdma_backend;
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} else
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if (drm_pci_device_is_pcie(dev) &&
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dev_priv->chipset != 0x40 && dev_priv->chipset != 0x45) {
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dev_priv->chipset > 0x40 && dev_priv->chipset != 0x45) {
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if (nv44_graph_class(dev)) {
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dev_priv->gart_info.func = &nv44_sgdma_backend;
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align = 512 * 1024;
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