[PATCH] e1000: Fix PBA allocation calculations
Assign the PBA to be large enough to contain at least 2 jumbo frames on all adapters. This dramatically increases performance on several adapters and fixes TX performance degradation issues where the PBA was misallocated in the old algorithm. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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2 changed files with 86 additions and 14 deletions
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@ -2422,6 +2422,7 @@ struct e1000_host_command_info {
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#define E1000_PBA_8K 0x0008 /* 8KB, default Rx allocation */
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#define E1000_PBA_12K 0x000C /* 12KB, default Rx allocation */
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#define E1000_PBA_16K 0x0010 /* 16KB, default TX allocation */
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#define E1000_PBA_20K 0x0014
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#define E1000_PBA_22K 0x0016
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#define E1000_PBA_24K 0x0018
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#define E1000_PBA_30K 0x001E
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@ -661,16 +661,34 @@ e1000_reinit_locked(struct e1000_adapter *adapter)
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void
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e1000_reset(struct e1000_adapter *adapter)
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{
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uint32_t pba;
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uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
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uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
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boolean_t legacy_pba_adjust = FALSE;
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/* Repartition Pba for greater than 9k mtu
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* To take effect CTRL.RST is required.
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*/
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switch (adapter->hw.mac_type) {
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case e1000_82542_rev2_0:
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case e1000_82542_rev2_1:
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case e1000_82543:
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case e1000_82544:
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case e1000_82540:
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case e1000_82541:
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case e1000_82541_rev_2:
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legacy_pba_adjust = TRUE;
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pba = E1000_PBA_48K;
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break;
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case e1000_82545:
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case e1000_82545_rev_3:
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case e1000_82546:
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case e1000_82546_rev_3:
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pba = E1000_PBA_48K;
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break;
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case e1000_82547:
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case e1000_82547_rev_2:
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legacy_pba_adjust = TRUE;
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pba = E1000_PBA_30K;
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break;
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case e1000_82571:
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@ -679,27 +697,80 @@ e1000_reset(struct e1000_adapter *adapter)
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pba = E1000_PBA_38K;
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break;
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case e1000_82573:
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pba = E1000_PBA_12K;
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pba = E1000_PBA_20K;
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break;
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case e1000_ich8lan:
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pba = E1000_PBA_8K;
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break;
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default:
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pba = E1000_PBA_48K;
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case e1000_undefined:
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case e1000_num_macs:
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break;
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}
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if ((adapter->hw.mac_type != e1000_82573) &&
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(adapter->netdev->mtu > E1000_RXBUFFER_8192))
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pba -= 8; /* allocate more FIFO for Tx */
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if (legacy_pba_adjust == TRUE) {
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if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
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pba -= 8; /* allocate more FIFO for Tx */
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if (adapter->hw.mac_type == e1000_82547) {
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adapter->tx_fifo_head = 0;
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adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
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adapter->tx_fifo_size =
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(E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
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atomic_set(&adapter->tx_fifo_stall, 0);
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}
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} else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
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/* adjust PBA for jumbo frames */
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E1000_WRITE_REG(&adapter->hw, PBA, pba);
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if (adapter->hw.mac_type == e1000_82547) {
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adapter->tx_fifo_head = 0;
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adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
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adapter->tx_fifo_size =
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(E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
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atomic_set(&adapter->tx_fifo_stall, 0);
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/* To maintain wire speed transmits, the Tx FIFO should be
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* large enough to accomodate two full transmit packets,
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* rounded up to the next 1KB and expressed in KB. Likewise,
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* the Rx FIFO should be large enough to accomodate at least
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* one full receive packet and is similarly rounded up and
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* expressed in KB. */
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pba = E1000_READ_REG(&adapter->hw, PBA);
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/* upper 16 bits has Tx packet buffer allocation size in KB */
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tx_space = pba >> 16;
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/* lower 16 bits has Rx packet buffer allocation size in KB */
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pba &= 0xffff;
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/* don't include ethernet FCS because hardware appends/strips */
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min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
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VLAN_TAG_SIZE;
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min_tx_space = min_rx_space;
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min_tx_space *= 2;
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E1000_ROUNDUP(min_tx_space, 1024);
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min_tx_space >>= 10;
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E1000_ROUNDUP(min_rx_space, 1024);
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min_rx_space >>= 10;
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/* If current Tx allocation is less than the min Tx FIFO size,
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* and the min Tx FIFO size is less than the current Rx FIFO
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* allocation, take space away from current Rx allocation */
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if (tx_space < min_tx_space &&
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((min_tx_space - tx_space) < pba)) {
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pba = pba - (min_tx_space - tx_space);
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/* PCI/PCIx hardware has PBA alignment constraints */
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switch (adapter->hw.mac_type) {
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case e1000_82545 ... e1000_82546_rev_3:
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pba &= ~(E1000_PBA_8K - 1);
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break;
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default:
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break;
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}
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/* if short on rx space, rx wins and must trump tx
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* adjustment or use Early Receive if available */
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if (pba < min_rx_space) {
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switch (adapter->hw.mac_type) {
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case e1000_82573:
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/* ERT enabled in e1000_configure_rx */
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break;
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default:
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pba = min_rx_space;
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break;
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}
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}
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}
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}
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E1000_WRITE_REG(&adapter->hw, PBA, pba);
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