2009-06-05 12:42:42 +00:00
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/*
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* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
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* VA Linux Systems Inc., Fremont, California.
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* Copyright 2008 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Original Authors:
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* Kevin E. Martin, Rickard E. Faith, Alan Hourihane
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*
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* Kernel port Author: Dave Airlie
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*/
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#ifndef RADEON_MODE_H
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#define RADEON_MODE_H
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#include <drm_crtc.h>
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#include <drm_mode.h>
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#include <drm_edid.h>
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2009-12-07 21:07:28 +00:00
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#include <drm_dp_helper.h>
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2010-04-28 01:46:42 +00:00
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#include <drm_fixed.h>
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2010-10-13 19:09:44 +00:00
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#include <drm_crtc_helper.h>
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2009-06-05 12:42:42 +00:00
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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2009-07-13 19:04:08 +00:00
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2010-03-30 05:34:13 +00:00
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struct radeon_bo;
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2009-07-13 19:04:08 +00:00
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struct radeon_device;
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2009-06-05 12:42:42 +00:00
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#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
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#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
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#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
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#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
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enum radeon_rmx_type {
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RMX_OFF,
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RMX_FULL,
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RMX_CENTER,
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RMX_ASPECT
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};
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enum radeon_tv_std {
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TV_STD_NTSC,
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TV_STD_PAL,
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TV_STD_PAL_M,
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TV_STD_PAL_60,
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TV_STD_NTSC_J,
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TV_STD_SCART_PAL,
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TV_STD_SECAM,
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TV_STD_PAL_CN,
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2009-12-18 00:00:29 +00:00
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TV_STD_PAL_N,
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2009-06-05 12:42:42 +00:00
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};
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2010-08-03 23:59:20 +00:00
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enum radeon_underscan_type {
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UNDERSCAN_OFF,
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UNDERSCAN_ON,
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UNDERSCAN_AUTO,
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};
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2010-05-18 23:26:47 +00:00
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enum radeon_hpd_id {
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RADEON_HPD_1 = 0,
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RADEON_HPD_2,
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RADEON_HPD_3,
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RADEON_HPD_4,
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RADEON_HPD_5,
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RADEON_HPD_6,
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RADEON_HPD_NONE = 0xff,
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};
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2010-08-06 01:21:16 +00:00
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#define RADEON_MAX_I2C_BUS 16
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2009-11-10 20:59:44 +00:00
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/* radeon gpio-based i2c
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* 1. "mask" reg and bits
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* grabs the gpio pins for software use
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* 0=not held 1=held
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* 2. "a" reg and bits
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* output pin value
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* 0=low 1=high
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* 3. "en" reg and bits
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* sets the pin direction
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* 0=input 1=output
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* 4. "y" reg and bits
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* input pin value
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* 0=low 1=high
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*/
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2009-06-05 12:42:42 +00:00
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struct radeon_i2c_bus_rec {
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bool valid;
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2009-11-23 22:39:28 +00:00
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/* id used by atom */
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uint8_t i2c_id;
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2010-01-12 22:54:34 +00:00
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/* id used by atom */
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2010-05-18 23:26:47 +00:00
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enum radeon_hpd_id hpd;
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2009-11-23 22:39:28 +00:00
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/* can be used with hw i2c engine */
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bool hw_capable;
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/* uses multi-media i2c engine */
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bool mm_i2c;
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/* regs and bits */
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2009-06-05 12:42:42 +00:00
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uint32_t mask_clk_reg;
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uint32_t mask_data_reg;
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uint32_t a_clk_reg;
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uint32_t a_data_reg;
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2009-11-10 20:59:44 +00:00
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uint32_t en_clk_reg;
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uint32_t en_data_reg;
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uint32_t y_clk_reg;
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uint32_t y_data_reg;
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2009-06-05 12:42:42 +00:00
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uint32_t mask_clk_mask;
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uint32_t mask_data_mask;
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uint32_t a_clk_mask;
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uint32_t a_data_mask;
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2009-11-10 20:59:44 +00:00
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uint32_t en_clk_mask;
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uint32_t en_data_mask;
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uint32_t y_clk_mask;
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uint32_t y_data_mask;
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2009-06-05 12:42:42 +00:00
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};
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struct radeon_tmds_pll {
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uint32_t freq;
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uint32_t value;
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};
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#define RADEON_MAX_BIOS_CONNECTOR 16
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2010-02-02 17:05:01 +00:00
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/* pll flags */
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2009-06-05 12:42:42 +00:00
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#define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
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#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
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#define RADEON_PLL_USE_REF_DIV (1 << 2)
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#define RADEON_PLL_LEGACY (1 << 3)
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#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
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#define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
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#define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
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#define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
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#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
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#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
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#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
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2009-07-13 15:08:18 +00:00
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#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
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2010-01-19 22:16:10 +00:00
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#define RADEON_PLL_USE_POST_DIV (1 << 12)
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2010-03-08 17:55:16 +00:00
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#define RADEON_PLL_IS_LCD (1 << 13)
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2011-01-31 21:48:52 +00:00
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#define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
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2009-06-05 12:42:42 +00:00
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struct radeon_pll {
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2010-01-19 22:16:10 +00:00
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/* reference frequency */
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uint32_t reference_freq;
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/* fixed dividers */
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uint32_t reference_div;
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uint32_t post_div;
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/* pll in/out limits */
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2009-06-05 12:42:42 +00:00
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uint32_t pll_in_min;
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uint32_t pll_in_max;
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uint32_t pll_out_min;
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uint32_t pll_out_max;
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2010-03-08 17:55:16 +00:00
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uint32_t lcd_pll_out_min;
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uint32_t lcd_pll_out_max;
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2010-01-19 22:16:10 +00:00
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uint32_t best_vco;
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2009-06-05 12:42:42 +00:00
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2010-01-19 22:16:10 +00:00
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/* divider limits */
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2009-06-05 12:42:42 +00:00
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uint32_t min_ref_div;
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uint32_t max_ref_div;
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uint32_t min_post_div;
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uint32_t max_post_div;
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uint32_t min_feedback_div;
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uint32_t max_feedback_div;
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uint32_t min_frac_feedback_div;
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uint32_t max_frac_feedback_div;
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2010-01-19 22:16:10 +00:00
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/* flags for the current clock */
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uint32_t flags;
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/* pll id */
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uint32_t id;
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2009-06-05 12:42:42 +00:00
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};
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struct radeon_i2c_chan {
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struct i2c_adapter adapter;
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2009-12-07 21:07:28 +00:00
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struct drm_device *dev;
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union {
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2010-03-14 16:22:44 +00:00
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struct i2c_algo_bit_data bit;
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2009-12-07 21:07:28 +00:00
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struct i2c_algo_dp_aux_data dp;
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} algo;
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2009-06-05 12:42:42 +00:00
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struct radeon_i2c_bus_rec rec;
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};
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/* mostly for macs, but really any system without connector tables */
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enum radeon_connector_table {
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2010-09-07 18:41:30 +00:00
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CT_NONE = 0,
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2009-06-05 12:42:42 +00:00
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CT_GENERIC,
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CT_IBOOK,
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CT_POWERBOOK_EXTERNAL,
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CT_POWERBOOK_INTERNAL,
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CT_POWERBOOK_VGA,
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CT_MINI_EXTERNAL,
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CT_MINI_INTERNAL,
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CT_IMAC_G5_ISIGHT,
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CT_EMAC,
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2010-06-11 05:09:05 +00:00
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CT_RN50_POWER,
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2010-09-07 18:41:30 +00:00
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CT_MAC_X800,
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2011-02-07 18:15:28 +00:00
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CT_MAC_G5_9600,
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2009-06-05 12:42:42 +00:00
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};
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2009-11-11 02:25:07 +00:00
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enum radeon_dvo_chip {
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DVO_SIL164,
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DVO_SIL1178,
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};
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2010-03-30 05:34:14 +00:00
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struct radeon_fbdev;
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2010-03-30 05:34:13 +00:00
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2009-06-05 12:42:42 +00:00
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struct radeon_mode_info {
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struct atom_context *atom_context;
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2009-10-27 19:08:01 +00:00
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struct card_info *atom_card_info;
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2009-06-05 12:42:42 +00:00
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enum radeon_connector_table connector_table;
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bool mode_config_initialized;
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2010-01-12 22:54:34 +00:00
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struct radeon_crtc *crtcs[6];
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2009-09-09 07:40:54 +00:00
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/* DVI-I properties */
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struct drm_property *coherent_mode_property;
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/* DAC enable load detect */
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struct drm_property *load_detect_property;
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2010-08-03 23:59:20 +00:00
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/* TV standard */
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2009-09-09 07:40:54 +00:00
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struct drm_property *tv_std_property;
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/* legacy TMDS PLL detect */
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struct drm_property *tmds_pll_property;
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2010-08-03 23:59:20 +00:00
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/* underscan */
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struct drm_property *underscan_property;
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2010-09-21 19:30:59 +00:00
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struct drm_property *underscan_hborder_property;
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struct drm_property *underscan_vborder_property;
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2010-02-05 09:21:19 +00:00
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/* hardcoded DFP edid from BIOS */
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struct edid *bios_hardcoded_edid;
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2011-03-23 08:10:10 +00:00
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int bios_hardcoded_edid_size;
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2010-03-30 05:34:13 +00:00
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/* pointer to fbdev info structure */
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2010-03-30 05:34:14 +00:00
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struct radeon_fbdev *rfbdev;
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2009-07-13 19:04:08 +00:00
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};
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2009-08-13 06:32:14 +00:00
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#define MAX_H_CODE_TIMING_LEN 32
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#define MAX_V_CODE_TIMING_LEN 32
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/* need to store these as reading
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back code tables is excessive */
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struct radeon_tv_regs {
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uint32_t tv_uv_adr;
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uint32_t timing_cntl;
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uint32_t hrestart;
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uint32_t vrestart;
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uint32_t frestart;
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uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
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uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
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};
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2009-06-05 12:42:42 +00:00
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struct radeon_crtc {
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struct drm_crtc base;
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int crtc_id;
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u16 lut_r[256], lut_g[256], lut_b[256];
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bool enabled;
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bool can_tile;
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uint32_t crtc_offset;
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struct drm_gem_object *cursor_bo;
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uint64_t cursor_addr;
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int cursor_width;
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int cursor_height;
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2009-07-09 05:04:19 +00:00
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uint32_t legacy_display_base_addr;
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2009-07-13 17:51:03 +00:00
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uint32_t legacy_cursor_offset;
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2009-07-13 19:04:08 +00:00
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enum radeon_rmx_type rmx_type;
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2010-08-03 23:59:20 +00:00
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u8 h_border;
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u8 v_border;
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2009-07-13 19:04:08 +00:00
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fixed20_12 vsc;
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fixed20_12 hsc;
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2009-10-09 19:14:30 +00:00
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struct drm_display_mode native_mode;
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2010-01-12 22:54:34 +00:00
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int pll_id;
|
2010-11-21 15:59:01 +00:00
|
|
|
/* page flipping */
|
|
|
|
|
struct radeon_unpin_work *unpin_work;
|
|
|
|
|
int deferred_flip_completion;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_encoder_primary_dac {
|
|
|
|
|
/* legacy primary dac */
|
|
|
|
|
uint32_t ps2_pdac_adj;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_encoder_lvds {
|
|
|
|
|
/* legacy lvds */
|
|
|
|
|
uint16_t panel_vcc_delay;
|
|
|
|
|
uint8_t panel_pwr_delay;
|
|
|
|
|
uint8_t panel_digon_delay;
|
|
|
|
|
uint8_t panel_blon_delay;
|
|
|
|
|
uint16_t panel_ref_divider;
|
|
|
|
|
uint8_t panel_post_divider;
|
|
|
|
|
uint16_t panel_fb_divider;
|
|
|
|
|
bool use_bios_dividers;
|
|
|
|
|
uint32_t lvds_gen_cntl;
|
|
|
|
|
/* panel mode */
|
2009-10-09 19:14:30 +00:00
|
|
|
struct drm_display_mode native_mode;
|
2011-03-22 23:30:23 +00:00
|
|
|
struct backlight_device *bl_dev;
|
|
|
|
|
int dpms_mode;
|
|
|
|
|
uint8_t backlight_level;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_encoder_tv_dac {
|
|
|
|
|
/* legacy tv dac */
|
|
|
|
|
uint32_t ps2_tvdac_adj;
|
|
|
|
|
uint32_t ntsc_tvdac_adj;
|
|
|
|
|
uint32_t pal_tvdac_adj;
|
|
|
|
|
|
2009-08-13 06:32:14 +00:00
|
|
|
int h_pos;
|
|
|
|
|
int v_pos;
|
|
|
|
|
int h_size;
|
|
|
|
|
int supported_tv_stds;
|
|
|
|
|
bool tv_on;
|
2009-06-05 12:42:42 +00:00
|
|
|
enum radeon_tv_std tv_std;
|
2009-08-13 06:32:14 +00:00
|
|
|
struct radeon_tv_regs tv;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_encoder_int_tmds {
|
|
|
|
|
/* legacy int tmds */
|
|
|
|
|
struct radeon_tmds_pll tmds_pll[4];
|
|
|
|
|
};
|
|
|
|
|
|
2009-11-11 02:25:07 +00:00
|
|
|
struct radeon_encoder_ext_tmds {
|
|
|
|
|
/* tmds over dvo */
|
|
|
|
|
struct radeon_i2c_chan *i2c_bus;
|
|
|
|
|
uint8_t slave_addr;
|
|
|
|
|
enum radeon_dvo_chip dvo_chip;
|
|
|
|
|
};
|
|
|
|
|
|
2009-10-16 15:15:25 +00:00
|
|
|
/* spread spectrum */
|
|
|
|
|
struct radeon_atom_ss {
|
|
|
|
|
uint16_t percentage;
|
|
|
|
|
uint8_t type;
|
2010-10-04 21:13:01 +00:00
|
|
|
uint16_t step;
|
2009-10-16 15:15:25 +00:00
|
|
|
uint8_t delay;
|
|
|
|
|
uint8_t range;
|
|
|
|
|
uint8_t refdiv;
|
2010-10-04 21:13:01 +00:00
|
|
|
/* asic_ss */
|
|
|
|
|
uint16_t rate;
|
|
|
|
|
uint16_t amount;
|
2009-10-16 15:15:25 +00:00
|
|
|
};
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
struct radeon_encoder_atom_dig {
|
2010-08-12 22:58:47 +00:00
|
|
|
bool linkb;
|
2009-06-05 12:42:42 +00:00
|
|
|
/* atom dig */
|
|
|
|
|
bool coherent_mode;
|
2010-10-04 21:13:01 +00:00
|
|
|
int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
|
|
|
|
|
/* atom lvds/edp */
|
|
|
|
|
uint32_t lcd_misc;
|
2009-06-05 12:42:42 +00:00
|
|
|
uint16_t panel_pwr_delay;
|
2010-10-04 21:13:01 +00:00
|
|
|
uint32_t lcd_ss_id;
|
2009-06-05 12:42:42 +00:00
|
|
|
/* panel mode */
|
2009-10-09 19:14:30 +00:00
|
|
|
struct drm_display_mode native_mode;
|
2011-03-22 23:30:23 +00:00
|
|
|
struct backlight_device *bl_dev;
|
|
|
|
|
int dpms_mode;
|
|
|
|
|
uint8_t backlight_level;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
2009-08-13 06:32:14 +00:00
|
|
|
struct radeon_encoder_atom_dac {
|
|
|
|
|
enum radeon_tv_std tv_std;
|
|
|
|
|
};
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
struct radeon_encoder {
|
|
|
|
|
struct drm_encoder base;
|
2010-08-12 22:58:47 +00:00
|
|
|
uint32_t encoder_enum;
|
2009-06-05 12:42:42 +00:00
|
|
|
uint32_t encoder_id;
|
|
|
|
|
uint32_t devices;
|
2009-08-13 06:32:14 +00:00
|
|
|
uint32_t active_device;
|
2009-06-05 12:42:42 +00:00
|
|
|
uint32_t flags;
|
|
|
|
|
uint32_t pixel_clock;
|
|
|
|
|
enum radeon_rmx_type rmx_type;
|
2010-08-03 23:59:20 +00:00
|
|
|
enum radeon_underscan_type underscan_type;
|
2010-09-21 19:30:59 +00:00
|
|
|
uint32_t underscan_hborder;
|
|
|
|
|
uint32_t underscan_vborder;
|
2009-10-09 19:14:30 +00:00
|
|
|
struct drm_display_mode native_mode;
|
2009-06-05 12:42:42 +00:00
|
|
|
void *enc_priv;
|
2010-04-05 20:14:55 +00:00
|
|
|
int audio_polling_active;
|
2009-10-11 21:49:13 +00:00
|
|
|
int hdmi_offset;
|
2010-03-06 13:03:33 +00:00
|
|
|
int hdmi_config_offset;
|
2009-10-11 21:49:13 +00:00
|
|
|
int hdmi_audio_workaround;
|
|
|
|
|
int hdmi_buffer_status;
|
2010-11-16 17:09:42 +00:00
|
|
|
bool is_ext_encoder;
|
2011-01-07 02:19:21 +00:00
|
|
|
u16 caps;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_connector_atom_dig {
|
|
|
|
|
uint32_t igp_lane_info;
|
2009-11-23 23:02:35 +00:00
|
|
|
/* displayport */
|
2009-12-07 21:07:28 +00:00
|
|
|
struct radeon_i2c_chan *dp_i2c_bus;
|
2009-11-21 00:40:13 +00:00
|
|
|
u8 dpcd[8];
|
2009-11-23 23:02:35 +00:00
|
|
|
u8 dp_sink_type;
|
2009-11-24 18:32:59 +00:00
|
|
|
int dp_clock;
|
|
|
|
|
int dp_lane_count;
|
2010-11-17 07:54:42 +00:00
|
|
|
bool edp_on;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
2009-12-04 19:45:27 +00:00
|
|
|
struct radeon_gpio_rec {
|
|
|
|
|
bool valid;
|
|
|
|
|
u8 id;
|
|
|
|
|
u32 reg;
|
|
|
|
|
u32 mask;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_hpd {
|
|
|
|
|
enum radeon_hpd_id hpd;
|
|
|
|
|
u8 plugged_state;
|
|
|
|
|
struct radeon_gpio_rec gpio;
|
|
|
|
|
};
|
|
|
|
|
|
2010-08-06 01:21:18 +00:00
|
|
|
struct radeon_router {
|
|
|
|
|
u32 router_id;
|
|
|
|
|
struct radeon_i2c_bus_rec i2c_info;
|
|
|
|
|
u8 i2c_addr;
|
2010-11-08 16:08:29 +00:00
|
|
|
/* i2c mux */
|
|
|
|
|
bool ddc_valid;
|
|
|
|
|
u8 ddc_mux_type;
|
|
|
|
|
u8 ddc_mux_control_pin;
|
|
|
|
|
u8 ddc_mux_state;
|
|
|
|
|
/* clock/data mux */
|
|
|
|
|
bool cd_valid;
|
|
|
|
|
u8 cd_mux_type;
|
|
|
|
|
u8 cd_mux_control_pin;
|
|
|
|
|
u8 cd_mux_state;
|
2010-08-06 01:21:18 +00:00
|
|
|
};
|
|
|
|
|
|
2009-06-05 12:42:42 +00:00
|
|
|
struct radeon_connector {
|
|
|
|
|
struct drm_connector base;
|
|
|
|
|
uint32_t connector_id;
|
|
|
|
|
uint32_t devices;
|
|
|
|
|
struct radeon_i2c_chan *ddc_bus;
|
2010-08-03 23:59:20 +00:00
|
|
|
/* some systems have an hdmi and vga port with a shared ddc line */
|
2009-10-15 20:16:35 +00:00
|
|
|
bool shared_ddc;
|
2011-07-29 14:28:58 +00:00
|
|
|
/* for some Radeon chip families we apply an additional EDID header
|
|
|
|
|
check as part of the DDC probe */
|
|
|
|
|
bool requires_extended_probe;
|
2009-08-13 06:32:14 +00:00
|
|
|
bool use_digital;
|
|
|
|
|
/* we need to mind the EDID between detect
|
|
|
|
|
and get modes due to analog/digital/tvencoder */
|
|
|
|
|
struct edid *edid;
|
2009-06-05 12:42:42 +00:00
|
|
|
void *con_priv;
|
2009-09-09 07:40:54 +00:00
|
|
|
bool dac_load_detect;
|
2009-11-05 18:16:01 +00:00
|
|
|
uint16_t connector_object_id;
|
2009-12-04 19:45:27 +00:00
|
|
|
struct radeon_hpd hpd;
|
2010-08-06 01:21:18 +00:00
|
|
|
struct radeon_router router;
|
|
|
|
|
struct radeon_i2c_chan *router_bus;
|
2009-06-05 12:42:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct radeon_framebuffer {
|
|
|
|
|
struct drm_framebuffer base;
|
|
|
|
|
struct drm_gem_object *obj;
|
|
|
|
|
};
|
|
|
|
|
|
2010-10-05 23:57:36 +00:00
|
|
|
|
2009-12-18 00:00:29 +00:00
|
|
|
extern enum radeon_tv_std
|
|
|
|
|
radeon_combios_get_tv_info(struct radeon_device *rdev);
|
|
|
|
|
extern enum radeon_tv_std
|
|
|
|
|
radeon_atombios_get_tv_info(struct radeon_device *rdev);
|
|
|
|
|
|
2010-08-03 23:59:20 +00:00
|
|
|
extern struct drm_connector *
|
|
|
|
|
radeon_get_connector_for_encoder(struct drm_encoder *encoder);
|
|
|
|
|
|
2011-05-20 08:34:21 +00:00
|
|
|
extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder);
|
|
|
|
|
extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector);
|
|
|
|
|
extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
|
|
|
|
|
extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
|
|
|
|
|
|
2009-12-04 21:56:37 +00:00
|
|
|
extern void radeon_connector_hotplug(struct drm_connector *connector);
|
2011-05-20 08:34:28 +00:00
|
|
|
extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
|
2009-11-24 18:32:59 +00:00
|
|
|
struct drm_display_mode *mode);
|
|
|
|
|
extern void radeon_dp_set_link_config(struct drm_connector *connector,
|
|
|
|
|
struct drm_display_mode *mode);
|
2011-05-20 08:34:28 +00:00
|
|
|
extern void radeon_dp_link_train(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_connector *connector);
|
2009-11-23 23:02:35 +00:00
|
|
|
extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
|
2009-11-27 18:01:46 +00:00
|
|
|
extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
|
2011-05-20 08:34:27 +00:00
|
|
|
extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
|
2011-05-22 17:20:36 +00:00
|
|
|
extern void radeon_atom_encoder_init(struct radeon_device *rdev);
|
2009-11-24 18:32:59 +00:00
|
|
|
extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
|
|
|
|
|
int action, uint8_t lane_num,
|
|
|
|
|
uint8_t lane_set);
|
2011-06-13 21:13:34 +00:00
|
|
|
extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
|
2011-06-16 14:06:16 +00:00
|
|
|
extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder);
|
2009-12-07 21:07:28 +00:00
|
|
|
extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
|
2011-05-20 08:34:24 +00:00
|
|
|
u8 write_byte, u8 *read_byte);
|
2009-12-07 21:07:28 +00:00
|
|
|
|
2010-08-06 01:21:16 +00:00
|
|
|
extern void radeon_i2c_init(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_i2c_fini(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_combios_i2c_init(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_i2c_add(struct radeon_device *rdev,
|
|
|
|
|
struct radeon_i2c_bus_rec *rec,
|
|
|
|
|
const char *name);
|
|
|
|
|
extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
|
|
|
|
|
struct radeon_i2c_bus_rec *i2c_bus);
|
2009-12-07 21:07:28 +00:00
|
|
|
extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
|
2009-11-23 22:39:28 +00:00
|
|
|
struct radeon_i2c_bus_rec *rec,
|
|
|
|
|
const char *name);
|
2009-06-05 12:42:42 +00:00
|
|
|
extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
|
|
|
|
|
struct radeon_i2c_bus_rec *rec,
|
|
|
|
|
const char *name);
|
|
|
|
|
extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
|
2009-12-22 20:04:48 +00:00
|
|
|
extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
|
|
|
|
|
u8 slave_addr,
|
|
|
|
|
u8 addr,
|
|
|
|
|
u8 *val);
|
|
|
|
|
extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
|
|
|
|
|
u8 slave_addr,
|
|
|
|
|
u8 addr,
|
|
|
|
|
u8 val);
|
2010-11-08 16:08:29 +00:00
|
|
|
extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
|
|
|
|
|
extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
|
2011-07-29 14:28:58 +00:00
|
|
|
extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector,
|
|
|
|
|
bool requires_extended_probe);
|
2009-06-05 12:42:42 +00:00
|
|
|
extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
|
|
|
|
|
|
|
|
|
|
extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
|
|
|
|
|
|
2010-10-04 21:13:01 +00:00
|
|
|
extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
|
|
|
|
|
struct radeon_atom_ss *ss,
|
|
|
|
|
int id);
|
|
|
|
|
extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
|
|
|
|
|
struct radeon_atom_ss *ss,
|
|
|
|
|
int id, u32 clock);
|
|
|
|
|
|
2011-01-31 21:48:52 +00:00
|
|
|
extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
|
|
|
|
|
uint64_t freq,
|
|
|
|
|
uint32_t *dot_clock_p,
|
|
|
|
|
uint32_t *fb_div_p,
|
|
|
|
|
uint32_t *frac_fb_div_p,
|
|
|
|
|
uint32_t *ref_div_p,
|
|
|
|
|
uint32_t *post_div_p);
|
|
|
|
|
|
|
|
|
|
extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
|
|
|
|
|
u32 freq,
|
|
|
|
|
u32 *dot_clock_p,
|
|
|
|
|
u32 *fb_div_p,
|
|
|
|
|
u32 *frac_fb_div_p,
|
|
|
|
|
u32 *ref_div_p,
|
|
|
|
|
u32 *post_div_p);
|
2009-06-05 12:42:42 +00:00
|
|
|
|
2009-10-13 04:10:37 +00:00
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extern void radeon_setup_encoder_clones(struct drm_device *dev);
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2009-06-05 12:42:42 +00:00
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struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
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struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
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struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
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struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
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struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
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2010-11-16 17:09:41 +00:00
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extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
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2009-11-30 06:54:16 +00:00
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extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
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2009-06-05 12:42:42 +00:00
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extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
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2011-05-20 08:34:19 +00:00
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extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
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2009-08-13 06:32:14 +00:00
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extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
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2009-06-05 12:42:42 +00:00
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extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
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extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb);
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2010-09-26 11:47:23 +00:00
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extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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2010-10-13 19:09:44 +00:00
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int x, int y,
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enum mode_set_atomic state);
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2009-06-05 12:42:42 +00:00
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extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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int x, int y,
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struct drm_framebuffer *old_fb);
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extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
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extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb);
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2010-09-26 11:47:23 +00:00
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extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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2010-10-13 19:09:44 +00:00
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int x, int y,
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enum mode_set_atomic state);
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2010-09-26 11:47:23 +00:00
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extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y, int atomic);
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2009-06-05 12:42:42 +00:00
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extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width,
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uint32_t height);
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extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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int x, int y);
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2010-10-23 02:42:17 +00:00
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extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
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int *vpos, int *hpos);
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2010-10-05 23:57:36 +00:00
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2010-02-05 09:21:19 +00:00
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extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
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extern struct edid *
|
2010-12-09 03:13:06 +00:00
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radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
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2009-06-05 12:42:42 +00:00
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extern bool radeon_atom_get_clock_info(struct drm_device *dev);
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extern bool radeon_combios_get_clock_info(struct drm_device *dev);
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extern struct radeon_encoder_atom_dig *
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radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
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2009-11-11 02:25:07 +00:00
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extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
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struct radeon_encoder_int_tmds *tmds);
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extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
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struct radeon_encoder_int_tmds *tmds);
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extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
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struct radeon_encoder_int_tmds *tmds);
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extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
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struct radeon_encoder_ext_tmds *tmds);
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|
extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
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struct radeon_encoder_ext_tmds *tmds);
|
2009-06-12 17:26:08 +00:00
|
|
|
extern struct radeon_encoder_primary_dac *
|
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|
|
radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
|
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|
|
extern struct radeon_encoder_tv_dac *
|
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|
|
radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
|
2009-06-05 12:42:42 +00:00
|
|
|
extern struct radeon_encoder_lvds *
|
|
|
|
|
radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
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|
|
extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
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|
|
|
extern struct radeon_encoder_tv_dac *
|
|
|
|
|
radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
|
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|
|
|
extern struct radeon_encoder_primary_dac *
|
|
|
|
|
radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
|
2009-11-11 02:25:07 +00:00
|
|
|
extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
|
|
|
|
|
extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
|
2009-06-05 12:42:42 +00:00
|
|
|
extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
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|
|
|
extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
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|
|
|
extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
|
|
|
|
|
extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
|
2009-09-15 02:21:01 +00:00
|
|
|
extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
|
|
|
|
|
extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
|
2009-06-05 12:42:42 +00:00
|
|
|
extern void
|
|
|
|
|
radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
|
|
|
|
|
extern void
|
|
|
|
|
radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
|
|
|
|
|
extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
|
|
|
|
|
u16 blue, int regno);
|
2009-10-06 03:54:01 +00:00
|
|
|
extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
|
|
|
|
|
u16 *blue, int regno);
|
2010-03-30 05:34:13 +00:00
|
|
|
void radeon_framebuffer_init(struct drm_device *dev,
|
|
|
|
|
struct radeon_framebuffer *rfb,
|
|
|
|
|
struct drm_mode_fb_cmd *mode_cmd,
|
|
|
|
|
struct drm_gem_object *obj);
|
2009-06-05 12:42:42 +00:00
|
|
|
|
|
|
|
|
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
|
|
|
|
|
bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
|
|
|
|
|
bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
|
|
|
|
|
void radeon_atombios_init_crtc(struct drm_device *dev,
|
|
|
|
|
struct radeon_crtc *radeon_crtc);
|
|
|
|
|
void radeon_legacy_init_crtc(struct drm_device *dev,
|
|
|
|
|
struct radeon_crtc *radeon_crtc);
|
|
|
|
|
|
|
|
|
|
void radeon_get_clock_info(struct drm_device *dev);
|
|
|
|
|
|
|
|
|
|
extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
|
|
|
|
|
extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
|
|
|
|
|
|
|
|
|
|
void radeon_enc_destroy(struct drm_encoder *encoder);
|
|
|
|
|
void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
|
|
|
|
|
void radeon_combios_asic_init(struct drm_device *dev);
|
2009-07-13 19:04:08 +00:00
|
|
|
bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
2010-04-30 16:00:44 +00:00
|
|
|
void radeon_panel_mode_fixup(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
2009-08-13 06:32:14 +00:00
|
|
|
void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
|
|
|
|
|
|
|
|
|
|
/* legacy tv */
|
|
|
|
|
void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
|
|
|
|
|
uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
|
|
|
|
|
void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
|
|
|
|
|
uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
|
|
|
|
|
void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
|
|
|
|
|
uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
|
|
|
|
|
uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
|
|
|
|
|
void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_display_mode *mode,
|
|
|
|
|
struct drm_display_mode *adjusted_mode);
|
2010-03-30 05:34:13 +00:00
|
|
|
|
|
|
|
|
/* fbdev layer */
|
|
|
|
|
int radeon_fbdev_init(struct radeon_device *rdev);
|
|
|
|
|
void radeon_fbdev_fini(struct radeon_device *rdev);
|
|
|
|
|
void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
|
|
|
|
|
int radeon_fbdev_total_size(struct radeon_device *rdev);
|
|
|
|
|
bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
|
2010-05-07 06:42:51 +00:00
|
|
|
|
|
|
|
|
void radeon_fb_output_poll_changed(struct radeon_device *rdev);
|
2010-11-21 15:59:01 +00:00
|
|
|
|
|
|
|
|
void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
|
|
|
|
|
|
2011-02-07 02:16:14 +00:00
|
|
|
int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
|
2009-06-05 12:42:42 +00:00
|
|
|
#endif
|
