blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
/*
|
2009-09-24 14:11:24 +00:00
|
|
|
* Copyright 2006-2009 Analog Devices Inc.
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
*
|
2009-09-24 14:11:24 +00:00
|
|
|
* Licensed under the GPL-2 or later.
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef __ARCH_BLACKFIN_GPIO_H__
|
|
|
|
|
#define __ARCH_BLACKFIN_GPIO_H__
|
|
|
|
|
|
2010-07-05 08:40:41 +00:00
|
|
|
#define gpio_bank(x) ((x) >> 4)
|
|
|
|
|
#define gpio_bit(x) (1<<((x) & 0xF))
|
|
|
|
|
#define gpio_sub_n(x) ((x) & 0xF)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
2010-07-05 08:40:41 +00:00
|
|
|
#define GPIO_BANKSIZE 16
|
|
|
|
|
#define GPIO_BANK_NUM DIV_ROUND_UP(MAX_BLACKFIN_GPIOS, GPIO_BANKSIZE)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
2009-01-07 15:14:39 +00:00
|
|
|
#include <mach/gpio.h>
|
|
|
|
|
|
2010-07-05 08:40:41 +00:00
|
|
|
#define GPIO_0 0
|
|
|
|
|
#define GPIO_1 1
|
|
|
|
|
#define GPIO_2 2
|
|
|
|
|
#define GPIO_3 3
|
|
|
|
|
#define GPIO_4 4
|
|
|
|
|
#define GPIO_5 5
|
|
|
|
|
#define GPIO_6 6
|
|
|
|
|
#define GPIO_7 7
|
|
|
|
|
#define GPIO_8 8
|
|
|
|
|
#define GPIO_9 9
|
|
|
|
|
#define GPIO_10 10
|
|
|
|
|
#define GPIO_11 11
|
|
|
|
|
#define GPIO_12 12
|
|
|
|
|
#define GPIO_13 13
|
|
|
|
|
#define GPIO_14 14
|
|
|
|
|
#define GPIO_15 15
|
|
|
|
|
#define GPIO_16 16
|
|
|
|
|
#define GPIO_17 17
|
|
|
|
|
#define GPIO_18 18
|
|
|
|
|
#define GPIO_19 19
|
|
|
|
|
#define GPIO_20 20
|
|
|
|
|
#define GPIO_21 21
|
|
|
|
|
#define GPIO_22 22
|
|
|
|
|
#define GPIO_23 23
|
|
|
|
|
#define GPIO_24 24
|
|
|
|
|
#define GPIO_25 25
|
|
|
|
|
#define GPIO_26 26
|
|
|
|
|
#define GPIO_27 27
|
|
|
|
|
#define GPIO_28 28
|
|
|
|
|
#define GPIO_29 29
|
|
|
|
|
#define GPIO_30 30
|
|
|
|
|
#define GPIO_31 31
|
|
|
|
|
#define GPIO_32 32
|
|
|
|
|
#define GPIO_33 33
|
|
|
|
|
#define GPIO_34 34
|
|
|
|
|
#define GPIO_35 35
|
|
|
|
|
#define GPIO_36 36
|
|
|
|
|
#define GPIO_37 37
|
|
|
|
|
#define GPIO_38 38
|
|
|
|
|
#define GPIO_39 39
|
|
|
|
|
#define GPIO_40 40
|
|
|
|
|
#define GPIO_41 41
|
|
|
|
|
#define GPIO_42 42
|
|
|
|
|
#define GPIO_43 43
|
|
|
|
|
#define GPIO_44 44
|
|
|
|
|
#define GPIO_45 45
|
|
|
|
|
#define GPIO_46 46
|
|
|
|
|
#define GPIO_47 47
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
|
|
|
|
#define PERIPHERAL_USAGE 1
|
|
|
|
|
#define GPIO_USAGE 0
|
|
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
|
2010-02-10 11:31:41 +00:00
|
|
|
#include <linux/compiler.h>
|
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
/***********************************************************
|
|
|
|
|
*
|
|
|
|
|
* FUNCTIONS: Blackfin General Purpose Ports Access Functions
|
|
|
|
|
*
|
|
|
|
|
* INPUTS/OUTPUTS:
|
|
|
|
|
* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
|
|
|
*
|
|
|
|
|
*
|
|
|
|
|
* DESCRIPTION: These functions abstract direct register access
|
|
|
|
|
* to Blackfin processor General Purpose
|
|
|
|
|
* Ports Regsiters
|
|
|
|
|
*
|
|
|
|
|
* CAUTION: These functions do not belong to the GPIO Driver API
|
|
|
|
|
*************************************************************
|
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
|
**************************************************************/
|
|
|
|
|
|
2009-03-28 12:32:57 +00:00
|
|
|
#ifndef CONFIG_BF54x
|
2008-01-22 09:20:10 +00:00
|
|
|
void set_gpio_dir(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_inen(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_polar(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_edge(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_both(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_data(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_maska(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_maskb(unsigned, unsigned short);
|
|
|
|
|
void set_gpio_toggle(unsigned);
|
|
|
|
|
void set_gpiop_dir(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_inen(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_polar(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_edge(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_both(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_data(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_maska(unsigned, unsigned short);
|
|
|
|
|
void set_gpiop_maskb(unsigned, unsigned short);
|
|
|
|
|
unsigned short get_gpio_dir(unsigned);
|
|
|
|
|
unsigned short get_gpio_inen(unsigned);
|
|
|
|
|
unsigned short get_gpio_polar(unsigned);
|
|
|
|
|
unsigned short get_gpio_edge(unsigned);
|
|
|
|
|
unsigned short get_gpio_both(unsigned);
|
|
|
|
|
unsigned short get_gpio_maska(unsigned);
|
|
|
|
|
unsigned short get_gpio_maskb(unsigned);
|
|
|
|
|
unsigned short get_gpio_data(unsigned);
|
|
|
|
|
unsigned short get_gpiop_dir(unsigned);
|
|
|
|
|
unsigned short get_gpiop_inen(unsigned);
|
|
|
|
|
unsigned short get_gpiop_polar(unsigned);
|
|
|
|
|
unsigned short get_gpiop_edge(unsigned);
|
|
|
|
|
unsigned short get_gpiop_both(unsigned);
|
|
|
|
|
unsigned short get_gpiop_maska(unsigned);
|
|
|
|
|
unsigned short get_gpiop_maskb(unsigned);
|
|
|
|
|
unsigned short get_gpiop_data(unsigned);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
|
|
|
|
struct gpio_port_t {
|
|
|
|
|
unsigned short data;
|
|
|
|
|
unsigned short dummy1;
|
|
|
|
|
unsigned short data_clear;
|
|
|
|
|
unsigned short dummy2;
|
|
|
|
|
unsigned short data_set;
|
|
|
|
|
unsigned short dummy3;
|
|
|
|
|
unsigned short toggle;
|
|
|
|
|
unsigned short dummy4;
|
|
|
|
|
unsigned short maska;
|
|
|
|
|
unsigned short dummy5;
|
|
|
|
|
unsigned short maska_clear;
|
|
|
|
|
unsigned short dummy6;
|
|
|
|
|
unsigned short maska_set;
|
|
|
|
|
unsigned short dummy7;
|
|
|
|
|
unsigned short maska_toggle;
|
|
|
|
|
unsigned short dummy8;
|
|
|
|
|
unsigned short maskb;
|
|
|
|
|
unsigned short dummy9;
|
|
|
|
|
unsigned short maskb_clear;
|
|
|
|
|
unsigned short dummy10;
|
|
|
|
|
unsigned short maskb_set;
|
|
|
|
|
unsigned short dummy11;
|
|
|
|
|
unsigned short maskb_toggle;
|
|
|
|
|
unsigned short dummy12;
|
|
|
|
|
unsigned short dir;
|
|
|
|
|
unsigned short dummy13;
|
|
|
|
|
unsigned short polar;
|
|
|
|
|
unsigned short dummy14;
|
|
|
|
|
unsigned short edge;
|
|
|
|
|
unsigned short dummy15;
|
|
|
|
|
unsigned short both;
|
|
|
|
|
unsigned short dummy16;
|
|
|
|
|
unsigned short inen;
|
|
|
|
|
};
|
2007-07-12 14:41:45 +00:00
|
|
|
#endif
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
2009-09-28 12:23:41 +00:00
|
|
|
#ifdef BFIN_SPECIAL_GPIO_BANKS
|
|
|
|
|
void bfin_special_gpio_free(unsigned gpio);
|
|
|
|
|
int bfin_special_gpio_request(unsigned gpio, const char *label);
|
|
|
|
|
#endif
|
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
#ifdef CONFIG_PM
|
2010-03-10 14:26:06 +00:00
|
|
|
int bfin_pm_standby_ctrl(unsigned ctrl);
|
2008-07-19 08:57:32 +00:00
|
|
|
|
2010-03-10 14:26:06 +00:00
|
|
|
static inline int bfin_pm_standby_setup(void)
|
|
|
|
|
{
|
|
|
|
|
return bfin_pm_standby_ctrl(1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void bfin_pm_standby_restore(void)
|
|
|
|
|
{
|
|
|
|
|
bfin_pm_standby_ctrl(0);
|
|
|
|
|
}
|
2008-07-19 08:57:32 +00:00
|
|
|
|
|
|
|
|
void bfin_gpio_pm_hibernate_restore(void);
|
|
|
|
|
void bfin_gpio_pm_hibernate_suspend(void);
|
2008-02-08 20:12:37 +00:00
|
|
|
|
|
|
|
|
#ifndef CONFIG_BF54x
|
2010-03-10 14:26:06 +00:00
|
|
|
int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
|
|
|
|
struct gpio_port_s {
|
|
|
|
|
unsigned short data;
|
|
|
|
|
unsigned short maska;
|
|
|
|
|
unsigned short maskb;
|
|
|
|
|
unsigned short dir;
|
|
|
|
|
unsigned short polar;
|
|
|
|
|
unsigned short edge;
|
|
|
|
|
unsigned short both;
|
|
|
|
|
unsigned short inen;
|
|
|
|
|
|
|
|
|
|
unsigned short fer;
|
2007-06-14 05:30:23 +00:00
|
|
|
unsigned short reserved;
|
2008-07-19 08:57:32 +00:00
|
|
|
unsigned short mux;
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
};
|
2008-02-08 20:12:37 +00:00
|
|
|
#endif /*CONFIG_BF54x*/
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
#endif /*CONFIG_PM*/
|
|
|
|
|
/***********************************************************
|
|
|
|
|
*
|
|
|
|
|
* FUNCTIONS: Blackfin GPIO Driver
|
|
|
|
|
*
|
|
|
|
|
* INPUTS/OUTPUTS:
|
|
|
|
|
* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
|
|
|
*
|
|
|
|
|
*
|
|
|
|
|
* DESCRIPTION: Blackfin GPIO Driver API
|
|
|
|
|
*
|
|
|
|
|
* CAUTION:
|
|
|
|
|
*************************************************************
|
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
|
**************************************************************/
|
|
|
|
|
|
2008-11-18 09:48:22 +00:00
|
|
|
int bfin_gpio_request(unsigned gpio, const char *label);
|
|
|
|
|
void bfin_gpio_free(unsigned gpio);
|
2009-01-07 15:14:38 +00:00
|
|
|
int bfin_gpio_irq_request(unsigned gpio, const char *label);
|
|
|
|
|
void bfin_gpio_irq_free(unsigned gpio);
|
2008-11-18 09:48:22 +00:00
|
|
|
int bfin_gpio_direction_input(unsigned gpio);
|
|
|
|
|
int bfin_gpio_direction_output(unsigned gpio, int value);
|
|
|
|
|
int bfin_gpio_get_value(unsigned gpio);
|
|
|
|
|
void bfin_gpio_set_value(unsigned gpio, int value);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
2010-02-10 11:31:41 +00:00
|
|
|
#include <asm/irq.h>
|
|
|
|
|
#include <asm/errno.h>
|
|
|
|
|
|
2008-11-18 09:48:22 +00:00
|
|
|
#ifdef CONFIG_GPIOLIB
|
|
|
|
|
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
|
|
|
|
|
|
|
|
|
static inline int gpio_get_value(unsigned int gpio)
|
|
|
|
|
{
|
|
|
|
|
if (gpio < MAX_BLACKFIN_GPIOS)
|
|
|
|
|
return bfin_gpio_get_value(gpio);
|
|
|
|
|
else
|
|
|
|
|
return __gpio_get_value(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void gpio_set_value(unsigned int gpio, int value)
|
|
|
|
|
{
|
|
|
|
|
if (gpio < MAX_BLACKFIN_GPIOS)
|
|
|
|
|
bfin_gpio_set_value(gpio, value);
|
|
|
|
|
else
|
|
|
|
|
__gpio_set_value(gpio, value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int gpio_cansleep(unsigned int gpio)
|
|
|
|
|
{
|
|
|
|
|
return __gpio_cansleep(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
2010-02-10 11:31:41 +00:00
|
|
|
static inline int gpio_to_irq(unsigned gpio)
|
|
|
|
|
{
|
|
|
|
|
return __gpio_to_irq(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
2008-11-18 09:48:22 +00:00
|
|
|
#else /* !CONFIG_GPIOLIB */
|
|
|
|
|
|
|
|
|
|
static inline int gpio_request(unsigned gpio, const char *label)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_request(gpio, label);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void gpio_free(unsigned gpio)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_free(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int gpio_direction_input(unsigned gpio)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_direction_input(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int gpio_direction_output(unsigned gpio, int value)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_direction_output(gpio, value);
|
|
|
|
|
}
|
|
|
|
|
|
2010-08-06 15:36:37 +00:00
|
|
|
static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
|
|
|
|
|
{
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
2008-11-18 09:48:22 +00:00
|
|
|
static inline int gpio_get_value(unsigned gpio)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_get_value(gpio);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void gpio_set_value(unsigned gpio, int value)
|
|
|
|
|
{
|
|
|
|
|
return bfin_gpio_set_value(gpio, value);
|
|
|
|
|
}
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
|
2007-07-24 07:35:53 +00:00
|
|
|
static inline int gpio_to_irq(unsigned gpio)
|
|
|
|
|
{
|
2009-03-28 13:18:45 +00:00
|
|
|
if (likely(gpio < MAX_BLACKFIN_GPIOS))
|
|
|
|
|
return gpio + GPIO_IRQ_BASE;
|
|
|
|
|
|
|
|
|
|
return -EINVAL;
|
2007-07-24 07:35:53 +00:00
|
|
|
}
|
|
|
|
|
|
2010-02-10 11:31:41 +00:00
|
|
|
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
|
|
|
|
#endif /* !CONFIG_GPIOLIB */
|
|
|
|
|
|
2007-07-24 07:35:53 +00:00
|
|
|
static inline int irq_to_gpio(unsigned irq)
|
|
|
|
|
{
|
|
|
|
|
return (irq - GPIO_IRQ_BASE);
|
|
|
|
|
}
|
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 21:50:22 +00:00
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
|
|
|
|
|
#endif /* __ARCH_BLACKFIN_GPIO_H__ */
|