350 lines
12 KiB
C
350 lines
12 KiB
C
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/*
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*************************************************************************
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* Ralink Tech Inc.
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* 5F., No.36, Taiyuan St., Jhubei City,
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* Hsinchu County 302,
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* Taiwan, R.O.C.
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*
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* (c) Copyright 2002-2007, Ralink Technology, Inc.
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*
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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* *
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*************************************************************************
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*/
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#ifndef __RT2860_H__
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#define __RT2860_H__
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#define RT28xx_CHIP_NAME "RT2860"
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#define TXINFO_SIZE 0
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#define TXPADDING_SIZE 0
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/* ----------------- EEPROM Related MACRO ----------------- */
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#define RT28xx_EEPROM_READ16(pAd, offset, var) \
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var = RTMP_EEPROM_READ16(pAd, offset)
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#define RT28xx_EEPROM_WRITE16(pAd, offset, var) \
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RTMP_EEPROM_WRITE16(pAd, offset, var)
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/* ----------------- TASK/THREAD Related MACRO ----------------- */
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#define RT28XX_TASK_THREAD_INIT(pAd, Status) \
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init_thread_task(pAd); NICInitTxRxRingAndBacklogQueue(pAd); \
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Status = NDIS_STATUS_SUCCESS;
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/* function declarations */
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
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#define IRQ_HANDLE_TYPE irqreturn_t
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#else
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#define IRQ_HANDLE_TYPE void
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#endif
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IRQ_HANDLE_TYPE
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19))
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rt2860_interrupt(int irq, void *dev_instance);
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#else
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rt2860_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
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#endif
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/* ----------------- Frimware Related MACRO ----------------- */
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#define RT28XX_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
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do{ \
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ULONG _i, _firm; \
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RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000); \
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\
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for(_i=0; _i<_FwLen; _i+=4) \
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{ \
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_firm = _pFwImage[_i] + \
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(_pFwImage[_i+3] << 24) + \
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(_pFwImage[_i+2] << 16) + \
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(_pFwImage[_i+1] << 8); \
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RTMP_IO_WRITE32(_pAd, FIRMWARE_IMAGE_BASE + _i, _firm); \
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} \
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RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00000); \
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RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00001); \
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\
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/* initialize BBP R/W access agent */ \
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RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0); \
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RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
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}while(0)
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/* ----------------- TX Related MACRO ----------------- */
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#define RT28XX_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
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#define RT28XX_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
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#define RT28XX_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
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((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
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#define RT28XX_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
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do{}while(0)
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#define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
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(((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
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//(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
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#define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
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RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
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#define RTMP_PKT_TAIL_PADDING 0
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#define fRTMP_ADAPTER_NEED_STOP_TX 0
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#define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
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/* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/
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#define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
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RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
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#define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
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RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
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#define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \
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RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
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#define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) \
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RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
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#define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
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/*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/
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#define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
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RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
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/* RtmpPCIDataKickOut(_pAd, _pTxBlk, _QueIdx)*/
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#define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
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MiniportMMRequest(_pAd, _QueIdx, _pNullFrame, _frameLen)
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#define GET_TXRING_FREENO(_pAd, _QueIdx) \
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(_pAd->TxRing[_QueIdx].TxSwFreeIdx > _pAd->TxRing[_QueIdx].TxCpuIdx) ? \
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(_pAd->TxRing[_QueIdx].TxSwFreeIdx - _pAd->TxRing[_QueIdx].TxCpuIdx - 1) \
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: \
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(_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
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#define GET_MGMTRING_FREENO(_pAd) \
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(_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \
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(_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
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: \
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(_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
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/* ----------------- RX Related MACRO ----------------- */
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// no use
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#define RT28XX_RCV_PKT_GET_INIT(pAd)
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#define RT28XX_RV_A_BUF_END
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//#define RT28XX_RV_ALL_BUF_END
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/* ----------------- ASIC Related MACRO ----------------- */
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// no use
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#define RT28XX_DMA_POST_WRITE(pAd)
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// reset MAC of a station entry to 0x000000000000
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#define RT28XX_STA_ENTRY_MAC_RESET(pAd, Wcid) \
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AsicDelWcidTab(pAd, Wcid);
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// add this entry into ASIC RX WCID search table
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#define RT28XX_STA_ENTRY_ADD(pAd, pEntry) \
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AsicUpdateRxWCIDTable(pAd, pEntry->Aid, pEntry->Addr);
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// remove Pair-wise key material from ASIC
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#define RT28XX_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid) \
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AsicRemovePairwiseKeyEntry(pAd, BssIdx, (UCHAR)Wcid);
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// add Client security information into ASIC WCID table and IVEIV table
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#define RT28XX_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry) \
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RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
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pAd->SharedKey[apidx][KeyID].CipherAlg, pEntry);
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#define RT28XX_SECURITY_KEY_ADD(pAd, apidx, KeyID, pEntry) \
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{ /* update pairwise key information to ASIC Shared Key Table */ \
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AsicAddSharedKeyEntry(pAd, apidx, KeyID, \
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pAd->SharedKey[apidx][KeyID].CipherAlg, \
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pAd->SharedKey[apidx][KeyID].Key, \
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pAd->SharedKey[apidx][KeyID].TxMic, \
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pAd->SharedKey[apidx][KeyID].RxMic); \
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/* update ASIC WCID attribute table and IVEIV table */ \
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RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
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pAd->SharedKey[apidx][KeyID].CipherAlg, \
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pEntry); }
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// Insert the BA bitmap to ASIC for the Wcid entry
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#define RT28XX_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
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do{ \
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UINT32 _Value = 0, _Offset; \
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_Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4; \
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RTMP_IO_READ32((_pAd), _Offset, &_Value); \
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_Value |= (0x10000<<(_TID)); \
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RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
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}while(0)
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// Remove the BA bitmap from ASIC for the Wcid entry
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// bitmap field starts at 0x10000 in ASIC WCID table
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#define RT28XX_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
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do{ \
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UINT32 _Value = 0, _Offset; \
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_Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4; \
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RTMP_IO_READ32((_pAd), _Offset, &_Value); \
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_Value &= (~(0x10000 << (_TID))); \
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RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
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}while(0)
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/* ----------------- PCI/USB Related MACRO ----------------- */
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#define RT28XX_HANDLE_DEV_ASSIGN(handle, dev_p) \
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((POS_COOKIE)handle)->pci_dev = dev_p;
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// set driver data
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#define RT28XX_DRVDATA_SET(_a) pci_set_drvdata(_a, net_dev);
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#define RT28XX_UNMAP() \
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{ if (net_dev->base_addr) { \
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iounmap((void *)(net_dev->base_addr)); \
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release_mem_region(pci_resource_start(dev_p, 0), \
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pci_resource_len(dev_p, 0)); } \
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if (net_dev->irq) pci_release_regions(dev_p); }
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#ifdef PCI_MSI_SUPPORT
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#define RTMP_MSI_ENABLE(_pAd) \
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{ POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
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(_pAd)->HaveMsi = pci_enable_msi(_pObj->pci_dev) == 0 ? TRUE : FALSE; }
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#define RTMP_MSI_DISABLE(_pAd) \
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{ POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
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if (_pAd->HaveMsi == TRUE) \
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pci_disable_msi(_pObj->pci_dev); \
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_pAd->HaveMsi = FALSE; }
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#else
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#define RTMP_MSI_ENABLE(_pAd)
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#define RTMP_MSI_DISABLE(_pAd)
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#endif // PCI_MSI_SUPPORT //
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
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#define SA_SHIRQ IRQF_SHARED
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#endif
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#define RT28XX_IRQ_REQUEST(net_dev) \
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{ PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
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POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
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RTMP_MSI_ENABLE(_pAd); \
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if ((retval = request_irq(_pObj->pci_dev->irq, \
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rt2860_interrupt, SA_SHIRQ, \
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(net_dev)->name, (net_dev)))) { \
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printk("RT2860: request_irq ERROR(%d)\n", retval); \
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return retval; } }
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
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#define RT28XX_IRQ_RELEASE(net_dev) \
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{ PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
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POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
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synchronize_irq(_pObj->pci_dev->irq); \
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free_irq(_pObj->pci_dev->irq, (net_dev)); \
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RTMP_MSI_DISABLE(_pAd); }
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#else
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#define RT28XX_IRQ_RELEASE(net_dev) \
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{ PRTMP_ADAPTER _pAd = (PRTMP_ADAPTER)((net_dev)->priv); \
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POS_COOKIE _pObj = (POS_COOKIE)(_pAd->OS_Cookie); \
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free_irq(_pObj->pci_dev->irq, (net_dev)); \
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RTMP_MSI_DISABLE(_pAd); }
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#endif
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#define RT28XX_IRQ_INIT(pAd) \
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{ pAd->int_enable_reg = ((DELAYINTMASK) | \
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(RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
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pAd->int_disable_mask = 0; \
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pAd->int_pending = 0; }
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#define RT28XX_IRQ_ENABLE(pAd) \
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{ /* clear garbage ints */ \
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RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff); \
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NICEnableInterrupt(pAd); }
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#define RT28XX_PUT_DEVICE(dev_p)
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/* ----------------- MLME Related MACRO ----------------- */
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#define RT28XX_MLME_HANDLER(pAd) MlmeHandler(pAd)
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#define RT28XX_MLME_PRE_SANITY_CHECK(pAd)
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#define RT28XX_MLME_STA_QUICK_RSP_WAKE_UP(pAd) \
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RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
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#define RT28XX_MLME_RESET_STATE_MACHINE(pAd) \
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MlmeRestartStateMachine(pAd)
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#define RT28XX_HANDLE_COUNTER_MEASURE(_pAd, _pEntry) \
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HandleCounterMeasure(_pAd, _pEntry)
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/* ----------------- Power Save Related MACRO ----------------- */
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#define RT28XX_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd)
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//
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// Device ID & Vendor ID, these values should match EEPROM value
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//
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#define NIC2860_PCI_DEVICE_ID 0x0601
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#define NIC2860_PCIe_DEVICE_ID 0x0681
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#define NIC2760_PCI_DEVICE_ID 0x0701 // 1T/2R Cardbus ???
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#define NIC2790_PCIe_DEVICE_ID 0x0781 // 1T/2R miniCard
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#define NIC_PCI_VENDOR_ID 0x1814
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#define VEN_AWT_PCIe_DEVICE_ID 0x1059
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#define VEN_AWT_PCI_VENDOR_ID 0x1A3B
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// For RTMPPCIePowerLinkCtrlRestore () function
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#define RESTORE_HALT 1
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#define RESTORE_WAKEUP 2
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#define RESTORE_CLOSE 3
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#define PowerSafeCID 1
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#define PowerRadioOffCID 2
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#define PowerWakeCID 3
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#define CID0MASK 0x000000ff
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#define CID1MASK 0x0000ff00
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#define CID2MASK 0x00ff0000
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#define CID3MASK 0xff000000
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#define PCI_REG_READ_WORD(pci_dev, offset, Configuration) \
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if (pci_read_config_word(pci_dev, offset, ®16) == 0) \
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Configuration = le2cpu16(reg16); \
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else \
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Configuration = 0;
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#define PCI_REG_WIRTE_WORD(pci_dev, offset, Configuration) \
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reg16 = cpu2le16(Configuration); \
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pci_write_config_word(pci_dev, offset, reg16); \
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#define RT28XX_STA_FORCE_WAKEUP(pAd, bFromTx) \
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RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
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#define RT28XX_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
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RT28xxPciStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
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#define RT28XX_MLME_RADIO_ON(pAd) \
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RT28xxPciMlmeRadioOn(pAd);
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#define RT28XX_MLME_RADIO_OFF(pAd) \
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RT28xxPciMlmeRadioOFF(pAd);
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#endif //__RT2860_H__
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