2009-08-18 17:06:28 +00:00
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/workqueue.h>
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#include <linux/mutex.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/spi/spi.h>
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#include <linux/sysfs.h>
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#include <linux/list.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2009-08-18 17:06:28 +00:00
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#include "../iio.h"
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#include "../sysfs.h"
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#include "../ring_sw.h"
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#include "accel.h"
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#include "../trigger.h"
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#include "lis3l02dq.h"
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/**
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* combine_8_to_16() utility function to munge to u8s into u16
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**/
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static inline u16 combine_8_to_16(u8 lower, u8 upper)
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{
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u16 _lower = lower;
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u16 _upper = upper;
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return _lower | (_upper << 8);
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}
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/**
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* lis3l02dq_scan_el_set_state() set whether a scan contains a given channel
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* @scan_el: associtate iio scan element attribute
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* @indio_dev: the device structure
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* @bool: desired state
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*
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* mlock already held when this is called.
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**/
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static int lis3l02dq_scan_el_set_state(struct iio_scan_el *scan_el,
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struct iio_dev *indio_dev,
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bool state)
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{
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u8 t, mask;
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int ret;
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ret = lis3l02dq_spi_read_reg_8(&indio_dev->dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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&t);
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if (ret)
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goto error_ret;
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switch (scan_el->label) {
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case LIS3L02DQ_REG_OUT_X_L_ADDR:
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mask = LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
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break;
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case LIS3L02DQ_REG_OUT_Y_L_ADDR:
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mask = LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
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break;
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case LIS3L02DQ_REG_OUT_Z_L_ADDR:
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mask = LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
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break;
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default:
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ret = -EINVAL;
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goto error_ret;
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}
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if (!(mask & t) == state) {
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if (state)
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t |= mask;
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else
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t &= ~mask;
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ret = lis3l02dq_spi_write_reg_8(&indio_dev->dev,
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LIS3L02DQ_REG_CTRL_1_ADDR,
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&t);
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}
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error_ret:
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return ret;
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}
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static IIO_SCAN_EL_C(accel_x, LIS3L02DQ_SCAN_ACC_X, IIO_SIGNED(16),
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LIS3L02DQ_REG_OUT_X_L_ADDR,
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&lis3l02dq_scan_el_set_state);
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static IIO_SCAN_EL_C(accel_y, LIS3L02DQ_SCAN_ACC_Y, IIO_SIGNED(16),
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LIS3L02DQ_REG_OUT_Y_L_ADDR,
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&lis3l02dq_scan_el_set_state);
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static IIO_SCAN_EL_C(accel_z, LIS3L02DQ_SCAN_ACC_Z, IIO_SIGNED(16),
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LIS3L02DQ_REG_OUT_Z_L_ADDR,
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&lis3l02dq_scan_el_set_state);
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static IIO_SCAN_EL_TIMESTAMP;
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static struct attribute *lis3l02dq_scan_el_attrs[] = {
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&iio_scan_el_accel_x.dev_attr.attr,
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&iio_scan_el_accel_y.dev_attr.attr,
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&iio_scan_el_accel_z.dev_attr.attr,
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&iio_scan_el_timestamp.dev_attr.attr,
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NULL,
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};
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static struct attribute_group lis3l02dq_scan_el_group = {
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.attrs = lis3l02dq_scan_el_attrs,
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.name = "scan_elements",
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};
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/**
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* lis3l02dq_poll_func_th() top half interrupt handler called by trigger
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* @private_data: iio_dev
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**/
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static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev)
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{
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struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
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st->last_timestamp = indio_dev->trig->timestamp;
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schedule_work(&st->work_trigger_to_ring);
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/* Indicate that this interrupt is being handled */
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/* Technically this is trigger related, but without this
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* handler running there is currently now way for the interrupt
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* to clear.
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*/
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st->inter = 1;
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}
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/**
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* lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
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**/
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static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *dev_info,
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int index,
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s64 timestamp,
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int no_test)
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{
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struct lis3l02dq_state *st = iio_dev_get_devdata(dev_info);
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struct iio_trigger *trig = st->trig;
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trig->timestamp = timestamp;
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iio_trigger_poll(trig);
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return IRQ_HANDLED;
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}
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/* This is an event as it is a response to a physical interrupt */
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IIO_EVENT_SH(data_rdy_trig, &lis3l02dq_data_rdy_trig_poll);
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/**
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* lis3l02dq_read_accel_from_ring() individual acceleration read from ring
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**/
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ssize_t lis3l02dq_read_accel_from_ring(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_scan_el *el = NULL;
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int ret, len = 0, i = 0;
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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s16 *data;
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while (dev_info->scan_el_attrs->attrs[i]) {
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el = to_iio_scan_el((struct device_attribute *)
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(dev_info->scan_el_attrs->attrs[i]));
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/* label is in fact the address */
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if (el->label == this_attr->address)
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break;
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i++;
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}
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if (!dev_info->scan_el_attrs->attrs[i]) {
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ret = -EINVAL;
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goto error_ret;
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}
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/* If this element is in the scan mask */
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ret = iio_scan_mask_query(dev_info, el->number);
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if (ret < 0)
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goto error_ret;
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if (ret) {
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data = kmalloc(dev_info->ring->access.get_bpd(dev_info->ring),
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GFP_KERNEL);
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if (data == NULL)
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return -ENOMEM;
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ret = dev_info->ring->access.read_last(dev_info->ring,
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(u8 *)data);
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if (ret)
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goto error_free_data;
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} else {
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ret = -EINVAL;
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goto error_ret;
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}
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len = iio_scan_mask_count_to_right(dev_info, el->number);
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if (len < 0) {
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ret = len;
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goto error_free_data;
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}
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len = sprintf(buf, "ring %d\n", data[len]);
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error_free_data:
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kfree(data);
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error_ret:
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return ret ? ret : len;
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}
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static const u8 read_all_tx_array[] =
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{
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_H_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_L_ADDR), 0,
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LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_H_ADDR), 0,
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};
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/**
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* lis3l02dq_read_all() Reads all channels currently selected
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* @st: device specific state
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* @rx_array: (dma capable) recieve array, must be at least
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* 4*number of channels
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**/
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int lis3l02dq_read_all(struct lis3l02dq_state *st, u8 *rx_array)
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{
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struct spi_transfer *xfers;
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struct spi_message msg;
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int ret, i, j = 0;
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xfers = kzalloc((st->indio_dev->scan_count) * 2
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* sizeof(*xfers), GFP_KERNEL);
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if (!xfers)
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return -ENOMEM;
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mutex_lock(&st->buf_lock);
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for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++) {
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if (st->indio_dev->scan_mask & (1 << i)) {
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/* lower byte */
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xfers[j].tx_buf = st->tx + 2*j;
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st->tx[2*j] = read_all_tx_array[i*4];
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st->tx[2*j + 1] = 0;
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if (rx_array)
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xfers[j].rx_buf = rx_array + j*2;
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xfers[j].bits_per_word = 8;
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xfers[j].len = 2;
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xfers[j].cs_change = 1;
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j++;
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/* upper byte */
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xfers[j].tx_buf = st->tx + 2*j;
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st->tx[2*j] = read_all_tx_array[i*4 + 2];
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st->tx[2*j + 1] = 0;
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if (rx_array)
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xfers[j].rx_buf = rx_array + j*2;
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xfers[j].bits_per_word = 8;
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xfers[j].len = 2;
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xfers[j].cs_change = 1;
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j++;
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}
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}
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/* After these are transmitted, the rx_buff should have
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* values in alternate bytes
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*/
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spi_message_init(&msg);
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for (j = 0; j < st->indio_dev->scan_count * 2; j++)
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spi_message_add_tail(&xfers[j], &msg);
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ret = spi_sync(st->us, &msg);
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mutex_unlock(&st->buf_lock);
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kfree(xfers);
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return ret;
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}
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/* Whilst this makes a lot of calls to iio_sw_ring functions - it is to device
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* specific to be rolled into the core.
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*/
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static void lis3l02dq_trigger_bh_to_ring(struct work_struct *work_s)
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{
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struct lis3l02dq_state *st
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= container_of(work_s, struct lis3l02dq_state,
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work_trigger_to_ring);
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u8 *rx_array;
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int i = 0;
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u16 *data;
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size_t datasize = st->indio_dev
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->ring->access.get_bpd(st->indio_dev->ring);
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data = kmalloc(datasize , GFP_KERNEL);
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if (data == NULL) {
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dev_err(&st->us->dev, "memory alloc failed in ring bh");
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return;
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}
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|
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/* Due to interleaved nature of transmission this buffer must be
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* twice the number of bytes, or 4 times the number of channels
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*/
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rx_array = kmalloc(4 * (st->indio_dev->scan_count), GFP_KERNEL);
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if (rx_array == NULL) {
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dev_err(&st->us->dev, "memory alloc failed in ring bh");
|
2009-09-11 16:22:27 +00:00
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|
|
kfree(data);
|
2009-08-18 17:06:28 +00:00
|
|
|
return;
|
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|
|
}
|
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|
|
|
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|
|
/* whilst trigger specific, if this read does nto occur the data
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|
|
|
ready interrupt will not be cleared. Need to add a mechanism
|
|
|
|
to provide a dummy read function if this is not triggering on
|
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|
|
the data ready function but something else is.
|
|
|
|
*/
|
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|
|
st->inter = 0;
|
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|
|
|
|
|
|
if (st->indio_dev->scan_count)
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|
|
|
if (lis3l02dq_read_all(st, rx_array) >= 0)
|
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|
|
for (; i < st->indio_dev->scan_count; i++)
|
|
|
|
data[i] = combine_8_to_16(rx_array[i*4+1],
|
|
|
|
rx_array[i*4+3]);
|
|
|
|
/* Guaranteed to be aligned with 8 byte boundary */
|
|
|
|
if (st->indio_dev->scan_timestamp)
|
|
|
|
*((s64 *)(data + ((i + 3)/4)*4)) = st->last_timestamp;
|
|
|
|
|
|
|
|
st->indio_dev->ring->access.store_to(st->indio_dev->ring,
|
|
|
|
(u8 *)data,
|
|
|
|
st->last_timestamp);
|
|
|
|
|
|
|
|
iio_trigger_notify_done(st->indio_dev->trig);
|
|
|
|
kfree(rx_array);
|
|
|
|
kfree(data);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* in these circumstances is it better to go with unaligned packing and
|
|
|
|
* deal with the cost?*/
|
|
|
|
static int lis3l02dq_data_rdy_ring_preenable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
size_t size;
|
|
|
|
/* Check if there are any scan elements enabled, if not fail*/
|
|
|
|
if (!(indio_dev->scan_count || indio_dev->scan_timestamp))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (indio_dev->ring->access.set_bpd) {
|
|
|
|
if (indio_dev->scan_timestamp)
|
|
|
|
if (indio_dev->scan_count) /* Timestamp and data */
|
|
|
|
size = 2*sizeof(s64);
|
|
|
|
else /* Timestamp only */
|
|
|
|
size = sizeof(s64);
|
|
|
|
else /* Data only */
|
|
|
|
size = indio_dev->scan_count*sizeof(s16);
|
|
|
|
indio_dev->ring->access.set_bpd(indio_dev->ring, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int lis3l02dq_data_rdy_ring_postenable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
return indio_dev->trig
|
|
|
|
? iio_trigger_attach_poll_func(indio_dev->trig,
|
|
|
|
indio_dev->pollfunc)
|
|
|
|
: 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int lis3l02dq_data_rdy_ring_predisable(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
return indio_dev->trig
|
|
|
|
? iio_trigger_dettach_poll_func(indio_dev->trig,
|
|
|
|
indio_dev->pollfunc)
|
|
|
|
: 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Caller responsible for locking as necessary. */
|
|
|
|
static int __lis3l02dq_write_data_ready_config(struct device *dev,
|
|
|
|
struct
|
|
|
|
iio_event_handler_list *list,
|
|
|
|
bool state)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
u8 valold;
|
|
|
|
bool currentlyset;
|
|
|
|
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
/* Get the current event mask register */
|
|
|
|
ret = lis3l02dq_spi_read_reg_8(dev,
|
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
|
|
|
&valold);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
/* Find out if data ready is already on */
|
|
|
|
currentlyset
|
|
|
|
= valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
|
|
|
|
|
|
|
/* Disable requested */
|
|
|
|
if (!state && currentlyset) {
|
|
|
|
|
|
|
|
valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
|
|
|
/* The double write is to overcome a hardware bug?*/
|
|
|
|
ret = lis3l02dq_spi_write_reg_8(dev,
|
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
|
|
|
&valold);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
ret = lis3l02dq_spi_write_reg_8(dev,
|
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
|
|
|
&valold);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
|
|
|
|
iio_remove_event_from_list(list,
|
|
|
|
&indio_dev->interrupts[0]
|
|
|
|
->ev_list);
|
|
|
|
|
|
|
|
/* Enable requested */
|
|
|
|
} else if (state && !currentlyset) {
|
|
|
|
/* if not set, enable requested */
|
|
|
|
valold |= LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
|
|
|
|
iio_add_event_to_list(list, &indio_dev->interrupts[0]->ev_list);
|
|
|
|
ret = lis3l02dq_spi_write_reg_8(dev,
|
|
|
|
LIS3L02DQ_REG_CTRL_2_ADDR,
|
|
|
|
&valold);
|
|
|
|
if (ret)
|
|
|
|
goto error_ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
error_ret:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* lis3l02dq_data_rdy_trigger_set_state() set datardy interrupt state
|
|
|
|
*
|
|
|
|
* If disabling the interrupt also does a final read to ensure it is clear.
|
|
|
|
* This is only important in some cases where the scan enable elements are
|
|
|
|
* switched before the ring is reenabled.
|
|
|
|
**/
|
|
|
|
static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
|
|
|
|
bool state)
|
|
|
|
{
|
|
|
|
struct lis3l02dq_state *st = trig->private_data;
|
|
|
|
int ret = 0;
|
|
|
|
u8 t;
|
|
|
|
__lis3l02dq_write_data_ready_config(&st->indio_dev->dev,
|
|
|
|
&iio_event_data_rdy_trig,
|
|
|
|
state);
|
|
|
|
if (state == false) {
|
|
|
|
/* possible quirk with handler currently worked around
|
|
|
|
by ensuring the work queue is empty */
|
|
|
|
flush_scheduled_work();
|
|
|
|
/* Clear any outstanding ready events */
|
|
|
|
ret = lis3l02dq_read_all(st, NULL);
|
|
|
|
}
|
|
|
|
lis3l02dq_spi_read_reg_8(&st->indio_dev->dev,
|
|
|
|
LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
|
|
|
|
&t);
|
|
|
|
return ret;
|
|
|
|
}
|
2009-08-21 20:59:08 +00:00
|
|
|
static DEVICE_ATTR(name, S_IRUGO, iio_trigger_read_name, NULL);
|
2009-08-18 17:06:28 +00:00
|
|
|
|
|
|
|
static struct attribute *lis3l02dq_trigger_attrs[] = {
|
|
|
|
&dev_attr_name.attr,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group lis3l02dq_trigger_attr_group = {
|
|
|
|
.attrs = lis3l02dq_trigger_attrs,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* lis3l02dq_trig_try_reen() try renabling irq for data rdy trigger
|
|
|
|
* @trig: the datardy trigger
|
|
|
|
*
|
|
|
|
* As the trigger may occur on any data element being updated it is
|
|
|
|
* really rather likely to occur during the read from the previous
|
|
|
|
* trigger event. The only way to discover if this has occured on
|
|
|
|
* boards not supporting level interrupts is to take a look at the line.
|
|
|
|
* If it is indicating another interrupt and we don't seem to have a
|
|
|
|
* handler looking at it, then we need to notify the core that we need
|
|
|
|
* to tell the triggering core to try reading all these again.
|
|
|
|
**/
|
|
|
|
static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
|
|
|
|
{
|
|
|
|
struct lis3l02dq_state *st = trig->private_data;
|
|
|
|
enable_irq(st->us->irq);
|
|
|
|
/* If gpio still high (or high again) */
|
|
|
|
if (gpio_get_value(irq_to_gpio(st->us->irq)))
|
|
|
|
if (st->inter == 0) {
|
|
|
|
/* already interrupt handler dealing with it */
|
|
|
|
disable_irq_nosync(st->us->irq);
|
|
|
|
if (st->inter == 1) {
|
|
|
|
/* interrupt handler snuck in between test
|
|
|
|
* and disable */
|
|
|
|
enable_irq(st->us->irq);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
/* irq reenabled so success! */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct lis3l02dq_state *state = indio_dev->dev_data;
|
|
|
|
|
|
|
|
state->trig = iio_allocate_trigger();
|
|
|
|
state->trig->name = kmalloc(IIO_TRIGGER_NAME_LENGTH, GFP_KERNEL);
|
|
|
|
if (!state->trig->name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto error_free_trig;
|
|
|
|
}
|
|
|
|
snprintf((char *)state->trig->name,
|
|
|
|
IIO_TRIGGER_NAME_LENGTH,
|
|
|
|
"lis3l02dq-dev%d", indio_dev->id);
|
|
|
|
state->trig->dev.parent = &state->us->dev;
|
|
|
|
state->trig->owner = THIS_MODULE;
|
|
|
|
state->trig->private_data = state;
|
|
|
|
state->trig->set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state;
|
|
|
|
state->trig->try_reenable = &lis3l02dq_trig_try_reen;
|
|
|
|
state->trig->control_attrs = &lis3l02dq_trigger_attr_group;
|
|
|
|
ret = iio_trigger_register(state->trig);
|
|
|
|
if (ret)
|
|
|
|
goto error_free_trig_name;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error_free_trig_name:
|
|
|
|
kfree(state->trig->name);
|
|
|
|
error_free_trig:
|
|
|
|
iio_free_trigger(state->trig);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
struct lis3l02dq_state *state = indio_dev->dev_data;
|
|
|
|
|
|
|
|
iio_trigger_unregister(state->trig);
|
|
|
|
kfree(state->trig->name);
|
|
|
|
iio_free_trigger(state->trig);
|
|
|
|
}
|
|
|
|
|
|
|
|
void lis3l02dq_unconfigure_ring(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
kfree(indio_dev->pollfunc);
|
|
|
|
iio_sw_rb_free(indio_dev->ring);
|
|
|
|
}
|
|
|
|
|
|
|
|
int lis3l02dq_configure_ring(struct iio_dev *indio_dev)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct lis3l02dq_state *st = indio_dev->dev_data;
|
|
|
|
struct iio_ring_buffer *ring;
|
|
|
|
INIT_WORK(&st->work_trigger_to_ring, lis3l02dq_trigger_bh_to_ring);
|
|
|
|
/* Set default scan mode */
|
|
|
|
|
|
|
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_x.number);
|
|
|
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_y.number);
|
|
|
|
iio_scan_mask_set(indio_dev, iio_scan_el_accel_z.number);
|
|
|
|
indio_dev->scan_timestamp = true;
|
|
|
|
|
|
|
|
indio_dev->scan_el_attrs = &lis3l02dq_scan_el_group;
|
|
|
|
|
|
|
|
ring = iio_sw_rb_allocate(indio_dev);
|
|
|
|
if (!ring) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
indio_dev->ring = ring;
|
|
|
|
/* Effectively select the ring buffer implementation */
|
|
|
|
iio_ring_sw_register_funcs(&ring->access);
|
|
|
|
ring->preenable = &lis3l02dq_data_rdy_ring_preenable;
|
|
|
|
ring->postenable = &lis3l02dq_data_rdy_ring_postenable;
|
|
|
|
ring->predisable = &lis3l02dq_data_rdy_ring_predisable;
|
|
|
|
ring->owner = THIS_MODULE;
|
|
|
|
|
|
|
|
indio_dev->pollfunc = kzalloc(sizeof(*indio_dev->pollfunc), GFP_KERNEL);
|
|
|
|
if (indio_dev->pollfunc == NULL) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto error_iio_sw_rb_free;;
|
|
|
|
}
|
|
|
|
indio_dev->pollfunc->poll_func_main = &lis3l02dq_poll_func_th;
|
|
|
|
indio_dev->pollfunc->private_data = indio_dev;
|
|
|
|
indio_dev->modes |= INDIO_RING_TRIGGERED;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error_iio_sw_rb_free:
|
|
|
|
iio_sw_rb_free(indio_dev->ring);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int lis3l02dq_initialize_ring(struct iio_ring_buffer *ring)
|
|
|
|
{
|
|
|
|
return iio_ring_buffer_register(ring);
|
|
|
|
}
|
|
|
|
|
|
|
|
void lis3l02dq_uninitialize_ring(struct iio_ring_buffer *ring)
|
|
|
|
{
|
|
|
|
iio_ring_buffer_unregister(ring);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int lis3l02dq_set_ring_length(struct iio_dev *indio_dev, int length)
|
|
|
|
{
|
|
|
|
/* Set sensible defaults for the ring buffer */
|
|
|
|
if (indio_dev->ring->access.set_length)
|
|
|
|
return indio_dev->ring->access.set_length(indio_dev->ring, 500);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|