137 lines
2.0 KiB
Plaintext
137 lines
2.0 KiB
Plaintext
//----
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// DIP codes, partially explained
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//----
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BR label : branch to label
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JMP label : jump to subroutine label
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JMP1 label : jump to subroutine label if true (whatever)
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RTN : return from subroutine
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WNT x : wait x slots
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WT x : wait x dect-clocks
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U_INT0 : raise interrupt 0
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U_INT1 : raise interrupt 1
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U_INT2 : raise interrupt 2
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U_INT3 : raise interrupt 3
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U_PSC
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U_VINT
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P_EN : enable portbits
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P_LDH x : set selected portbits to high
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P_LDL x : set selected portbits to low
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P_LD x : load portbit ???
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P_SC
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M_WR : start transfer over microwire-output
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M_RST : stop transfer over microwire-output
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M_INI0
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M_INI1
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MEN1N : set microwire enable 1 low
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MEN1 : set microwire enable 1 high
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MEN2N : set microwire enable 2 low
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MEN2 : set microwire enable 2 high
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MEN3N : set microwire enable 3 low
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MEN3 : set microwire enable 3 high
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RFEN : enable clk output
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RFDIS : disable clk output
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D_ON : enable xor with DSC
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D_OFF : disable xor with DSC
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D_LDK : Load DSC Key
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D_PREP : DSC Prepare
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D_WRS : writes internal DSC state
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D_LDS : load DSC state
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D_RST : DSC Reset
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BK_C : set upper address nibble
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LD_PTR
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BK_A
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A_RST
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A_LDR
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A_LDW
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A_MUTE : ADPCM mute
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A_MTOFF : ADPCM mute off
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BK_A1
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A_RST1
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A_LDR1
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A_LDW1
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A_MUTE1 : ADPCM1 mute
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A_MTOFF1 : ADPCM1 mute off
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B_RST : reset rx stuff
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B_XOFF : disable B field CRC
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B_XON : enable B field CRC
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SLOTZERO : wait until in slot zero (partly understood)
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//----
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// missing / unknown mnemonics
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//----
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WNTM1
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WNTP1
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B_ST2
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B_XT
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B_BTFU
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UNLCK
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B_SR
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B_XR
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EN_SL_ADJ
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B_BRFU
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B_RINV
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B_RON
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B_ST
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B_AT
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B_RC
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B_BT
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B_BTFP
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B_AT2
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B_WRS
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B_AR
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B_BR
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B_BRFP
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B_AR2
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WSC
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RCK_INT
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RCK_EXT
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B_WB_OFF
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B_WB_ON
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CLK1
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CLK3
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U_CK8
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U_CK4
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U_CK2
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U_CK1
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A_RCV0
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A_RCV36
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A_RCV30
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A_RCV24
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A_RCV18
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A_RCV12
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A_RCV6
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A_RCV33
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A_RCV27
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A_RCV21
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A_RCV15
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A_RCV9
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A_RCV3
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M_RD
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M_WRS
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A_STOFF
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A_ALAW
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A_DT
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A_NORM
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A_LIN
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A_STON
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A_DT1
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A_STRN
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C_ON
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C_OFF
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C_LD
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