330 lines
14 KiB
PHP
330 lines
14 KiB
PHP
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save
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listing off ; kein Listing <EFBFBD>ber diesen File
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;****************************************************************************
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;* *
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;* AS 1.41 - Datei REGAVR.INC *
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;* *
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;* Sinn : enth<EFBFBD>lt SFR- und Bitdefinitionen f<EFBFBD>r die AVR-Prozessoren *
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;* *
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;* letzte <EFBFBD>nderungen : 6. 7.1996 *
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;* letzte <EFBFBD>nderungen : 8. 6.1997 Anpassung an die endg<EFBFBD>ltigen Versionen *
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;* *
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;****************************************************************************
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ifndef regavrinc ; verhindert Mehrfacheinbindung
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regavrinc equ 1
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if (MOMCPUNAME<>"AT90S1200")&&(MOMCPUNAME<>"AT90S2313")&&(MOMCPUNAME<>"AT90S4414")&&(MOMCPUNAME<>"AT90S8515")
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fatal "Falscher Prozessortyp eingestellt: nur AT90S1200, AT90S2313, AT90S4414 oder AT90S8515 erlaubt!"
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endif
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if MOMPASS=1
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message "Atmel-AVR-SFR-Definitionen (C) 1996 Alfred Arnold"
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endif
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;----------------------------------------------------------------------------
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; Prozessorkern
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sreg port $3f ; Statusregister:
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c equ 0 ; Carry
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z equ 1 ; Ergebnis Null
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n equ 2 ; Ergebnis negativ
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v equ 3 ; Zweierkomplement-<EFBFBD>berlauf
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s equ 4 ; Vorzeichen
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h equ 5 ; Halfcarry
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t equ 6 ; Bitspeicher
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i equ 7 ; globale Interruptsperre
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if MOMCPU>=$902313
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spl equ $3d ; Stapelzeiger (MSB)
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if MOMCPU>=$904414
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sph equ $3e ; (LSB)
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endif
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endif
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;----------------------------------------------------------------------------
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; Chip-Konfiguration
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mcucr port $35 ; CPU-Steuerung:
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isc00 equ 0 ; Flankenwahl INT0
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isc01 equ 1 ; Flanken/Pegeltriggerung INT0
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if MOMCPU>=$902313
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isc10 equ 2 ; Flankenwahl INT1
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isc11 equ 3 ; Flanken/Pegeltriggerung INT1
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endif
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sm equ 4 ; Idle/Powerdown-Modus w<EFBFBD>hlen
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se equ 5 ; Sleep-Modus freigeben
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if MOMCPU>=$904414
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srw equ 6 ; Wait-State-Wahl externes SRAM
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sre equ 7 ; Freigabe externes SRAM
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endif
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;----------------------------------------------------------------------------
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; Interrupt-Steuerung
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gimsk port $3b ; generelle Interrupt-Maske:
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int0 equ 6 ; externer Interrupt 0
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if MOMCPU>=$902313
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int1 equ 7 ; externer Interrupt 1
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endif
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if MOMCPU>=$902313
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gifr port $3a ; generelle Interrupt-Flags:
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intf0 equ 6 ; externer Interrupt 0
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intf1 equ 7 ; externer Interrupt 1
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endif
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timsk port $39 ; Timer-Interrupt-Maske:
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toie0 equ 1 ; <EFBFBD>berlauf Timer 0
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if MOMCPU>=$902313
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if MOMCPU>=$904414
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ocie1b equ 5 ; Vergleich B Timer 1
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endif
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ocie1a equ 6 ; Vergleich Timer 1
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toie1 equ 7 ; <EFBFBD>berlauf Timer 1
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ticie1 equ 3 ; Fang Timer 1
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endif
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tifr port $38 ; Timer-Interrupt-Flags:
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tov0 equ 1 ; <EFBFBD>berlauf Timer 0
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if MOMCPU>=$902313
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if MOMCPU>=$904414
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ocf1b equ 5 ; Vergleich B Timer 1
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endif
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ocf1a equ 6 ; Vergleich A Timer 1
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tov1 equ 7 ; <EFBFBD>berlauf Timer 1
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icf1 equ 3 ; Fang Timer 1
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endif
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;----------------------------------------------------------------------------
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; parallele Ports
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if MOMCPU>=$904414
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porta port $1b ; Datenregister Port A
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ddra port $1a ; Datenrichtungsregister Port A
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pina port $19 ; Leseregister Port A
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endif
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portb port $18 ; Datenregister Port B
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ddrb port $17 ; Datenrichtungsregister Port B
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pinb port $16 ; Leseregister Port B
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if MOMCPU>=$904414
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portc port $15 ; Datenregister Port C
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ddrc port $14 ; Datenrichtungsregister Port C
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pinc port $13 ; Leseregister Port C
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endif
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portd port $12 ; Datenregister Port D
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ddrd port $11 ; Datenrichtungsregister Port D
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pind port $10 ; Leseregister Port D
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;----------------------------------------------------------------------------
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; Timer
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tccr0 port $33 ; Steuerregister Timer 0:
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cs00 equ 0 ; Vorteilereinstellung
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cs01 equ 1
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cs02 equ 2
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tcnt0 port $32 ; Z<EFBFBD>hlregister Timer 0
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if MOMCPU>=$902313
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tccr1a port $2f ; Steuerregister A Timer 1:
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pwm10 equ 0 ; Modus Pulsweitenmodulator
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pwm11 equ 1
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com1a0 equ 6 ; Vergleichsmodus A
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com1a1 equ 7
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if MOMCPU>=$904414
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com1b0 equ 4 ; Vergleichsmodus B
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com1b1 equ 5
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endif
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tccr1b port $2e ; Steuerregister B Timer 1:
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cs10 equ 0 ; Vorteilereinstellung
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cs11 equ 1
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cs12 equ 2
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ctc1 equ 3 ; nach Gleichheit zur<EFBFBD>cksetzen ?
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ices1 equ 6 ; Flankenwahl Fang
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icnc1 equ 7 ; Rauschfilter f<EFBFBD>r Fangfunktion
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tcnt1l port $2c ; Z<EFBFBD>hlregister Timer 1 (LSB)
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tcnt1h port $2d ; (MSB)
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if MOMCPU>=$904414
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ocr1al port $2a ; Vergleichsregister A Timer 1 (LSB)
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ocr1ah port $2b ; (MSB)
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ocr1bl port $28 ; Vergleichsregister B Timer 1 (LSB)
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ocr1bh port $29 ; (MSB)
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elseif
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ocr1l port $2a ; Vergleichsregister Timer 1 (LSB)
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ocr1h port $2b ; (MSB)
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endif
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icr1l port $24 ; Fangwert Timer 1 (LSB)
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icr1h port $25 ; (MSB)
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endif
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;----------------------------------------------------------------------------
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; Watchdog
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wdtcr port $21 ; Watchdog-Steuerregister:
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wdp0 equ 0 ; Vorteiler
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wdp1 equ 1
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wdp2 equ 2
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wde equ 3 ; Freigabe
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if MomCPU>=$902313
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wdttoe equ 4 ; zur Sperre gebraucht
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endif
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;----------------------------------------------------------------------------
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; serielle Ports
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if MOMCPU>=$902312
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udr port $0c ; Datenregister UART
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usr port $0b ; Statusregister UART:
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or equ 3 ; Empf<EFBFBD>nger<EFBFBD>berlauf
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fe equ 4 ; Framing-Fehler
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udre equ 5 ; Datenregister wieder frei
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txc equ 6 ; Sendung komplett
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rxc equ 7 ; Empfang komplett
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ucr port $0a ; Steuerregister UART:
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txb8 equ 0 ; Sendebit 8
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rxb8 equ 1 ; Empfangsbit 8
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chr9 equ 2 ; auf 9-Bit-Datenwerte umschalten
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txen equ 3 ; Sender freigeben
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rxen equ 4 ; Empf<EFBFBD>nger freigeben
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udrie equ 5 ; Interrupts bei freiem Datenregister freigeben
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txcie equ 6 ; Interrupts nach Versand freigeben
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rxcie equ 7 ; Interrupts nach Empfang freigeben
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ubrr port $09 ; Baudratengenerator
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endif
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if MOMCPU>=$904414
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spcr port $0d ; SPI Steuerregister:
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spr0 equ 0 ; Wahl Taktfrequenz
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spr1 equ 1
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cpha equ 2 ; Taktphase
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cpol equ 3 ; Taktpolarit<EFBFBD>t
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mstr equ 4 ; Master/Slave-Wahl
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dord equ 5 ; Bitreihenfolge
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spe equ 6 ; SPI freigeben
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spie equ 7 ; Interruptfreigabe SPI
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spsr port $0e ; SPI Statusregister:
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wcol equ 6 ; Schreibkollision ?
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spif equ 7 ; SPI-Interrupt aufgetreten ?
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spdr port $0f ; SPI Datenregister
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endif
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;----------------------------------------------------------------------------
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; Analogkomparator
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acsr port $08 ; Komparator-Steuer/Statusregister:
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acis0 equ 0 ; Interrupt-Modus
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acis1 equ 1
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if MomCPU>=$902313
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acic equ 2 ; Komparator als Fangsignal f<EFBFBD>r Timer 1 benutzen
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endif
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acie equ 3 ; Interrupt freigeben
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aci equ 4 ; Interrupt aufgetreten ?
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aco equ 5 ; Komparatorausgang
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acd equ 7 ; Strom abschalten
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;----------------------------------------------------------------------------
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; EEPROM
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if MomCPU>=$908515
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eearl port $1e ; Adre<EFBFBD>register
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eearh port $1f
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elseif
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eear port $1e
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endif
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eedr port $1d ; Datenregister
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eecr port $1c ; Steuerregister:
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eere equ 0 ; Lesefreigabe
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eewe equ 1 ; Schreibfreigabe
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if MomCPU>=$902313
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eemwe equ 2
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endif
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;----------------------------------------------------------------------------
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; Vektoren
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; Leider verschieben sich Vektoren bei den h<EFBFBD>heren Prozessoren.
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; Warum nur, Atmel, warum ?
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vec_reset label 0 ; Reset-Einsprung
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vec_int0 label 1 ; Einsprung ext. Interrupt 0
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switch MOMCPUNAME
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case "AT90S1200"
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vec_tm0ovf label 2 ; Einsprung <EFBFBD>berlauf Timer 0
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vec_anacomp label 3 ; Einsprung Analog-Komparator
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case "AT90S2313"
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vec_int1 label 2 ; Einsprung ext. Interrupt 2
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vec_tm1capt label 3 ; Einsprung Fang Timer 1
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vec_tm1comp label 4 ; Einsprung Vergleich Timer 1
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vec_tm1ovf label 5 ; Einsprung <EFBFBD>berlauf Timer 1
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vec_tm0ovf label 6 ; Einsprung <EFBFBD>berlauf Timer 0
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vec_uartrx label 7 ; Einsprung UART Empfang komplett
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vec_uartudre label 8 ; Einsprung UART Datenregister leer
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vec_uarttx label 9 ; Einsprung UART Sendung komplett
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vec_anacomp label 10 ; Einsprung Analog-Komparator
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case "AT90S4414","AT90S8515"
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vec_int1 label 2 ; Einsprung ext. Interrupt 2
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vec_tm1capt label 3 ; Einsprung Fang Timer 1
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vec_tm1compa label 4 ; Einsprung Vergleich A Timer 1
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vec_tm1compb label 5 ; Einsprung Vergleich A Timer 1
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vec_tm1ovf label 6 ; Einsprung <EFBFBD>berlauf Timer 1
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vec_tm0ovf label 7 ; Einsprung <EFBFBD>berlauf Timer 0
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vec_spi label 8 ; Einsprung SPI-Interrupt
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vec_uartrx label 9 ; Einsprung UART Empfang komplett
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vec_uartudre label 10 ; Einsprung UART Datenregister leer
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vec_uarttx label 11 ; Einsprung UART Sendung komplett
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vec_anacomp label 12 ; Einsprung Analog-Komparator
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endcase
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;----------------------------------------------------------------------------
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; Speicheradressen
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eestart equ 0 ; Startadresse internes EEPROM
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iram equ 96,data ; Startadresse internes SRAM
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; (hinter gemapptem I/O)
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irom label 0 ; Startadresse internes EPROM
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switch MOMCPUNAME
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case "AT90S1200"
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eeend equ 63 ; Endadresse EEPROM
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iramend equ 95,data ; Endadresse SRAM
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iromend label 1023 ; Endadresse EPROM
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case "AT90S2313"
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eeend equ 127
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iramend equ $df,data
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iromend label 2047
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case "AT90S4414"
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eeend equ 255
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iramend equ $15f,data
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iromend label 4095
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case "AT90S8515"
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eeend equ 511
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iramend equ $25f,data
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iromend label 8191
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endcase
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;----------------------------------------------------------------------------
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endif
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restore ; wieder erlauben
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